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STM32F3-Discovery
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stm32f30x_i2c.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f30x_i2c.c 00004 * @author MCD Application Team 00005 * @version V1.2.3 00006 * @date 10-July-2015 00007 * @brief This file provides firmware functions to manage the following 00008 * functionalities of the Inter-Integrated circuit (I2C): 00009 * + Initialization and Configuration 00010 * + Communications handling 00011 * + SMBUS management 00012 * + I2C registers management 00013 * + Data transfers management 00014 * + DMA transfers management 00015 * + Interrupts and flags management 00016 * 00017 * @verbatim 00018 ============================================================================ 00019 ##### How to use this driver ##### 00020 ============================================================================ 00021 [..] 00022 (#) Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE) 00023 function for I2C1 or I2C2. 00024 (#) Enable SDA, SCL and SMBA (when used) GPIO clocks using 00025 RCC_AHBPeriphClockCmd() function. 00026 (#) Peripherals alternate function: 00027 (++) Connect the pin to the desired peripherals' Alternate 00028 Function (AF) using GPIO_PinAFConfig() function. 00029 (++) Configure the desired pin in alternate function by: 00030 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF 00031 (++) Select the type, OpenDrain and speed via 00032 GPIO_PuPd, GPIO_OType and GPIO_Speed members 00033 (++) Call GPIO_Init() function. 00034 (#) Program the Mode, Timing , Own address, Ack and Acknowledged Address 00035 using the I2C_Init() function. 00036 (#) Optionally you can enable/configure the following parameters without 00037 re-initialization (i.e there is no need to call again I2C_Init() function): 00038 (++) Enable the acknowledge feature using I2C_AcknowledgeConfig() function. 00039 (++) Enable the dual addressing mode using I2C_DualAddressCmd() function. 00040 (++) Enable the general call using the I2C_GeneralCallCmd() function. 00041 (++) Enable the clock stretching using I2C_StretchClockCmd() function. 00042 (++) Enable the PEC Calculation using I2C_CalculatePEC() function. 00043 (++) For SMBus Mode: 00044 (+++) Enable the SMBusAlert pin using I2C_SMBusAlertCmd() function. 00045 (#) Enable the NVIC and the corresponding interrupt using the function 00046 I2C_ITConfig() if you need to use interrupt mode. 00047 (#) When using the DMA mode 00048 (++) Configure the DMA using DMA_Init() function. 00049 (++) Active the needed channel Request using I2C_DMACmd() function. 00050 (#) Enable the I2C using the I2C_Cmd() function. 00051 (#) Enable the DMA using the DMA_Cmd() function when using DMA mode in the 00052 transfers. 00053 [..] 00054 (@) When using I2C in Fast Mode Plus, SCL and SDA pin 20mA current drive capability 00055 must be enabled by setting the driving capability control bit in SYSCFG. 00056 00057 @endverbatim 00058 ****************************************************************************** 00059 * @attention 00060 * 00061 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> 00062 * 00063 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00064 * You may not use this file except in compliance with the License. 00065 * You may obtain a copy of the License at: 00066 * 00067 * http://www.st.com/software_license_agreement_liberty_v2 00068 * 00069 * Unless required by applicable law or agreed to in writing, software 00070 * distributed under the License is distributed on an "AS IS" BASIS, 00071 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00072 * See the License for the specific language governing permissions and 00073 * limitations under the License. 00074 * 00075 ****************************************************************************** 00076 */ 00077 00078 /* Includes ------------------------------------------------------------------*/ 00079 #include "stm32f30x_i2c.h" 00080 #include "stm32f30x_rcc.h" 00081 00082 /** @addtogroup STM32F30x_StdPeriph_Driver 00083 * @{ 00084 */ 00085 00086 /** @defgroup I2C 00087 * @brief I2C driver modules 00088 * @{ 00089 */ 00090 00091 /* Private typedef -----------------------------------------------------------*/ 00092 /* Private define ------------------------------------------------------------*/ 00093 00094 #define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*<! I2C CR1 clear register Mask */ 00095 #define CR2_CLEAR_MASK ((uint32_t)0x07FF7FFF) /*<! I2C CR2 clear register Mask */ 00096 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */ 00097 #define ERROR_IT_MASK ((uint32_t)0x00003F00) /*<! I2C Error interrupt register Mask */ 00098 #define TC_IT_MASK ((uint32_t)0x000000C0) /*<! I2C TC interrupt register Mask */ 00099 00100 /* Private macro -------------------------------------------------------------*/ 00101 /* Private variables ---------------------------------------------------------*/ 00102 /* Private function prototypes -----------------------------------------------*/ 00103 /* Private functions ---------------------------------------------------------*/ 00104 00105 /** @defgroup I2C_Private_Functions 00106 * @{ 00107 */ 00108 00109 00110 /** @defgroup I2C_Group1 Initialization and Configuration functions 00111 * @brief Initialization and Configuration functions 00112 * 00113 @verbatim 00114 =============================================================================== 00115 ##### Initialization and Configuration functions ##### 00116 =============================================================================== 00117 [..] This section provides a set of functions allowing to initialize the I2C Mode, 00118 I2C Timing, I2C filters, I2C Addressing mode, I2C OwnAddress1. 00119 00120 [..] The I2C_Init() function follows the I2C configuration procedures (these procedures 00121 are available in reference manual). 00122 00123 [..] When the Software Reset is performed using I2C_SoftwareResetCmd() function, the internal 00124 states machines are reset and communication control bits, as well as status bits come 00125 back to their reset value. 00126 00127 [..] Before enabling Stop mode using I2C_StopModeCmd() I2C Clock source must be set to 00128 HSI and Digital filters must be disabled. 00129 00130 [..] Before enabling Own Address 2 via I2C_DualAddressCmd() function, OA2 and mask should be 00131 configured using I2C_OwnAddress2Config() function. 00132 00133 [..] I2C_SlaveByteControlCmd() enable Slave byte control that allow user to get control of 00134 each byte in slave mode when NBYTES is set to 0x01. 00135 00136 @endverbatim 00137 * @{ 00138 */ 00139 00140 /** 00141 * @brief Deinitializes the I2Cx peripheral registers to their default reset values. 00142 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00143 * @retval None 00144 */ 00145 void I2C_DeInit(I2C_TypeDef* I2Cx) 00146 { 00147 /* Check the parameters */ 00148 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00149 00150 if (I2Cx == I2C1) 00151 { 00152 /* Enable I2C1 reset state */ 00153 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); 00154 /* Release I2C1 from reset state */ 00155 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); 00156 } 00157 else 00158 { 00159 /* Enable I2C2 reset state */ 00160 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); 00161 /* Release I2C2 from reset state */ 00162 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); 00163 } 00164 } 00165 00166 /** 00167 * @brief Initializes the I2Cx peripheral according to the specified 00168 * parameters in the I2C_InitStruct. 00169 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00170 * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that 00171 * contains the configuration information for the specified I2C peripheral. 00172 * @retval None 00173 */ 00174 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) 00175 { 00176 uint32_t tmpreg = 0; 00177 00178 /* Check the parameters */ 00179 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00180 assert_param(IS_I2C_ANALOG_FILTER(I2C_InitStruct->I2C_AnalogFilter)); 00181 assert_param(IS_I2C_DIGITAL_FILTER(I2C_InitStruct->I2C_DigitalFilter)); 00182 assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode)); 00183 assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1)); 00184 assert_param(IS_I2C_ACK(I2C_InitStruct->I2C_Ack)); 00185 assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress)); 00186 00187 /* Disable I2Cx Peripheral */ 00188 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE); 00189 00190 /*---------------------------- I2Cx FILTERS Configuration ------------------*/ 00191 /* Get the I2Cx CR1 value */ 00192 tmpreg = I2Cx->CR1; 00193 /* Clear I2Cx CR1 register */ 00194 tmpreg &= CR1_CLEAR_MASK; 00195 /* Configure I2Cx: analog and digital filter */ 00196 /* Set ANFOFF bit according to I2C_AnalogFilter value */ 00197 /* Set DFN bits according to I2C_DigitalFilter value */ 00198 tmpreg |= (uint32_t)I2C_InitStruct->I2C_AnalogFilter |(I2C_InitStruct->I2C_DigitalFilter << 8); 00199 00200 /* Write to I2Cx CR1 */ 00201 I2Cx->CR1 = tmpreg; 00202 00203 /*---------------------------- I2Cx TIMING Configuration -------------------*/ 00204 /* Configure I2Cx: Timing */ 00205 /* Set TIMINGR bits according to I2C_Timing */ 00206 /* Write to I2Cx TIMING */ 00207 I2Cx->TIMINGR = I2C_InitStruct->I2C_Timing & TIMING_CLEAR_MASK; 00208 00209 /* Enable I2Cx Peripheral */ 00210 I2Cx->CR1 |= I2C_CR1_PE; 00211 00212 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ 00213 /* Clear tmpreg local variable */ 00214 tmpreg = 0; 00215 /* Clear OAR1 register */ 00216 I2Cx->OAR1 = (uint32_t)tmpreg; 00217 /* Clear OAR2 register */ 00218 I2Cx->OAR2 = (uint32_t)tmpreg; 00219 /* Configure I2Cx: Own Address1 and acknowledged address */ 00220 /* Set OA1MODE bit according to I2C_AcknowledgedAddress value */ 00221 /* Set OA1 bits according to I2C_OwnAddress1 value */ 00222 tmpreg = (uint32_t)((uint32_t)I2C_InitStruct->I2C_AcknowledgedAddress | \ 00223 (uint32_t)I2C_InitStruct->I2C_OwnAddress1); 00224 /* Write to I2Cx OAR1 */ 00225 I2Cx->OAR1 = tmpreg; 00226 /* Enable Own Address1 acknowledgement */ 00227 I2Cx->OAR1 |= I2C_OAR1_OA1EN; 00228 00229 /*---------------------------- I2Cx MODE Configuration ---------------------*/ 00230 /* Configure I2Cx: mode */ 00231 /* Set SMBDEN and SMBHEN bits according to I2C_Mode value */ 00232 tmpreg = I2C_InitStruct->I2C_Mode; 00233 /* Write to I2Cx CR1 */ 00234 I2Cx->CR1 |= tmpreg; 00235 00236 /*---------------------------- I2Cx ACK Configuration ----------------------*/ 00237 /* Get the I2Cx CR2 value */ 00238 tmpreg = I2Cx->CR2; 00239 /* Clear I2Cx CR2 register */ 00240 tmpreg &= CR2_CLEAR_MASK; 00241 /* Configure I2Cx: acknowledgement */ 00242 /* Set NACK bit according to I2C_Ack value */ 00243 tmpreg |= I2C_InitStruct->I2C_Ack; 00244 /* Write to I2Cx CR2 */ 00245 I2Cx->CR2 = tmpreg; 00246 } 00247 00248 /** 00249 * @brief Fills each I2C_InitStruct member with its default value. 00250 * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized. 00251 * @retval None 00252 */ 00253 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct) 00254 { 00255 /*---------------- Reset I2C init structure parameters values --------------*/ 00256 /* Initialize the I2C_Timing member */ 00257 I2C_InitStruct->I2C_Timing = 0; 00258 /* Initialize the I2C_AnalogFilter member */ 00259 I2C_InitStruct->I2C_AnalogFilter = I2C_AnalogFilter_Enable; 00260 /* Initialize the I2C_DigitalFilter member */ 00261 I2C_InitStruct->I2C_DigitalFilter = 0; 00262 /* Initialize the I2C_Mode member */ 00263 I2C_InitStruct->I2C_Mode = I2C_Mode_I2C; 00264 /* Initialize the I2C_OwnAddress1 member */ 00265 I2C_InitStruct->I2C_OwnAddress1 = 0; 00266 /* Initialize the I2C_Ack member */ 00267 I2C_InitStruct->I2C_Ack = I2C_Ack_Disable; 00268 /* Initialize the I2C_AcknowledgedAddress member */ 00269 I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; 00270 } 00271 00272 /** 00273 * @brief Enables or disables the specified I2C peripheral. 00274 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00275 * @param NewState: new state of the I2Cx peripheral. 00276 * This parameter can be: ENABLE or DISABLE. 00277 * @retval None 00278 */ 00279 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00280 { 00281 /* Check the parameters */ 00282 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00283 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00284 if (NewState != DISABLE) 00285 { 00286 /* Enable the selected I2C peripheral */ 00287 I2Cx->CR1 |= I2C_CR1_PE; 00288 } 00289 else 00290 { 00291 /* Disable the selected I2C peripheral */ 00292 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE); 00293 } 00294 } 00295 00296 00297 /** 00298 * @brief Enables or disables the specified I2C software reset. 00299 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00300 * @retval None 00301 */ 00302 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx) 00303 { 00304 /* Check the parameters */ 00305 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00306 00307 /* Disable peripheral */ 00308 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE); 00309 00310 /* Perform a dummy read to delay the disable of peripheral for minimum 00311 3 APB clock cycles to perform the software reset functionality */ 00312 *(__IO uint32_t *)(uint32_t)I2Cx; 00313 00314 /* Enable peripheral */ 00315 I2Cx->CR1 |= I2C_CR1_PE; 00316 } 00317 00318 /** 00319 * @brief Enables or disables the specified I2C interrupts. 00320 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00321 * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. 00322 * This parameter can be any combination of the following values: 00323 * @arg I2C_IT_ERRI: Error interrupt mask 00324 * @arg I2C_IT_TCI: Transfer Complete interrupt mask 00325 * @arg I2C_IT_STOPI: Stop Detection interrupt mask 00326 * @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask 00327 * @arg I2C_IT_ADDRI: Address Match interrupt mask 00328 * @arg I2C_IT_RXI: RX interrupt mask 00329 * @arg I2C_IT_TXI: TX interrupt mask 00330 * @param NewState: new state of the specified I2C interrupts. 00331 * This parameter can be: ENABLE or DISABLE. 00332 * @retval None 00333 */ 00334 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState) 00335 { 00336 /* Check the parameters */ 00337 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00338 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00339 assert_param(IS_I2C_CONFIG_IT(I2C_IT)); 00340 00341 if (NewState != DISABLE) 00342 { 00343 /* Enable the selected I2C interrupts */ 00344 I2Cx->CR1 |= I2C_IT; 00345 } 00346 else 00347 { 00348 /* Disable the selected I2C interrupts */ 00349 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_IT); 00350 } 00351 } 00352 00353 /** 00354 * @brief Enables or disables the I2C Clock stretching. 00355 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00356 * @param NewState: new state of the I2Cx Clock stretching. 00357 * This parameter can be: ENABLE or DISABLE. 00358 * @retval None 00359 */ 00360 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00361 { 00362 /* Check the parameters */ 00363 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00364 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00365 00366 if (NewState != DISABLE) 00367 { 00368 /* Enable clock stretching */ 00369 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_NOSTRETCH); 00370 } 00371 else 00372 { 00373 /* Disable clock stretching */ 00374 I2Cx->CR1 |= I2C_CR1_NOSTRETCH; 00375 } 00376 } 00377 00378 /** 00379 * @brief Enables or disables I2C wakeup from stop mode. 00380 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00381 * @param NewState: new state of the I2Cx stop mode. 00382 * This parameter can be: ENABLE or DISABLE. 00383 * @retval None 00384 */ 00385 void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00386 { 00387 /* Check the parameters */ 00388 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00389 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00390 00391 if (NewState != DISABLE) 00392 { 00393 /* Enable wakeup from stop mode */ 00394 I2Cx->CR1 |= I2C_CR1_WUPEN; 00395 } 00396 else 00397 { 00398 /* Disable wakeup from stop mode */ 00399 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_WUPEN); 00400 } 00401 } 00402 00403 /** 00404 * @brief Enables or disables the I2C own address 2. 00405 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00406 * @param NewState: new state of the I2C own address 2. 00407 * This parameter can be: ENABLE or DISABLE. 00408 * @retval None 00409 */ 00410 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00411 { 00412 /* Check the parameters */ 00413 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00414 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00415 00416 if (NewState != DISABLE) 00417 { 00418 /* Enable own address 2 */ 00419 I2Cx->OAR2 |= I2C_OAR2_OA2EN; 00420 } 00421 else 00422 { 00423 /* Disable own address 2 */ 00424 I2Cx->OAR2 &= (uint32_t)~((uint32_t)I2C_OAR2_OA2EN); 00425 } 00426 } 00427 00428 /** 00429 * @brief Configures the I2C slave own address 2 and mask. 00430 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00431 * @param Address: specifies the slave address to be programmed. 00432 * @param Mask: specifies own address 2 mask to be programmed. 00433 * This parameter can be one of the following values: 00434 * @arg I2C_OA2_NoMask: no mask. 00435 * @arg I2C_OA2_Mask01: OA2[1] is masked and don't care. 00436 * @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care. 00437 * @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care. 00438 * @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care. 00439 * @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care. 00440 * @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care. 00441 * @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care. 00442 * @retval None 00443 */ 00444 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask) 00445 { 00446 uint32_t tmpreg = 0; 00447 00448 /* Check the parameters */ 00449 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00450 assert_param(IS_I2C_OWN_ADDRESS2(Address)); 00451 assert_param(IS_I2C_OWN_ADDRESS2_MASK(Mask)); 00452 00453 /* Get the old register value */ 00454 tmpreg = I2Cx->OAR2; 00455 00456 /* Reset I2Cx OA2 bit [7:1] and OA2MSK bit [1:0] */ 00457 tmpreg &= (uint32_t)~((uint32_t)(I2C_OAR2_OA2 | I2C_OAR2_OA2MSK)); 00458 00459 /* Set I2Cx SADD */ 00460 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_OAR2_OA2) | \ 00461 (((uint32_t)Mask << 8) & I2C_OAR2_OA2MSK)) ; 00462 00463 /* Store the new register value */ 00464 I2Cx->OAR2 = tmpreg; 00465 } 00466 00467 /** 00468 * @brief Enables or disables the I2C general call mode. 00469 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00470 * @param NewState: new state of the I2C general call mode. 00471 * This parameter can be: ENABLE or DISABLE. 00472 * @retval None 00473 */ 00474 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00475 { 00476 /* Check the parameters */ 00477 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00478 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00479 00480 if (NewState != DISABLE) 00481 { 00482 /* Enable general call mode */ 00483 I2Cx->CR1 |= I2C_CR1_GCEN; 00484 } 00485 else 00486 { 00487 /* Disable general call mode */ 00488 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_GCEN); 00489 } 00490 } 00491 00492 /** 00493 * @brief Enables or disables the I2C slave byte control. 00494 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00495 * @param NewState: new state of the I2C slave byte control. 00496 * This parameter can be: ENABLE or DISABLE. 00497 * @retval None 00498 */ 00499 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00500 { 00501 /* Check the parameters */ 00502 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00503 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00504 00505 if (NewState != DISABLE) 00506 { 00507 /* Enable slave byte control */ 00508 I2Cx->CR1 |= I2C_CR1_SBC; 00509 } 00510 else 00511 { 00512 /* Disable slave byte control */ 00513 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SBC); 00514 } 00515 } 00516 00517 /** 00518 * @brief Configures the slave address to be transmitted after start generation. 00519 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00520 * @param Address: specifies the slave address to be programmed. 00521 * @note This function should be called before generating start condition. 00522 * @retval None 00523 */ 00524 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address) 00525 { 00526 uint32_t tmpreg = 0; 00527 00528 /* Check the parameters */ 00529 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00530 assert_param(IS_I2C_SLAVE_ADDRESS(Address)); 00531 00532 /* Get the old register value */ 00533 tmpreg = I2Cx->CR2; 00534 00535 /* Reset I2Cx SADD bit [9:0] */ 00536 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_SADD); 00537 00538 /* Set I2Cx SADD */ 00539 tmpreg |= (uint32_t)((uint32_t)Address & I2C_CR2_SADD); 00540 00541 /* Store the new register value */ 00542 I2Cx->CR2 = tmpreg; 00543 } 00544 00545 /** 00546 * @brief Enables or disables the I2C 10-bit addressing mode for the master. 00547 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00548 * @param NewState: new state of the I2C 10-bit addressing mode. 00549 * This parameter can be: ENABLE or DISABLE. 00550 * @note This function should be called before generating start condition. 00551 * @retval None 00552 */ 00553 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00554 { 00555 /* Check the parameters */ 00556 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00557 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00558 00559 if (NewState != DISABLE) 00560 { 00561 /* Enable 10-bit addressing mode */ 00562 I2Cx->CR2 |= I2C_CR2_ADD10; 00563 } 00564 else 00565 { 00566 /* Disable 10-bit addressing mode */ 00567 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_ADD10); 00568 } 00569 } 00570 00571 /** 00572 * @} 00573 */ 00574 00575 00576 /** @defgroup I2C_Group2 Communications handling functions 00577 * @brief Communications handling functions 00578 * 00579 @verbatim 00580 =============================================================================== 00581 ##### Communications handling functions ##### 00582 =============================================================================== 00583 [..] This section provides a set of functions that handles I2C communication. 00584 00585 [..] Automatic End mode is enabled using I2C_AutoEndCmd() function. When Reload 00586 mode is enabled via I2C_ReloadCmd() AutoEnd bit has no effect. 00587 00588 [..] I2C_NumberOfBytesConfig() function set the number of bytes to be transferred, 00589 this configuration should be done before generating start condition in master 00590 mode. 00591 00592 [..] When switching from master write operation to read operation in 10Bit addressing 00593 mode, master can only sends the 1st 7 bits of the 10 bit address, followed by 00594 Read direction by enabling HEADR bit using I2C_10BitAddressHeader() function. 00595 00596 [..] In master mode, when transferring more than 255 bytes Reload mode should be used 00597 to handle communication. In the first phase of transfer, Nbytes should be set to 00598 255. After transferring these bytes TCR flag is set and I2C_TransferHandling() 00599 function should be called to handle remaining communication. 00600 00601 [..] In master mode, when software end mode is selected when all data is transferred 00602 TC flag is set I2C_TransferHandling() function should be called to generate STOP 00603 or generate ReStart. 00604 00605 @endverbatim 00606 * @{ 00607 */ 00608 00609 /** 00610 * @brief Enables or disables the I2C automatic end mode (stop condition is 00611 * automatically sent when nbytes data are transferred). 00612 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00613 * @param NewState: new state of the I2C automatic end mode. 00614 * This parameter can be: ENABLE or DISABLE. 00615 * @note This function has effect if Reload mode is disabled. 00616 * @retval None 00617 */ 00618 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00619 { 00620 /* Check the parameters */ 00621 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00622 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00623 00624 if (NewState != DISABLE) 00625 { 00626 /* Enable Auto end mode */ 00627 I2Cx->CR2 |= I2C_CR2_AUTOEND; 00628 } 00629 else 00630 { 00631 /* Disable Auto end mode */ 00632 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_AUTOEND); 00633 } 00634 } 00635 00636 /** 00637 * @brief Enables or disables the I2C nbytes reload mode. 00638 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00639 * @param NewState: new state of the nbytes reload mode. 00640 * This parameter can be: ENABLE or DISABLE. 00641 * @retval None 00642 */ 00643 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00644 { 00645 /* Check the parameters */ 00646 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00647 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00648 00649 if (NewState != DISABLE) 00650 { 00651 /* Enable Auto Reload mode */ 00652 I2Cx->CR2 |= I2C_CR2_RELOAD; 00653 } 00654 else 00655 { 00656 /* Disable Auto Reload mode */ 00657 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RELOAD); 00658 } 00659 } 00660 00661 /** 00662 * @brief Configures the number of bytes to be transmitted/received. 00663 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00664 * @param Number_Bytes: specifies the number of bytes to be programmed. 00665 * @retval None 00666 */ 00667 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes) 00668 { 00669 uint32_t tmpreg = 0; 00670 00671 /* Check the parameters */ 00672 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00673 00674 /* Get the old register value */ 00675 tmpreg = I2Cx->CR2; 00676 00677 /* Reset I2Cx Nbytes bit [7:0] */ 00678 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_NBYTES); 00679 00680 /* Set I2Cx Nbytes */ 00681 tmpreg |= (uint32_t)(((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES); 00682 00683 /* Store the new register value */ 00684 I2Cx->CR2 = tmpreg; 00685 } 00686 00687 /** 00688 * @brief Configures the type of transfer request for the master. 00689 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00690 * @param I2C_Direction: specifies the transfer request direction to be programmed. 00691 * This parameter can be one of the following values: 00692 * @arg I2C_Direction_Transmitter: Master request a write transfer 00693 * @arg I2C_Direction_Receiver: Master request a read transfer 00694 * @retval None 00695 */ 00696 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction) 00697 { 00698 /* Check the parameters */ 00699 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00700 assert_param(IS_I2C_DIRECTION(I2C_Direction)); 00701 00702 /* Test on the direction to set/reset the read/write bit */ 00703 if (I2C_Direction == I2C_Direction_Transmitter) 00704 { 00705 /* Request a write Transfer */ 00706 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RD_WRN); 00707 } 00708 else 00709 { 00710 /* Request a read Transfer */ 00711 I2Cx->CR2 |= I2C_CR2_RD_WRN; 00712 } 00713 } 00714 00715 /** 00716 * @brief Generates I2Cx communication START condition. 00717 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00718 * @param NewState: new state of the I2C START condition generation. 00719 * This parameter can be: ENABLE or DISABLE. 00720 * @retval None 00721 */ 00722 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) 00723 { 00724 /* Check the parameters */ 00725 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00726 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00727 00728 if (NewState != DISABLE) 00729 { 00730 /* Generate a START condition */ 00731 I2Cx->CR2 |= I2C_CR2_START; 00732 } 00733 else 00734 { 00735 /* Disable the START condition generation */ 00736 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_START); 00737 } 00738 } 00739 00740 /** 00741 * @brief Generates I2Cx communication STOP condition. 00742 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00743 * @param NewState: new state of the I2C STOP condition generation. 00744 * This parameter can be: ENABLE or DISABLE. 00745 * @retval None 00746 */ 00747 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) 00748 { 00749 /* Check the parameters */ 00750 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00751 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00752 00753 if (NewState != DISABLE) 00754 { 00755 /* Generate a STOP condition */ 00756 I2Cx->CR2 |= I2C_CR2_STOP; 00757 } 00758 else 00759 { 00760 /* Disable the STOP condition generation */ 00761 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_STOP); 00762 } 00763 } 00764 00765 /** 00766 * @brief Enables or disables the I2C 10-bit header only mode with read direction. 00767 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00768 * @param NewState: new state of the I2C 10-bit header only mode. 00769 * This parameter can be: ENABLE or DISABLE. 00770 * @note This mode can be used only when switching from master transmitter mode 00771 * to master receiver mode. 00772 * @retval None 00773 */ 00774 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00775 { 00776 /* Check the parameters */ 00777 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00778 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00779 00780 if (NewState != DISABLE) 00781 { 00782 /* Enable 10-bit header only mode */ 00783 I2Cx->CR2 |= I2C_CR2_HEAD10R; 00784 } 00785 else 00786 { 00787 /* Disable 10-bit header only mode */ 00788 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_HEAD10R); 00789 } 00790 } 00791 00792 /** 00793 * @brief Generates I2C communication Acknowledge. 00794 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00795 * @param NewState: new state of the Acknowledge. 00796 * This parameter can be: ENABLE or DISABLE. 00797 * @retval None 00798 */ 00799 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) 00800 { 00801 /* Check the parameters */ 00802 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00803 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00804 00805 if (NewState != DISABLE) 00806 { 00807 /* Enable ACK generation */ 00808 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_NACK); 00809 } 00810 else 00811 { 00812 /* Enable NACK generation */ 00813 I2Cx->CR2 |= I2C_CR2_NACK; 00814 } 00815 } 00816 00817 /** 00818 * @brief Returns the I2C slave matched address . 00819 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00820 * @retval The value of the slave matched address . 00821 */ 00822 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx) 00823 { 00824 /* Check the parameters */ 00825 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00826 00827 /* Return the slave matched address in the SR1 register */ 00828 return (uint8_t)(((uint32_t)I2Cx->ISR & I2C_ISR_ADDCODE) >> 16) ; 00829 } 00830 00831 /** 00832 * @brief Returns the I2C slave received request. 00833 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00834 * @retval The value of the received request. 00835 */ 00836 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx) 00837 { 00838 uint32_t tmpreg = 0; 00839 uint16_t direction = 0; 00840 00841 /* Check the parameters */ 00842 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00843 00844 /* Return the slave matched address in the SR1 register */ 00845 tmpreg = (uint32_t)(I2Cx->ISR & I2C_ISR_DIR); 00846 00847 /* If write transfer is requested */ 00848 if (tmpreg == 0) 00849 { 00850 /* write transfer is requested */ 00851 direction = I2C_Direction_Transmitter; 00852 } 00853 else 00854 { 00855 /* Read transfer is requested */ 00856 direction = I2C_Direction_Receiver; 00857 } 00858 return direction; 00859 } 00860 00861 /** 00862 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). 00863 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00864 * @param Address: specifies the slave address to be programmed. 00865 * @param Number_Bytes: specifies the number of bytes to be programmed. 00866 * This parameter must be a value between 0 and 255. 00867 * @param ReloadEndMode: new state of the I2C START condition generation. 00868 * This parameter can be one of the following values: 00869 * @arg I2C_Reload_Mode: Enable Reload mode . 00870 * @arg I2C_AutoEnd_Mode: Enable Automatic end mode. 00871 * @arg I2C_SoftEnd_Mode: Enable Software end mode. 00872 * @param StartStopMode: new state of the I2C START condition generation. 00873 * This parameter can be one of the following values: 00874 * @arg I2C_No_StartStop: Don't Generate stop and start condition. 00875 * @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0). 00876 * @arg I2C_Generate_Start_Read: Generate Restart for read request. 00877 * @arg I2C_Generate_Start_Write: Generate Restart for write request. 00878 * @retval None 00879 */ 00880 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode) 00881 { 00882 uint32_t tmpreg = 0; 00883 00884 /* Check the parameters */ 00885 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00886 assert_param(IS_I2C_SLAVE_ADDRESS(Address)); 00887 assert_param(IS_RELOAD_END_MODE(ReloadEndMode)); 00888 assert_param(IS_START_STOP_MODE(StartStopMode)); 00889 00890 /* Get the CR2 register value */ 00891 tmpreg = I2Cx->CR2; 00892 00893 /* clear tmpreg specific bits */ 00894 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP)); 00895 00896 /* update tmpreg */ 00897 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_CR2_SADD) | (((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES) | \ 00898 (uint32_t)ReloadEndMode | (uint32_t)StartStopMode); 00899 00900 /* update CR2 register */ 00901 I2Cx->CR2 = tmpreg; 00902 } 00903 00904 /** 00905 * @} 00906 */ 00907 00908 00909 /** @defgroup I2C_Group3 SMBUS management functions 00910 * @brief SMBUS management functions 00911 * 00912 @verbatim 00913 =============================================================================== 00914 ##### SMBUS management functions ##### 00915 =============================================================================== 00916 [..] This section provides a set of functions that handles SMBus communication 00917 and timeouts detection. 00918 00919 [..] The SMBus Device default address (0b1100 001) is enabled by calling I2C_Init() 00920 function and setting I2C_Mode member of I2C_InitTypeDef() structure to 00921 I2C_Mode_SMBusDevice. 00922 00923 [..] The SMBus Host address (0b0001 000) is enabled by calling I2C_Init() 00924 function and setting I2C_Mode member of I2C_InitTypeDef() structure to 00925 I2C_Mode_SMBusHost. 00926 00927 [..] The Alert Response Address (0b0001 100) is enabled using I2C_SMBusAlertCmd() 00928 function. 00929 00930 [..] To detect cumulative SCL stretch in master and slave mode, TIMEOUTB should be 00931 configured (in accordance to SMBus specification) using I2C_TimeoutBConfig() 00932 function then I2C_ExtendedClockTimeoutCmd() function should be called to enable 00933 the detection. 00934 00935 [..] SCL low timeout is detected by configuring TIMEOUTB using I2C_TimeoutBConfig() 00936 function followed by the call of I2C_ClockTimeoutCmd(). When adding to this 00937 procedure the call of I2C_IdleClockTimeoutCmd() function, Bus Idle condition 00938 (both SCL and SDA high) is detected also. 00939 00940 @endverbatim 00941 * @{ 00942 */ 00943 00944 /** 00945 * @brief Enables or disables I2C SMBus alert. 00946 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00947 * @param NewState: new state of the I2Cx SMBus alert. 00948 * This parameter can be: ENABLE or DISABLE. 00949 * @retval None 00950 */ 00951 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00952 { 00953 /* Check the parameters */ 00954 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00955 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00956 00957 if (NewState != DISABLE) 00958 { 00959 /* Enable SMBus alert */ 00960 I2Cx->CR1 |= I2C_CR1_ALERTEN; 00961 } 00962 else 00963 { 00964 /* Disable SMBus alert */ 00965 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_ALERTEN); 00966 } 00967 } 00968 00969 /** 00970 * @brief Enables or disables I2C Clock Timeout (SCL Timeout detection). 00971 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00972 * @param NewState: new state of the I2Cx clock Timeout. 00973 * This parameter can be: ENABLE or DISABLE. 00974 * @retval None 00975 */ 00976 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 00977 { 00978 /* Check the parameters */ 00979 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 00980 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00981 00982 if (NewState != DISABLE) 00983 { 00984 /* Enable Clock Timeout */ 00985 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIMOUTEN; 00986 } 00987 else 00988 { 00989 /* Disable Clock Timeout */ 00990 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMOUTEN); 00991 } 00992 } 00993 00994 /** 00995 * @brief Enables or disables I2C Extended Clock Timeout (SCL cumulative Timeout detection). 00996 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 00997 * @param NewState: new state of the I2Cx Extended clock Timeout. 00998 * This parameter can be: ENABLE or DISABLE. 00999 * @retval None 01000 */ 01001 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 01002 { 01003 /* Check the parameters */ 01004 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01005 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01006 01007 if (NewState != DISABLE) 01008 { 01009 /* Enable Clock Timeout */ 01010 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TEXTEN; 01011 } 01012 else 01013 { 01014 /* Disable Clock Timeout */ 01015 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TEXTEN); 01016 } 01017 } 01018 01019 /** 01020 * @brief Enables or disables I2C Idle Clock Timeout (Bus idle SCL and SDA 01021 * high detection). 01022 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01023 * @param NewState: new state of the I2Cx Idle clock Timeout. 01024 * This parameter can be: ENABLE or DISABLE. 01025 * @retval None 01026 */ 01027 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 01028 { 01029 /* Check the parameters */ 01030 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01031 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01032 01033 if (NewState != DISABLE) 01034 { 01035 /* Enable Clock Timeout */ 01036 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIDLE; 01037 } 01038 else 01039 { 01040 /* Disable Clock Timeout */ 01041 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIDLE); 01042 } 01043 } 01044 01045 /** 01046 * @brief Configures the I2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus 01047 * idle SCL and SDA high when TIDLE = 1). 01048 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01049 * @param Timeout: specifies the TimeoutA to be programmed. 01050 * @retval None 01051 */ 01052 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout) 01053 { 01054 uint32_t tmpreg = 0; 01055 01056 /* Check the parameters */ 01057 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01058 assert_param(IS_I2C_TIMEOUT(Timeout)); 01059 01060 /* Get the old register value */ 01061 tmpreg = I2Cx->TIMEOUTR; 01062 01063 /* Reset I2Cx TIMEOUTA bit [11:0] */ 01064 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTA); 01065 01066 /* Set I2Cx TIMEOUTA */ 01067 tmpreg |= (uint32_t)((uint32_t)Timeout & I2C_TIMEOUTR_TIMEOUTA) ; 01068 01069 /* Store the new register value */ 01070 I2Cx->TIMEOUTR = tmpreg; 01071 } 01072 01073 /** 01074 * @brief Configures the I2C Bus Timeout B (SCL cumulative Timeout). 01075 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01076 * @param Timeout: specifies the TimeoutB to be programmed. 01077 * @retval None 01078 */ 01079 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout) 01080 { 01081 uint32_t tmpreg = 0; 01082 01083 /* Check the parameters */ 01084 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01085 assert_param(IS_I2C_TIMEOUT(Timeout)); 01086 01087 /* Get the old register value */ 01088 tmpreg = I2Cx->TIMEOUTR; 01089 01090 /* Reset I2Cx TIMEOUTB bit [11:0] */ 01091 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTB); 01092 01093 /* Set I2Cx TIMEOUTB */ 01094 tmpreg |= (uint32_t)(((uint32_t)Timeout << 16) & I2C_TIMEOUTR_TIMEOUTB) ; 01095 01096 /* Store the new register value */ 01097 I2Cx->TIMEOUTR = tmpreg; 01098 } 01099 01100 /** 01101 * @brief Enables or disables I2C PEC calculation. 01102 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01103 * @param NewState: new state of the I2Cx PEC calculation. 01104 * This parameter can be: ENABLE or DISABLE. 01105 * @retval None 01106 */ 01107 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) 01108 { 01109 /* Check the parameters */ 01110 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01111 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01112 01113 if (NewState != DISABLE) 01114 { 01115 /* Enable PEC calculation */ 01116 I2Cx->CR1 |= I2C_CR1_PECEN; 01117 } 01118 else 01119 { 01120 /* Disable PEC calculation */ 01121 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PECEN); 01122 } 01123 } 01124 01125 /** 01126 * @brief Enables or disables I2C PEC transmission/reception request. 01127 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01128 * @param NewState: new state of the I2Cx PEC request. 01129 * This parameter can be: ENABLE or DISABLE. 01130 * @retval None 01131 */ 01132 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) 01133 { 01134 /* Check the parameters */ 01135 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01136 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01137 01138 if (NewState != DISABLE) 01139 { 01140 /* Enable PEC transmission/reception request */ 01141 I2Cx->CR1 |= I2C_CR2_PECBYTE; 01142 } 01143 else 01144 { 01145 /* Disable PEC transmission/reception request */ 01146 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR2_PECBYTE); 01147 } 01148 } 01149 01150 /** 01151 * @brief Returns the I2C PEC. 01152 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01153 * @retval The value of the PEC . 01154 */ 01155 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) 01156 { 01157 /* Check the parameters */ 01158 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01159 01160 /* Return the slave matched address in the SR1 register */ 01161 return (uint8_t)((uint32_t)I2Cx->PECR & I2C_PECR_PEC); 01162 } 01163 01164 /** 01165 * @} 01166 */ 01167 01168 01169 /** @defgroup I2C_Group4 I2C registers management functions 01170 * @brief I2C registers management functions 01171 * 01172 @verbatim 01173 =============================================================================== 01174 ##### I2C registers management functions ##### 01175 =============================================================================== 01176 [..] This section provides a functions that allow user the management of 01177 I2C registers. 01178 01179 @endverbatim 01180 * @{ 01181 */ 01182 01183 /** 01184 * @brief Reads the specified I2C register and returns its value. 01185 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01186 * @param I2C_Register: specifies the register to read. 01187 * This parameter can be one of the following values: 01188 * @arg I2C_Register_CR1: CR1 register. 01189 * @arg I2C_Register_CR2: CR2 register. 01190 * @arg I2C_Register_OAR1: OAR1 register. 01191 * @arg I2C_Register_OAR2: OAR2 register. 01192 * @arg I2C_Register_TIMINGR: TIMING register. 01193 * @arg I2C_Register_TIMEOUTR: TIMEOUTR register. 01194 * @arg I2C_Register_ISR: ISR register. 01195 * @arg I2C_Register_ICR: ICR register. 01196 * @arg I2C_Register_PECR: PECR register. 01197 * @arg I2C_Register_RXDR: RXDR register. 01198 * @arg I2C_Register_TXDR: TXDR register. 01199 * @retval The value of the read register. 01200 */ 01201 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register) 01202 { 01203 __IO uint32_t tmp = 0; 01204 01205 /* Check the parameters */ 01206 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01207 assert_param(IS_I2C_REGISTER(I2C_Register)); 01208 01209 tmp = (uint32_t)I2Cx; 01210 tmp += I2C_Register; 01211 01212 /* Return the selected register value */ 01213 return (*(__IO uint32_t *) tmp); 01214 } 01215 01216 /** 01217 * @} 01218 */ 01219 01220 /** @defgroup I2C_Group5 Data transfers management functions 01221 * @brief Data transfers management functions 01222 * 01223 @verbatim 01224 =============================================================================== 01225 ##### Data transfers management functions ##### 01226 =============================================================================== 01227 [..] This subsection provides a set of functions allowing to manage 01228 the I2C data transfers. 01229 01230 [..] The read access of the I2C_RXDR register can be done using 01231 the I2C_ReceiveData() function and returns the received value. 01232 Whereas a write access to the I2C_TXDR can be done using I2C_SendData() 01233 function and stores the written data into TXDR. 01234 @endverbatim 01235 * @{ 01236 */ 01237 01238 /** 01239 * @brief Sends a data byte through the I2Cx peripheral. 01240 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01241 * @param Data: Byte to be transmitted.. 01242 * @retval None 01243 */ 01244 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) 01245 { 01246 /* Check the parameters */ 01247 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01248 01249 /* Write in the DR register the data to be sent */ 01250 I2Cx->TXDR = (uint8_t)Data; 01251 } 01252 01253 /** 01254 * @brief Returns the most recent received data by the I2Cx peripheral. 01255 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01256 * @retval The value of the received data. 01257 */ 01258 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) 01259 { 01260 /* Check the parameters */ 01261 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01262 01263 /* Return the data in the DR register */ 01264 return (uint8_t)I2Cx->RXDR; 01265 } 01266 01267 /** 01268 * @} 01269 */ 01270 01271 01272 /** @defgroup I2C_Group6 DMA transfers management functions 01273 * @brief DMA transfers management functions 01274 * 01275 @verbatim 01276 =============================================================================== 01277 ##### DMA transfers management functions ##### 01278 =============================================================================== 01279 [..] This section provides two functions that can be used only in DMA mode. 01280 [..] In DMA Mode, the I2C communication can be managed by 2 DMA Channel 01281 requests: 01282 (#) I2C_DMAReq_Tx: specifies the Tx buffer DMA transfer request. 01283 (#) I2C_DMAReq_Rx: specifies the Rx buffer DMA transfer request. 01284 [..] In this Mode it is advised to use the following function: 01285 (+) I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState); 01286 @endverbatim 01287 * @{ 01288 */ 01289 01290 /** 01291 * @brief Enables or disables the I2C DMA interface. 01292 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01293 * @param I2C_DMAReq: specifies the I2C DMA transfer request to be enabled or disabled. 01294 * This parameter can be any combination of the following values: 01295 * @arg I2C_DMAReq_Tx: Tx DMA transfer request 01296 * @arg I2C_DMAReq_Rx: Rx DMA transfer request 01297 * @param NewState: new state of the selected I2C DMA transfer request. 01298 * This parameter can be: ENABLE or DISABLE. 01299 * @retval None 01300 */ 01301 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState) 01302 { 01303 /* Check the parameters */ 01304 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01305 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01306 assert_param(IS_I2C_DMA_REQ(I2C_DMAReq)); 01307 01308 if (NewState != DISABLE) 01309 { 01310 /* Enable the selected I2C DMA requests */ 01311 I2Cx->CR1 |= I2C_DMAReq; 01312 } 01313 else 01314 { 01315 /* Disable the selected I2C DMA requests */ 01316 I2Cx->CR1 &= (uint32_t)~I2C_DMAReq; 01317 } 01318 } 01319 /** 01320 * @} 01321 */ 01322 01323 01324 /** @defgroup I2C_Group7 Interrupts and flags management functions 01325 * @brief Interrupts and flags management functions 01326 * 01327 @verbatim 01328 =============================================================================== 01329 ##### Interrupts and flags management functions ##### 01330 =============================================================================== 01331 [..] This section provides functions allowing to configure the I2C Interrupts 01332 sources and check or clear the flags or pending bits status. 01333 The user should identify which mode will be used in his application to manage 01334 the communication: Polling mode, Interrupt mode or DMA mode(refer I2C_Group6) . 01335 01336 *** Polling Mode *** 01337 ==================== 01338 [..] In Polling Mode, the I2C communication can be managed by 15 flags: 01339 (#) I2C_FLAG_TXE: to indicate the status of Transmit data register empty flag. 01340 (#) I2C_FLAG_TXIS: to indicate the status of Transmit interrupt status flag . 01341 (#) I2C_FLAG_RXNE: to indicate the status of Receive data register not empty flag. 01342 (#) I2C_FLAG_ADDR: to indicate the status of Address matched flag (slave mode). 01343 (#) I2C_FLAG_NACKF: to indicate the status of NACK received flag. 01344 (#) I2C_FLAG_STOPF: to indicate the status of STOP detection flag. 01345 (#) I2C_FLAG_TC: to indicate the status of Transfer complete flag(master mode). 01346 (#) I2C_FLAG_TCR: to indicate the status of Transfer complete reload flag. 01347 (#) I2C_FLAG_BERR: to indicate the status of Bus error flag. 01348 (#) I2C_FLAG_ARLO: to indicate the status of Arbitration lost flag. 01349 (#) I2C_FLAG_OVR: to indicate the status of Overrun/Underrun flag. 01350 (#) I2C_FLAG_PECERR: to indicate the status of PEC error in reception flag. 01351 (#) I2C_FLAG_TIMEOUT: to indicate the status of Timeout or Tlow detection flag. 01352 (#) I2C_FLAG_ALERT: to indicate the status of SMBus Alert flag. 01353 (#) I2C_FLAG_BUSY: to indicate the status of Bus busy flag. 01354 01355 [..] In this Mode it is advised to use the following functions: 01356 (+) FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); 01357 (+) void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); 01358 01359 [..] 01360 (@)Do not use the BUSY flag to handle each data transmission or reception.It is 01361 better to use the TXIS and RXNE flags instead. 01362 01363 *** Interrupt Mode *** 01364 ====================== 01365 [..] In Interrupt Mode, the I2C communication can be managed by 7 interrupt sources 01366 and 15 pending bits: 01367 [..] Interrupt Source: 01368 (#) I2C_IT_ERRI: specifies the interrupt source for the Error interrupt. 01369 (#) I2C_IT_TCI: specifies the interrupt source for the Transfer Complete interrupt. 01370 (#) I2C_IT_STOPI: specifies the interrupt source for the Stop Detection interrupt. 01371 (#) I2C_IT_NACKI: specifies the interrupt source for the Not Acknowledge received interrupt. 01372 (#) I2C_IT_ADDRI: specifies the interrupt source for the Address Match interrupt. 01373 (#) I2C_IT_RXI: specifies the interrupt source for the RX interrupt. 01374 (#) I2C_IT_TXI: specifies the interrupt source for the TX interrupt. 01375 01376 [..] Pending Bits: 01377 (#) I2C_IT_TXIS: to indicate the status of Transmit interrupt status flag. 01378 (#) I2C_IT_RXNE: to indicate the status of Receive data register not empty flag. 01379 (#) I2C_IT_ADDR: to indicate the status of Address matched flag (slave mode). 01380 (#) I2C_IT_NACKF: to indicate the status of NACK received flag. 01381 (#) I2C_IT_STOPF: to indicate the status of STOP detection flag. 01382 (#) I2C_IT_TC: to indicate the status of Transfer complete flag (master mode). 01383 (#) I2C_IT_TCR: to indicate the status of Transfer complete reload flag. 01384 (#) I2C_IT_BERR: to indicate the status of Bus error flag. 01385 (#) I2C_IT_ARLO: to indicate the status of Arbitration lost flag. 01386 (#) I2C_IT_OVR: to indicate the status of Overrun/Underrun flag. 01387 (#) I2C_IT_PECERR: to indicate the status of PEC error in reception flag. 01388 (#) I2C_IT_TIMEOUT: to indicate the status of Timeout or Tlow detection flag. 01389 (#) I2C_IT_ALERT: to indicate the status of SMBus Alert flag. 01390 01391 [..] In this Mode it is advised to use the following functions: 01392 (+) void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); 01393 (+) ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); 01394 01395 @endverbatim 01396 * @{ 01397 */ 01398 01399 /** 01400 * @brief Checks whether the specified I2C flag is set or not. 01401 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01402 * @param I2C_FLAG: specifies the flag to check. 01403 * This parameter can be one of the following values: 01404 * @arg I2C_FLAG_TXE: Transmit data register empty 01405 * @arg I2C_FLAG_TXIS: Transmit interrupt status 01406 * @arg I2C_FLAG_RXNE: Receive data register not empty 01407 * @arg I2C_FLAG_ADDR: Address matched (slave mode) 01408 * @arg I2C_FLAG_NACKF: NACK received flag 01409 * @arg I2C_FLAG_STOPF: STOP detection flag 01410 * @arg I2C_FLAG_TC: Transfer complete (master mode) 01411 * @arg I2C_FLAG_TCR: Transfer complete reload 01412 * @arg I2C_FLAG_BERR: Bus error 01413 * @arg I2C_FLAG_ARLO: Arbitration lost 01414 * @arg I2C_FLAG_OVR: Overrun/Underrun 01415 * @arg I2C_FLAG_PECERR: PEC error in reception 01416 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag 01417 * @arg I2C_FLAG_ALERT: SMBus Alert 01418 * @arg I2C_FLAG_BUSY: Bus busy 01419 * @retval The new state of I2C_FLAG (SET or RESET). 01420 */ 01421 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) 01422 { 01423 uint32_t tmpreg = 0; 01424 FlagStatus bitstatus = RESET; 01425 01426 /* Check the parameters */ 01427 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01428 assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); 01429 01430 /* Get the ISR register value */ 01431 tmpreg = I2Cx->ISR; 01432 01433 /* Get flag status */ 01434 tmpreg &= I2C_FLAG; 01435 01436 if(tmpreg != 0) 01437 { 01438 /* I2C_FLAG is set */ 01439 bitstatus = SET; 01440 } 01441 else 01442 { 01443 /* I2C_FLAG is reset */ 01444 bitstatus = RESET; 01445 } 01446 return bitstatus; 01447 } 01448 01449 /** 01450 * @brief Clears the I2Cx's pending flags. 01451 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01452 * @param I2C_FLAG: specifies the flag to clear. 01453 * This parameter can be any combination of the following values: 01454 * @arg I2C_FLAG_ADDR: Address matched (slave mode) 01455 * @arg I2C_FLAG_NACKF: NACK received flag 01456 * @arg I2C_FLAG_STOPF: STOP detection flag 01457 * @arg I2C_FLAG_BERR: Bus error 01458 * @arg I2C_FLAG_ARLO: Arbitration lost 01459 * @arg I2C_FLAG_OVR: Overrun/Underrun 01460 * @arg I2C_FLAG_PECERR: PEC error in reception 01461 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag 01462 * @arg I2C_FLAG_ALERT: SMBus Alert 01463 * @retval The new state of I2C_FLAG (SET or RESET). 01464 */ 01465 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) 01466 { 01467 /* Check the parameters */ 01468 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01469 assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); 01470 01471 /* Clear the selected flag */ 01472 I2Cx->ICR = I2C_FLAG; 01473 } 01474 01475 /** 01476 * @brief Checks whether the specified I2C interrupt has occurred or not. 01477 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01478 * @param I2C_IT: specifies the interrupt source to check. 01479 * This parameter can be one of the following values: 01480 * @arg I2C_IT_TXIS: Transmit interrupt status 01481 * @arg I2C_IT_RXNE: Receive data register not empty 01482 * @arg I2C_IT_ADDR: Address matched (slave mode) 01483 * @arg I2C_IT_NACKF: NACK received flag 01484 * @arg I2C_IT_STOPF: STOP detection flag 01485 * @arg I2C_IT_TC: Transfer complete (master mode) 01486 * @arg I2C_IT_TCR: Transfer complete reload 01487 * @arg I2C_IT_BERR: Bus error 01488 * @arg I2C_IT_ARLO: Arbitration lost 01489 * @arg I2C_IT_OVR: Overrun/Underrun 01490 * @arg I2C_IT_PECERR: PEC error in reception 01491 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag 01492 * @arg I2C_IT_ALERT: SMBus Alert 01493 * @retval The new state of I2C_IT (SET or RESET). 01494 */ 01495 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) 01496 { 01497 uint32_t tmpreg = 0; 01498 ITStatus bitstatus = RESET; 01499 uint32_t enablestatus = 0; 01500 01501 /* Check the parameters */ 01502 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01503 assert_param(IS_I2C_GET_IT(I2C_IT)); 01504 01505 /* Check if the interrupt source is enabled or not */ 01506 /* If Error interrupt */ 01507 if((uint32_t)(I2C_IT & ERROR_IT_MASK)) 01508 { 01509 enablestatus = (uint32_t)((I2C_CR1_ERRIE) & (I2Cx->CR1)); 01510 } 01511 /* If TC interrupt */ 01512 else if((uint32_t)(I2C_IT & TC_IT_MASK)) 01513 { 01514 enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1)); 01515 } 01516 else 01517 { 01518 enablestatus = (uint32_t)((I2C_IT) & (I2Cx->CR1)); 01519 } 01520 01521 /* Get the ISR register value */ 01522 tmpreg = I2Cx->ISR; 01523 01524 /* Get flag status */ 01525 tmpreg &= I2C_IT; 01526 01527 /* Check the status of the specified I2C flag */ 01528 if((tmpreg != RESET) && enablestatus) 01529 { 01530 /* I2C_IT is set */ 01531 bitstatus = SET; 01532 } 01533 else 01534 { 01535 /* I2C_IT is reset */ 01536 bitstatus = RESET; 01537 } 01538 01539 /* Return the I2C_IT status */ 01540 return bitstatus; 01541 } 01542 01543 /** 01544 * @brief Clears the I2Cx's interrupt pending bits. 01545 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. 01546 * @param I2C_IT: specifies the interrupt pending bit to clear. 01547 * This parameter can be any combination of the following values: 01548 * @arg I2C_IT_ADDR: Address matched (slave mode) 01549 * @arg I2C_IT_NACKF: NACK received flag 01550 * @arg I2C_IT_STOPF: STOP detection flag 01551 * @arg I2C_IT_BERR: Bus error 01552 * @arg I2C_IT_ARLO: Arbitration lost 01553 * @arg I2C_IT_OVR: Overrun/Underrun 01554 * @arg I2C_IT_PECERR: PEC error in reception 01555 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag 01556 * @arg I2C_IT_ALERT: SMBus Alert 01557 * @retval The new state of I2C_IT (SET or RESET). 01558 */ 01559 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) 01560 { 01561 /* Check the parameters */ 01562 assert_param(IS_I2C_ALL_PERIPH(I2Cx)); 01563 assert_param(IS_I2C_CLEAR_IT(I2C_IT)); 01564 01565 /* Clear the selected flag */ 01566 I2Cx->ICR = I2C_IT; 01567 } 01568 01569 /** 01570 * @} 01571 */ 01572 01573 /** 01574 * @} 01575 */ 01576 01577 /** 01578 * @} 01579 */ 01580 01581 /** 01582 * @} 01583 */ 01584 01585 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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