stm32f30x_dac.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f30x_dac.c
00004   * @author  MCD Application Team
00005   * @version V1.2.3
00006   * @date    10-July-2015
00007   * @brief   This file provides firmware functions to manage the following 
00008   *          functionalities of the Digital-to-Analog Converter (DAC) peripheral: 
00009   *           + DAC channels configuration: trigger, output buffer, data format
00010   *           + DMA management      
00011   *           + Interrupts and flags management
00012   *
00013   @verbatim
00014     
00015  ===============================================================================
00016                       ##### DAC Peripheral features #####
00017  ===============================================================================
00018     [..] The device integrates two 12-bit Digital Analog Converters that can 
00019          be used independently or simultaneously (dual mode):
00020          (#) DAC1 integrates two DAC channels:
00021              (++) DAC1 channel 1 with DAC1_OUT1 as output
00022              (++) DAC1 channel 2 with DAC1_OUT2 as output
00023              (++) The two channels can be used independently or simultaneously (dual mode)
00024    
00025          (#) DAC2 integrates only one channel DAC2 channel 1 with DAC2_OUT1 as output 
00026          
00027     [..] Digital to Analog conversion can be non-triggered using DAC_Trigger_None
00028          and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register using 
00029          DAC_SetChannel1Data()/DAC_SetChannel2Data.
00030          
00031     [..] Digital to Analog conversion can be triggered by:
00032          (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
00033              The used pin (GPIOx_Pin9) must be configured in input mode.
00034              
00035          (#) Timers TRGO: TIM2, TIM8/TIM3, TIM4, TIM6, TIM7, and TIM15 
00036              (DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
00037              The timer TRGO event should be selected using TIM_SelectOutputTrigger()
00038              (++) To trigger DAC conversions by TIM3 instead of TIM8 follow
00039                  this sequence:
00040                  (+++) Enable SYSCFG APB clock by calling
00041                        RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
00042                  (+++) Select DAC_Trigger_T3_TRGO when calling DAC_Init()
00043                  (+++) Remap the DAC trigger from TIM8 to TIM3 by calling
00044                        SYSCFG_TriggerRemapConfig(SYSCFG_TriggerRemap_DACTIM3, ENABLE)
00045          (#) Software using DAC_Trigger_Software
00046          
00047     [..] Each DAC channel integrates an output buffer that can be used to 
00048          reduce the output impedance, and to drive external loads directly
00049          without having to add an external operational amplifier.
00050          To enable, the output buffer use  
00051          DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
00052          
00053     [..] Refer to the device datasheet for more details about output impedance
00054          value with and without output buffer.
00055          
00056     [..] Both DAC channels can be used to generate:
00057          (+) Noise wave using DAC_WaveGeneration_Noise
00058          (+) Triangle wave using DAC_WaveGeneration_Triangle
00059          
00060     [..] Wave generation can be disabled using DAC_WaveGeneration_None
00061     
00062     [..] The DAC data format can be:
00063          (+) 8-bit right alignment using DAC_Align_8b_R
00064          (+) 12-bit left alignment using DAC_Align_12b_L
00065          (+) 12-bit right alignment using DAC_Align_12b_R
00066          
00067     [..] The analog output voltage on each DAC channel pin is determined
00068          by the following equation: 
00069          (+) DAC_OUTx = VREF+ * DOR / 4095 with DOR is the Data Output Register. 
00070          VREF+ is the input voltage reference (refer to the device datasheet)
00071          e.g. To set DAC_OUT1 to 0.7V, use DAC_SetChannel1Data(DAC_Align_12b_R, 868);
00072          Assuming that VREF+ = 3.3, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
00073          
00074     [..] A DMA1 request can be generated when an external trigger (but not
00075          a software trigger) occurs if DMA1 requests are enabled using
00076          DAC_DMACmd()
00077          DMA1 requests are mapped as following:
00078          (+) DAC channel1 is mapped on DMA1 channel3 which must be already 
00079              configured
00080          (+) DAC channel2 is mapped on DMA1 channel4 which must be already 
00081              configured
00082  
00083                     ##### How to use this driver #####
00084  ===============================================================================          
00085     [..]
00086          (+) Enable DAC APB1 clock to get write access to DAC registers
00087              using RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
00088 
00089          (+) Configure DACx_OUTy (DAC1_OUT1: PA4, DAC1_OUT2: PA5, DAC2_OUT1: PA6)
00090              in analog mode.
00091 
00092          (+) Configure the DAC channel using DAC_Init()
00093 
00094          (+) Enable the DAC channel using DAC_Cmd()
00095  
00096   @endverbatim
00097     
00098   ******************************************************************************
00099   * @attention
00100   *
00101   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
00102   *
00103   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00104   * You may not use this file except in compliance with the License.
00105   * You may obtain a copy of the License at:
00106   *
00107   *        http://www.st.com/software_license_agreement_liberty_v2
00108   *
00109   * Unless required by applicable law or agreed to in writing, software 
00110   * distributed under the License is distributed on an "AS IS" BASIS, 
00111   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00112   * See the License for the specific language governing permissions and
00113   * limitations under the License.
00114   *
00115   ******************************************************************************
00116   */
00117 
00118 
00119 /* Includes ------------------------------------------------------------------*/
00120 #include "stm32f30x_dac.h"
00121 #include "stm32f30x_rcc.h"
00122 
00123 /** @addtogroup STM32F30x_StdPeriph_Driver
00124   * @{
00125   */
00126 
00127 /** @defgroup DAC 
00128   * @brief DAC driver modules
00129   * @{
00130   */ 
00131 
00132 /* Private typedef -----------------------------------------------------------*/
00133 /* Private define ------------------------------------------------------------*/
00134 
00135 /* CR register Mask */
00136 #define CR_CLEAR_MASK              ((uint32_t)0x00000FFE)
00137 
00138 /* DAC Dual Channels SWTRIG masks */
00139 #define DUAL_SWTRIG_SET            ((uint32_t)0x00000003)
00140 #define DUAL_SWTRIG_RESET          ((uint32_t)0xFFFFFFFC)
00141 
00142 /* DHR registers offsets */
00143 #define DHR12R1_OFFSET             ((uint32_t)0x00000008)
00144 #define DHR12R2_OFFSET             ((uint32_t)0x00000014)
00145 #define DHR12RD_OFFSET             ((uint32_t)0x00000020)
00146 
00147 /* DOR register offset */
00148 #define DOR_OFFSET                 ((uint32_t)0x0000002C)
00149 
00150 /* Private macro -------------------------------------------------------------*/
00151 /* Private variables ---------------------------------------------------------*/
00152 /* Private function prototypes -----------------------------------------------*/
00153 /* Private functions ---------------------------------------------------------*/
00154 
00155 /** @defgroup DAC_Private_Functions
00156   * @{
00157   */
00158 
00159 /** @defgroup DAC_Group1 DAC channels configuration
00160  *  @brief   DAC channels configuration: trigger, output buffer, data format 
00161  *
00162 @verbatim   
00163  ===============================================================================
00164     ##### DAC channels configuration: trigger, output buffer, data format #####
00165  ===============================================================================  
00166 
00167 @endverbatim
00168   * @{
00169   */
00170 
00171 /**
00172   * @brief  Deinitializes the DAC peripheral registers to their default reset values.
00173   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00174   * @retval None
00175   */
00176 void DAC_DeInit(DAC_TypeDef* DACx)
00177 {
00178   /* Check the parameters */
00179   assert_param(IS_DAC_ALL_PERIPH(DACx));
00180 
00181   if (DACx == DAC1)
00182   {
00183     /* Enable DAC1 reset state */
00184     RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC1, ENABLE);
00185     /* Release DAC1 from reset state */
00186     RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC1, DISABLE);
00187   }
00188   else
00189   {
00190     /* Enable DAC2 reset state */
00191     RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC2, ENABLE);
00192     /* Release DAC2 from reset state */
00193     RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC2, DISABLE);
00194   }
00195 }
00196 
00197 /**
00198   * @brief  Initializes the DAC peripheral according to the specified 
00199   *         parameters in the DAC_InitStruct.
00200   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00201   * @param  DAC_Channel: the selected DAC channel. 
00202   *          This parameter can be one of the following values:
00203   *            @arg DAC_Channel_1: DAC Channel1 selected
00204   *            @arg DAC_Channel_2: DAC Channel2 selected
00205   * @param  DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
00206   *         contains the configuration information for the specified DAC channel.
00207   * @retval None
00208   */
00209 void DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
00210 {
00211   uint32_t tmpreg1 = 0, tmpreg2 = 0;
00212 
00213   /* Check the DAC parameters */
00214   assert_param(IS_DAC_ALL_PERIPH(DACx));
00215   assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
00216   assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
00217   assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
00218   assert_param(IS_DAC_BUFFER_SWITCH_STATE(DAC_InitStruct->DAC_Buffer_Switch));
00219 
00220 /*---------------------------- DAC CR Configuration --------------------------*/
00221   /* Get the DAC CR value */
00222   tmpreg1 = DACx->CR;
00223   /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
00224   tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel);
00225   /* Configure for the selected DAC channel: buffer output, trigger, wave generation,
00226      mask/amplitude for wave generation */
00227   
00228   /* Set TSELx and TENx bits according to DAC_Trigger value */
00229   /* Set WAVEx bits according to DAC_WaveGeneration value */
00230   /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */ 
00231   /* Set BOFFx OUTENx bit according to DAC_Buffer_Switch value */   
00232   tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
00233              DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_Buffer_Switch);   
00234                    
00235   /* Calculate CR register value depending on DAC_Channel */
00236   tmpreg1 |= tmpreg2 << DAC_Channel;
00237   /* Write to DAC CR */
00238   DACx->CR = tmpreg1;
00239 }
00240 
00241 /**
00242   * @brief  Fills each DAC_InitStruct member with its default value.
00243   * @param  DAC_InitStruct: pointer to a DAC_InitTypeDef structure which will 
00244   *         be initialized.
00245   * @retval None
00246   */
00247 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
00248 {
00249 /*--------------- Reset DAC init structure parameters values -----------------*/
00250   /* Initialize the DAC_Trigger member */
00251   DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
00252   /* Initialize the DAC_WaveGeneration member */
00253   DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
00254   /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
00255   DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
00256   /* Initialize the DAC_Buffer_Switch member */
00257   DAC_InitStruct->DAC_Buffer_Switch = DAC_BufferSwitch_Enable;
00258 }
00259 
00260 /**
00261   * @brief  Enables or disables the specified DAC channel.
00262   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00263   * @param  DAC_Channel: The selected DAC channel. 
00264   *          This parameter can be one of the following values:
00265   *            @arg DAC_Channel_1: DAC Channel1 selected
00266   *            @arg DAC_Channel_2: DAC Channel2 selected
00267   * @param  NewState: new state of the DAC channel. 
00268   *          This parameter can be: ENABLE or DISABLE.
00269   * @note   When the DAC channel is enabled the trigger source can no more
00270   *         be modified.
00271   * @retval None
00272   */
00273 void DAC_Cmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
00274 {
00275   /* Check the parameters */
00276   assert_param(IS_DAC_ALL_PERIPH(DACx));
00277   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00278   assert_param(IS_FUNCTIONAL_STATE(NewState));
00279 
00280   if (NewState != DISABLE)
00281   {
00282     /* Enable the selected DAC channel */
00283     DACx->CR |= (DAC_CR_EN1 << DAC_Channel);
00284   }
00285   else
00286   {
00287     /* Disable the selected DAC channel */
00288     DACx->CR &= (~(DAC_CR_EN1 << DAC_Channel));
00289   }
00290 }
00291 
00292 /**
00293   * @brief  Enables or disables the selected DAC channel software trigger.
00294   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00295   * @param  DAC_Channel: the selected DAC channel. 
00296   *          This parameter can be one of the following values:
00297   *            @arg DAC_Channel_1: DAC Channel1 selected
00298   *            @arg DAC_Channel_2: DAC Channel2 selected
00299   * @param  NewState: new state of the selected DAC channel software trigger.
00300   *          This parameter can be: ENABLE or DISABLE.
00301   * @retval None
00302   */
00303 void DAC_SoftwareTriggerCmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
00304 {
00305   /* Check the parameters */
00306   assert_param(IS_DAC_ALL_PERIPH(DACx));
00307   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00308   assert_param(IS_FUNCTIONAL_STATE(NewState));
00309 
00310   if (NewState != DISABLE)
00311   {
00312     /* Enable software trigger for the selected DAC channel */
00313     DACx->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4);
00314   }
00315   else
00316   {
00317     /* Disable software trigger for the selected DAC channel */
00318     DACx->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4));
00319   }
00320 }
00321 
00322 /**
00323   * @brief  Enables or disables simultaneously the two DAC channels software
00324   *         triggers.
00325   * @param  DACx: where x can be 1 to select the DAC1 peripheral.
00326   * @note   Dual trigger is not applicable for DAC2 (DAC2 integrates one channel).
00327   * @param  NewState: new state of the DAC channels software triggers.
00328   *          This parameter can be: ENABLE or DISABLE.
00329   * @retval None
00330   */
00331 void DAC_DualSoftwareTriggerCmd(DAC_TypeDef* DACx, FunctionalState NewState)
00332 {
00333   /* Check the parameters */
00334   assert_param(IS_DAC_LIST1_PERIPH(DACx));
00335   assert_param(IS_FUNCTIONAL_STATE(NewState));
00336 
00337   if (NewState != DISABLE)
00338   {
00339     /* Enable software trigger for both DAC channels */
00340     DACx->SWTRIGR |= DUAL_SWTRIG_SET;
00341   }
00342   else
00343   {
00344     /* Disable software trigger for both DAC channels */
00345     DACx->SWTRIGR &= DUAL_SWTRIG_RESET;
00346   }
00347 }
00348 
00349 /**
00350   * @brief  Enables or disables the selected DAC channel wave generation.
00351   * @param  DACx: where x can be 1 to select the DAC1 peripheral.
00352   * @note   Wave generation is not available in DAC2.
00353   * @param  DAC_Channel: the selected DAC channel. 
00354   *          This parameter can be one of the following values:
00355   *            @arg DAC_Channel_1: DAC Channel1 selected
00356   *            @arg DAC_Channel_2: DAC Channel2 selected
00357   * @param  DAC_Wave: Specifies the wave type to enable or disable.
00358   *          This parameter can be one of the following values:
00359   *            @arg DAC_Wave_Noise: noise wave generation
00360   *            @arg DAC_Wave_Triangle: triangle wave generation
00361   * @param  NewState: new state of the selected DAC channel wave generation.
00362   *          This parameter can be: ENABLE or DISABLE.
00363   * @note   
00364   * @retval None
00365   */
00366 void DAC_WaveGenerationCmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
00367 {
00368   /* Check the parameters */
00369   assert_param(IS_DAC_LIST1_PERIPH(DACx));
00370   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00371   assert_param(IS_DAC_WAVE(DAC_Wave)); 
00372   assert_param(IS_FUNCTIONAL_STATE(NewState));
00373 
00374   if (NewState != DISABLE)
00375   {
00376     /* Enable the selected wave generation for the selected DAC channel */
00377     DACx->CR |= DAC_Wave << DAC_Channel;
00378   }
00379   else
00380   {
00381     /* Disable the selected wave generation for the selected DAC channel */
00382     DACx->CR &= ~(DAC_Wave << DAC_Channel);
00383   }
00384 }
00385 
00386 /**
00387   * @brief  Set the specified data holding register value for DAC channel1.
00388   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00389   * @param  DAC_Align: Specifies the data alignment for DAC channel1.
00390   *          This parameter can be one of the following values:
00391   *            @arg DAC_Align_8b_R: 8bit right data alignment selected
00392   *            @arg DAC_Align_12b_L: 12bit left data alignment selected
00393   *            @arg DAC_Align_12b_R: 12bit right data alignment selected
00394   * @param  Data: Data to be loaded in the selected data holding register.
00395   * @retval None
00396   */
00397 void DAC_SetChannel1Data(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data)
00398 {  
00399   __IO uint32_t tmp = 0;
00400   
00401   /* Check the parameters */
00402   assert_param(IS_DAC_ALL_PERIPH(DACx));
00403   assert_param(IS_DAC_ALIGN(DAC_Align));
00404   assert_param(IS_DAC_DATA(Data));
00405   
00406   tmp = (uint32_t)DACx; 
00407   tmp += DHR12R1_OFFSET + DAC_Align;
00408 
00409   /* Set the DAC channel1 selected data holding register */
00410   *(__IO uint32_t *) tmp = Data;
00411 }
00412 
00413 /**
00414   * @brief  Set the specified data holding register value for DAC channel2.
00415   * @param  DACx: where x can be 1 to select the DAC peripheral.
00416   * @note   This function is available only for DAC1.
00417   * @param  DAC_Align: Specifies the data alignment for DAC channel2.
00418   *          This parameter can be one of the following values:
00419   *            @arg DAC_Align_8b_R: 8bit right data alignment selected
00420   *            @arg DAC_Align_12b_L: 12bit left data alignment selected
00421   *            @arg DAC_Align_12b_R: 12bit right data alignment selected
00422   * @param  Data : Data to be loaded in the selected data holding register.
00423   * @retval None
00424   */
00425 void DAC_SetChannel2Data(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data)
00426 {
00427   __IO uint32_t tmp = 0;
00428 
00429   /* Check the parameters */
00430   assert_param(IS_DAC_LIST1_PERIPH(DACx));
00431   assert_param(IS_DAC_ALIGN(DAC_Align));
00432   assert_param(IS_DAC_DATA(Data));
00433   
00434   tmp = (uint32_t)DACx;
00435   tmp += DHR12R2_OFFSET + DAC_Align;
00436 
00437   /* Set the DAC channel2 selected data holding register */
00438   *(__IO uint32_t *)tmp = Data;
00439 }
00440 
00441 /**
00442   * @brief  Set the specified data holding register value for dual channel DAC.
00443   * @param  DACx: where x can be 1 to select the DAC peripheral.
00444   * @note   This function isn't applicable for DAC2.
00445   * @param  DAC_Align: Specifies the data alignment for dual channel DAC.
00446   *          This parameter can be one of the following values:
00447   *            @arg DAC_Align_8b_R: 8bit right data alignment selected
00448   *            @arg DAC_Align_12b_L: 12bit left data alignment selected
00449   *            @arg DAC_Align_12b_R: 12bit right data alignment selected
00450   * @param  Data2: Data for DAC Channel2 to be loaded in the selected data 
00451   *         holding register.
00452   * @param  Data1: Data for DAC Channel1 to be loaded in the selected data 
00453   *         holding register.
00454   * @note In dual mode, a unique register access is required to write in both
00455   *       DAC channels at the same time.
00456   * @retval None
00457   */
00458 void DAC_SetDualChannelData(DAC_TypeDef* DACx, uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
00459 {
00460   uint32_t data = 0, tmp = 0;
00461   
00462   /* Check the parameters */
00463   assert_param(IS_DAC_LIST1_PERIPH(DACx));
00464   assert_param(IS_DAC_ALIGN(DAC_Align));
00465   assert_param(IS_DAC_DATA(Data1));
00466   assert_param(IS_DAC_DATA(Data2));
00467   
00468   /* Calculate and set dual DAC data holding register value */
00469   if (DAC_Align == DAC_Align_8b_R)
00470   {
00471     data = ((uint32_t)Data2 << 8) | Data1; 
00472   }
00473   else
00474   {
00475     data = ((uint32_t)Data2 << 16) | Data1;
00476   }
00477   
00478   tmp = (uint32_t)DACx;
00479   tmp += DHR12RD_OFFSET + DAC_Align;
00480 
00481   /* Set the dual DAC selected data holding register */
00482   *(__IO uint32_t *)tmp = data;
00483 }
00484 
00485 /**
00486   * @brief  Returns the last data output value of the selected DAC channel.
00487   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00488   * @param  DAC_Channel: the selected DAC channel. 
00489   *          This parameter can be one of the following values:
00490   *            @arg DAC_Channel_1: DAC Channel1 selected
00491   *            @arg DAC_Channel_2: DAC Channel2 selected
00492   * @retval The selected DAC channel data output value.
00493   */
00494 uint16_t DAC_GetDataOutputValue(DAC_TypeDef* DACx, uint32_t DAC_Channel)
00495 {
00496   __IO uint32_t tmp = 0;
00497   
00498   /* Check the parameters */
00499   assert_param(IS_DAC_ALL_PERIPH(DACx));
00500   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00501   
00502   tmp = (uint32_t) DACx;
00503   tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2);
00504   
00505   /* Returns the DAC channel data output register value */
00506   return (uint16_t) (*(__IO uint32_t*) tmp);
00507 }
00508 
00509 /**
00510   * @}
00511   */
00512 
00513 /** @defgroup DAC_Group2 DMA management functions
00514  *  @brief   DMA management functions
00515  *
00516 @verbatim   
00517  ===============================================================================
00518                     ##### DMA management functions #####
00519  =============================================================================== 
00520 
00521 @endverbatim
00522   * @{
00523   */
00524 
00525 /**
00526   * @brief  Enables or disables the specified DAC channel DMA request.
00527   *         When enabled DMA1 is generated when an external trigger (EXTI Line9,
00528   *         TIM2, TIM4, TIM6, TIM7 or TIM9  but not a software trigger) occurs
00529   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.
00530   * @param  DAC_Channel: the selected DAC channel.
00531   *          This parameter can be one of the following values:
00532   *            @arg DAC_Channel_1: DAC Channel1 selected
00533   *            @arg DAC_Channel_2: DAC Channel2 selected
00534   * @param  NewState: new state of the selected DAC channel DMA request.
00535   *          This parameter can be: ENABLE or DISABLE.
00536   * @note The DAC channel1 (channel2) is mapped on DMA1 channel3 (channel4) which 
00537   *       must be already configured. 
00538   * @retval None
00539   */
00540 void DAC_DMACmd(DAC_TypeDef* DACx, uint32_t DAC_Channel, FunctionalState NewState)
00541 {
00542   /* Check the parameters */
00543   assert_param(IS_DAC_ALL_PERIPH(DACx));
00544   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00545   assert_param(IS_FUNCTIONAL_STATE(NewState));
00546 
00547   if (NewState != DISABLE)
00548   {
00549     /* Enable the selected DAC channel DMA request */
00550     DACx->CR |= (DAC_CR_DMAEN1 << DAC_Channel);
00551   }
00552   else
00553   {
00554     /* Disable the selected DAC channel DMA request */
00555     DACx->CR &= (~(DAC_CR_DMAEN1 << DAC_Channel));
00556   }
00557 }
00558 
00559 /**
00560   * @}
00561   */
00562 
00563 /** @defgroup DAC_Group3 Interrupts and flags management functions
00564  *  @brief   Interrupts and flags management functions
00565  *
00566 @verbatim   
00567  ===============================================================================
00568             ##### Interrupts and flags management functions #####
00569  ===============================================================================
00570 
00571 @endverbatim
00572   * @{
00573   */
00574 
00575 /**
00576   * @brief  Enables or disables the specified DAC interrupts.
00577   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00578   * @param  DAC_Channel: the selected DAC channel. 
00579   *          This parameter can be one of the following values:
00580   *            @arg DAC_Channel_1: DAC Channel1 selected
00581   *            @arg DAC_Channel_2: DAC Channel2 selected
00582   * @param  DAC_IT: specifies the DAC interrupt sources to be enabled or disabled. 
00583   *          This parameter can be:
00584   *            @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
00585   * @note   The DMA underrun occurs when a second external trigger arrives before
00586   *         the acknowledgement for the first external trigger is received (first request).
00587   * @param  NewState: new state of the specified DAC interrupts.
00588   *          This parameter can be: ENABLE or DISABLE.
00589   * @retval None
00590   */ 
00591 void DAC_ITConfig(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)  
00592 {
00593   /* Check the parameters */
00594   assert_param(IS_DAC_ALL_PERIPH(DACx));
00595   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00596   assert_param(IS_FUNCTIONAL_STATE(NewState));
00597   assert_param(IS_DAC_IT(DAC_IT)); 
00598 
00599   if (NewState != DISABLE)
00600   {
00601     /* Enable the selected DAC interrupts */
00602     DACx->CR |=  (DAC_IT << DAC_Channel);
00603   }
00604   else
00605   {
00606     /* Disable the selected DAC interrupts */
00607     DACx->CR &= (~(uint32_t)(DAC_IT << DAC_Channel));
00608   }
00609 }
00610 
00611 /**
00612   * @brief  Checks whether the specified DAC flag is set or not.
00613   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00614   * @param  DAC_Channel: thee selected DAC channel. 
00615   *          This parameter can be one of the following values:
00616   *            @arg DAC_Channel_1: DAC Channel1 selected
00617   *            @arg DAC_Channel_2: DAC Channel2 selected
00618   * @param  DAC_FLAG: specifies the flag to check. 
00619   *          This parameter can be:
00620   *            @arg DAC_FLAG_DMAUDR: DMA underrun flag
00621   * @note   The DMA underrun occurs when a second external trigger arrives before
00622   *         the acknowledgement for the first external trigger is received (first request).
00623   * @retval The new state of DAC_FLAG (SET or RESET).
00624   */
00625 FlagStatus DAC_GetFlagStatus(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_FLAG)
00626 {
00627   FlagStatus bitstatus = RESET;
00628 
00629   /* Check the parameters */
00630   assert_param(IS_DAC_ALL_PERIPH(DACx));
00631   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00632   assert_param(IS_DAC_FLAG(DAC_FLAG));
00633 
00634   /* Check the status of the specified DAC flag */
00635   if ((DACx->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET)
00636   {
00637     /* DAC_FLAG is set */
00638     bitstatus = SET;
00639   }
00640   else
00641   {
00642     /* DAC_FLAG is reset */
00643     bitstatus = RESET;
00644   }
00645   /* Return the DAC_FLAG status */
00646   return  bitstatus;
00647 }
00648 
00649 /**
00650   * @brief  Clears the DAC channel's pending flags.
00651   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00652   * @param  DAC_Channel: the selected DAC channel. 
00653   *          This parameter can be one of the following values:
00654   *            @arg DAC_Channel_1: DAC Channel1 selected
00655   *            @arg DAC_Channel_2: DAC Channel2 selected
00656   * @param  DAC_FLAG: specifies the flag to clear. 
00657   *          This parameter can be:
00658   *            @arg DAC_FLAG_DMAUDR: DMA underrun flag                          
00659   * @retval None
00660   */
00661 void DAC_ClearFlag(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_FLAG)
00662 {
00663   /* Check the parameters */
00664   assert_param(IS_DAC_ALL_PERIPH(DACx));
00665   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00666   assert_param(IS_DAC_FLAG(DAC_FLAG));
00667 
00668   /* Clear the selected DAC flags */
00669   DACx->SR = (DAC_FLAG << DAC_Channel);
00670 }
00671 
00672 /**
00673   * @brief  Checks whether the specified DAC interrupt has occurred or not.
00674   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.  
00675   * @param  DAC_Channel: the selected DAC channel. 
00676   *          This parameter can be one of the following values:
00677   *            @arg DAC_Channel_1: DAC Channel1 selected
00678   *            @arg DAC_Channel_2: DAC Channel2 selected
00679   * @param  DAC_IT: specifies the DAC interrupt source to check. 
00680   *          This parameter can be:
00681   *            @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
00682   * @note   The DMA underrun occurs when a second external trigger arrives before
00683   *         the acknowledgement for the first external trigger is received (first request).
00684   * @retval The new state of DAC_IT (SET or RESET).
00685   */
00686 ITStatus DAC_GetITStatus(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT)
00687 {
00688   ITStatus bitstatus = RESET;
00689   uint32_t enablestatus = 0;
00690   
00691   /* Check the parameters */
00692   assert_param(IS_DAC_ALL_PERIPH(DACx));
00693   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00694   assert_param(IS_DAC_IT(DAC_IT));
00695 
00696   /* Get the DAC_IT enable bit status */
00697   enablestatus = (DACx->CR & (DAC_IT << DAC_Channel)) ;
00698   
00699   /* Check the status of the specified DAC interrupt */
00700   if (((DACx->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus)
00701   {
00702     /* DAC_IT is set */
00703     bitstatus = SET;
00704   }
00705   else
00706   {
00707     /* DAC_IT is reset */
00708     bitstatus = RESET;
00709   }
00710   /* Return the DAC_IT status */
00711   return  bitstatus;
00712 }
00713 
00714 /**
00715   * @brief  Clears the DAC channel's interrupt pending bits.
00716   * @param  DACx: where x can be 1 or 2 to select the DAC peripheral.
00717   * @param  DAC_Channel: the selected DAC channel. 
00718   *          This parameter can be one of the following values:
00719   *            @arg DAC_Channel_1: DAC Channel1 selected
00720   *            @arg DAC_Channel_2: DAC Channel2 selected
00721   * @param  DAC_IT: specifies the DAC interrupt pending bit to clear.
00722   *          This parameter can be the following values:
00723   *            @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
00724   * @retval None
00725   */
00726 void DAC_ClearITPendingBit(DAC_TypeDef* DACx, uint32_t DAC_Channel, uint32_t DAC_IT)
00727 {
00728   /* Check the parameters */
00729   assert_param(IS_DAC_ALL_PERIPH(DACx));
00730   assert_param(IS_DAC_CHANNEL(DAC_Channel));
00731   assert_param(IS_DAC_IT(DAC_IT)); 
00732 
00733   /* Clear the selected DAC interrupt pending bits */
00734   DACx->SR = (DAC_IT << DAC_Channel);
00735 }
00736 
00737 /**
00738   * @}
00739   */
00740 
00741 /**
00742   * @}
00743   */ 
00744 
00745 /**
00746   * @}
00747   */ 
00748 
00749 /**
00750   * @}
00751   */ 
00752 
00753 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00754