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STM32F3-Discovery
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stm32f30x_can.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f30x_can.c 00004 * @author MCD Application Team 00005 * @version V1.2.3 00006 * @date 10-July-2015 00007 * @brief This file provides firmware functions to manage the following 00008 * functionalities of the Controller area network (CAN) peripheral: 00009 * + Initialization and Configuration 00010 * + CAN Frames Transmission 00011 * + CAN Frames Reception 00012 * + Operation modes switch 00013 * + Error management 00014 * + Interrupts and flags 00015 * 00016 @verbatim 00017 00018 =============================================================================== 00019 ##### How to use this driver ##### 00020 =============================================================================== 00021 [..] 00022 (#) Enable the CAN controller interface clock using 00023 RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE); 00024 (#) CAN pins configuration: 00025 (++) Enable the clock for the CAN GPIOs using the following function: 00026 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOx, ENABLE); 00027 (++) Connect the involved CAN pins to AF9 using the following function 00028 GPIO_PinAFConfig(GPIOx, GPIO_PinSourcex, GPIO_AF_CANx); 00029 (++) Configure these CAN pins in alternate function mode by calling 00030 the function GPIO_Init(); 00031 (#) Initialize and configure the CAN using CAN_Init() and 00032 CAN_FilterInit() functions. 00033 (#) Transmit the desired CAN frame using CAN_Transmit() function. 00034 (#) Check the transmission of a CAN frame using CAN_TransmitStatus() function. 00035 (#) Cancel the transmission of a CAN frame using CAN_CancelTransmit() function. 00036 (#) Receive a CAN frame using CAN_Recieve() function. 00037 (#) Release the receive FIFOs using CAN_FIFORelease() function. 00038 (#) Return the number of pending received frames using CAN_MessagePending() function. 00039 (#) To control CAN events you can use one of the following two methods: 00040 (++) Check on CAN flags using the CAN_GetFlagStatus() function. 00041 (++) Use CAN interrupts through the function CAN_ITConfig() at initialization 00042 phase and CAN_GetITStatus() function into interrupt routines to check 00043 if the event has occurred or not. 00044 After checking on a flag you should clear it using CAN_ClearFlag() 00045 function. And after checking on an interrupt event you should clear it 00046 using CAN_ClearITPendingBit() function. 00047 00048 @endverbatim 00049 * 00050 ****************************************************************************** 00051 * @attention 00052 * 00053 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> 00054 * 00055 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 00056 * You may not use this file except in compliance with the License. 00057 * You may obtain a copy of the License at: 00058 * 00059 * http://www.st.com/software_license_agreement_liberty_v2 00060 * 00061 * Unless required by applicable law or agreed to in writing, software 00062 * distributed under the License is distributed on an "AS IS" BASIS, 00063 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00064 * See the License for the specific language governing permissions and 00065 * limitations under the License. 00066 * 00067 ****************************************************************************** 00068 */ 00069 00070 /* Includes ------------------------------------------------------------------*/ 00071 #include "stm32f30x_can.h" 00072 #include "stm32f30x_rcc.h" 00073 00074 /** @addtogroup STM32F30x_StdPeriph_Driver 00075 * @{ 00076 */ 00077 00078 /** @defgroup CAN 00079 * @brief CAN driver modules 00080 * @{ 00081 */ 00082 /* Private typedef -----------------------------------------------------------*/ 00083 /* Private define ------------------------------------------------------------*/ 00084 00085 /* CAN Master Control Register bits */ 00086 #define MCR_DBF ((uint32_t)0x00010000) /* software master reset */ 00087 00088 /* CAN Mailbox Transmit Request */ 00089 #define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ 00090 00091 /* CAN Filter Master Register bits */ 00092 #define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */ 00093 00094 /* Time out for INAK bit */ 00095 #define INAK_TIMEOUT ((uint32_t)0x00FFFFFF) 00096 /* Time out for SLAK bit */ 00097 #define SLAK_TIMEOUT ((uint32_t)0x00FFFFFF) 00098 00099 /* Flags in TSR register */ 00100 #define CAN_FLAGS_TSR ((uint32_t)0x08000000) 00101 /* Flags in RF1R register */ 00102 #define CAN_FLAGS_RF1R ((uint32_t)0x04000000) 00103 /* Flags in RF0R register */ 00104 #define CAN_FLAGS_RF0R ((uint32_t)0x02000000) 00105 /* Flags in MSR register */ 00106 #define CAN_FLAGS_MSR ((uint32_t)0x01000000) 00107 /* Flags in ESR register */ 00108 #define CAN_FLAGS_ESR ((uint32_t)0x00F00000) 00109 00110 /* Mailboxes definition */ 00111 #define CAN_TXMAILBOX_0 ((uint8_t)0x00) 00112 #define CAN_TXMAILBOX_1 ((uint8_t)0x01) 00113 #define CAN_TXMAILBOX_2 ((uint8_t)0x02) 00114 00115 #define CAN_MODE_MASK ((uint32_t) 0x00000003) 00116 00117 /* Private macro -------------------------------------------------------------*/ 00118 /* Private variables ---------------------------------------------------------*/ 00119 /* Private function prototypes -----------------------------------------------*/ 00120 /* Private functions ---------------------------------------------------------*/ 00121 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit); 00122 00123 /** @defgroup CAN_Private_Functions 00124 * @{ 00125 */ 00126 00127 /** @defgroup CAN_Group1 Initialization and Configuration functions 00128 * @brief Initialization and Configuration functions 00129 * 00130 @verbatim 00131 =============================================================================== 00132 ##### Initialization and Configuration functions ##### 00133 =============================================================================== 00134 [..] This section provides functions allowing to: 00135 (+) Initialize the CAN peripherals : Prescaler, operating mode, the maximum 00136 number of time quanta to perform resynchronization, the number of time 00137 quanta in Bit Segment 1 and 2 and many other modes. 00138 (+) Configure the CAN reception filter. 00139 (+) Select the start bank filter for slave CAN. 00140 (+) Enable or disable the Debug Freeze mode for CAN. 00141 (+) Enable or disable the CAN Time Trigger Operation communication mode. 00142 00143 @endverbatim 00144 * @{ 00145 */ 00146 00147 /** 00148 * @brief Deinitializes the CAN peripheral registers to their default reset values. 00149 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00150 * @retval None. 00151 */ 00152 void CAN_DeInit(CAN_TypeDef* CANx) 00153 { 00154 /* Check the parameters */ 00155 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00156 00157 /* Enable CAN1 reset state */ 00158 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); 00159 /* Release CAN1 from reset state */ 00160 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); 00161 } 00162 00163 /** 00164 * @brief Initializes the CAN peripheral according to the specified 00165 * parameters in the CAN_InitStruct. 00166 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00167 * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that contains 00168 * the configuration information for the CAN peripheral. 00169 * @retval Constant indicates initialization succeed which will be 00170 * CAN_InitStatus_Failed or CAN_InitStatus_Success. 00171 */ 00172 uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct) 00173 { 00174 uint8_t InitStatus = CAN_InitStatus_Failed; 00175 __IO uint32_t wait_ack = 0x00000000; 00176 /* Check the parameters */ 00177 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00178 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM)); 00179 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM)); 00180 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM)); 00181 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART)); 00182 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM)); 00183 assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP)); 00184 assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode)); 00185 assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW)); 00186 assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1)); 00187 assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2)); 00188 assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler)); 00189 00190 /* Exit from sleep mode */ 00191 CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP); 00192 00193 /* Request initialisation */ 00194 CANx->MCR |= CAN_MCR_INRQ ; 00195 00196 /* Wait the acknowledge */ 00197 while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) 00198 { 00199 wait_ack++; 00200 } 00201 00202 /* Check acknowledge */ 00203 if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) 00204 { 00205 InitStatus = CAN_InitStatus_Failed; 00206 } 00207 else 00208 { 00209 /* Set the time triggered communication mode */ 00210 if (CAN_InitStruct->CAN_TTCM == ENABLE) 00211 { 00212 CANx->MCR |= CAN_MCR_TTCM; 00213 } 00214 else 00215 { 00216 CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM; 00217 } 00218 00219 /* Set the automatic bus-off management */ 00220 if (CAN_InitStruct->CAN_ABOM == ENABLE) 00221 { 00222 CANx->MCR |= CAN_MCR_ABOM; 00223 } 00224 else 00225 { 00226 CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM; 00227 } 00228 00229 /* Set the automatic wake-up mode */ 00230 if (CAN_InitStruct->CAN_AWUM == ENABLE) 00231 { 00232 CANx->MCR |= CAN_MCR_AWUM; 00233 } 00234 else 00235 { 00236 CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM; 00237 } 00238 00239 /* Set the no automatic retransmission */ 00240 if (CAN_InitStruct->CAN_NART == ENABLE) 00241 { 00242 CANx->MCR |= CAN_MCR_NART; 00243 } 00244 else 00245 { 00246 CANx->MCR &= ~(uint32_t)CAN_MCR_NART; 00247 } 00248 00249 /* Set the receive FIFO locked mode */ 00250 if (CAN_InitStruct->CAN_RFLM == ENABLE) 00251 { 00252 CANx->MCR |= CAN_MCR_RFLM; 00253 } 00254 else 00255 { 00256 CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM; 00257 } 00258 00259 /* Set the transmit FIFO priority */ 00260 if (CAN_InitStruct->CAN_TXFP == ENABLE) 00261 { 00262 CANx->MCR |= CAN_MCR_TXFP; 00263 } 00264 else 00265 { 00266 CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP; 00267 } 00268 00269 /* Set the bit timing register */ 00270 CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \ 00271 ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \ 00272 ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \ 00273 ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \ 00274 ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1); 00275 00276 /* Request leave initialisation */ 00277 CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ; 00278 00279 /* Wait the acknowledge */ 00280 wait_ack = 0; 00281 00282 while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) 00283 { 00284 wait_ack++; 00285 } 00286 00287 /* ...and check acknowledged */ 00288 if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) 00289 { 00290 InitStatus = CAN_InitStatus_Failed; 00291 } 00292 else 00293 { 00294 InitStatus = CAN_InitStatus_Success ; 00295 } 00296 } 00297 00298 /* At this step, return the status of initialization */ 00299 return InitStatus; 00300 } 00301 00302 /** 00303 * @brief Configures the CAN reception filter according to the specified 00304 * parameters in the CAN_FilterInitStruct. 00305 * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef structure that 00306 * contains the configuration information. 00307 * @retval None 00308 */ 00309 void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct) 00310 { 00311 uint32_t filter_number_bit_pos = 0; 00312 /* Check the parameters */ 00313 assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber)); 00314 assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode)); 00315 assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale)); 00316 assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment)); 00317 assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation)); 00318 00319 filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber; 00320 00321 /* Initialisation mode for the filter */ 00322 CAN1->FMR |= FMR_FINIT; 00323 00324 /* Filter Deactivation */ 00325 CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos; 00326 00327 /* Filter Scale */ 00328 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit) 00329 { 00330 /* 16-bit scale for the filter */ 00331 CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos; 00332 00333 /* First 16-bit identifier and First 16-bit mask */ 00334 /* Or First 16-bit identifier and Second 16-bit identifier */ 00335 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = 00336 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) | 00337 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); 00338 00339 /* Second 16-bit identifier and Second 16-bit mask */ 00340 /* Or Third 16-bit identifier and Fourth 16-bit identifier */ 00341 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = 00342 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | 00343 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh); 00344 } 00345 00346 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit) 00347 { 00348 /* 32-bit scale for the filter */ 00349 CAN1->FS1R |= filter_number_bit_pos; 00350 /* 32-bit identifier or First 32-bit identifier */ 00351 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = 00352 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) | 00353 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); 00354 /* 32-bit mask or Second 32-bit identifier */ 00355 CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = 00356 ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | 00357 (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow); 00358 } 00359 00360 /* Filter Mode */ 00361 if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask) 00362 { 00363 /*Id/Mask mode for the filter*/ 00364 CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos; 00365 } 00366 else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ 00367 { 00368 /*Identifier list mode for the filter*/ 00369 CAN1->FM1R |= (uint32_t)filter_number_bit_pos; 00370 } 00371 00372 /* Filter FIFO assignment */ 00373 if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0) 00374 { 00375 /* FIFO 0 assignation for the filter */ 00376 CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos; 00377 } 00378 00379 if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1) 00380 { 00381 /* FIFO 1 assignation for the filter */ 00382 CAN1->FFA1R |= (uint32_t)filter_number_bit_pos; 00383 } 00384 00385 /* Filter activation */ 00386 if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE) 00387 { 00388 CAN1->FA1R |= filter_number_bit_pos; 00389 } 00390 00391 /* Leave the initialisation mode for the filter */ 00392 CAN1->FMR &= ~FMR_FINIT; 00393 } 00394 00395 /** 00396 * @brief Fills each CAN_InitStruct member with its default value. 00397 * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which ill be initialized. 00398 * @retval None 00399 */ 00400 void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct) 00401 { 00402 /* Reset CAN init structure parameters values */ 00403 00404 /* Initialize the time triggered communication mode */ 00405 CAN_InitStruct->CAN_TTCM = DISABLE; 00406 00407 /* Initialize the automatic bus-off management */ 00408 CAN_InitStruct->CAN_ABOM = DISABLE; 00409 00410 /* Initialize the automatic wake-up mode */ 00411 CAN_InitStruct->CAN_AWUM = DISABLE; 00412 00413 /* Initialize the no automatic retransmission */ 00414 CAN_InitStruct->CAN_NART = DISABLE; 00415 00416 /* Initialize the receive FIFO locked mode */ 00417 CAN_InitStruct->CAN_RFLM = DISABLE; 00418 00419 /* Initialize the transmit FIFO priority */ 00420 CAN_InitStruct->CAN_TXFP = DISABLE; 00421 00422 /* Initialize the CAN_Mode member */ 00423 CAN_InitStruct->CAN_Mode = CAN_Mode_Normal; 00424 00425 /* Initialize the CAN_SJW member */ 00426 CAN_InitStruct->CAN_SJW = CAN_SJW_1tq; 00427 00428 /* Initialize the CAN_BS1 member */ 00429 CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq; 00430 00431 /* Initialize the CAN_BS2 member */ 00432 CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq; 00433 00434 /* Initialize the CAN_Prescaler member */ 00435 CAN_InitStruct->CAN_Prescaler = 1; 00436 } 00437 00438 /** 00439 * @brief Select the start bank filter for slave CAN. 00440 * @param CAN_BankNumber: Select the start slave bank filter from 1..27. 00441 * @retval None 00442 */ 00443 void CAN_SlaveStartBank(uint8_t CAN_BankNumber) 00444 { 00445 /* Check the parameters */ 00446 assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber)); 00447 00448 /* Enter Initialisation mode for the filter */ 00449 CAN1->FMR |= FMR_FINIT; 00450 00451 /* Select the start slave bank */ 00452 CAN1->FMR &= (uint32_t)0xFFFFC0F1 ; 00453 CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8; 00454 00455 /* Leave Initialisation mode for the filter */ 00456 CAN1->FMR &= ~FMR_FINIT; 00457 } 00458 00459 /** 00460 * @brief Enables or disables the DBG Freeze for CAN. 00461 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 00462 * @param NewState: new state of the CAN peripheral. 00463 * This parameter can be: ENABLE (CAN reception/transmission is frozen 00464 * during debug. Reception FIFOs can still be accessed/controlled normally) 00465 * or DISABLE (CAN is working during debug). 00466 * @retval None 00467 */ 00468 void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState) 00469 { 00470 /* Check the parameters */ 00471 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00472 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00473 00474 if (NewState != DISABLE) 00475 { 00476 /* Enable Debug Freeze */ 00477 CANx->MCR |= MCR_DBF; 00478 } 00479 else 00480 { 00481 /* Disable Debug Freeze */ 00482 CANx->MCR &= ~MCR_DBF; 00483 } 00484 } 00485 00486 /** 00487 * @brief Enables or disables the CAN Time TriggerOperation communication mode. 00488 * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be 00489 * sent over the CAN bus. 00490 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 00491 * @param NewState: Mode new state. This parameter can be: ENABLE or DISABLE. 00492 * When enabled, Time stamp (TIME[15:0]) value is sent in the last two 00493 * data bytes of the 8-byte message: TIME[7:0] in data byte 6 and TIME[15:8] 00494 * in data byte 7. 00495 * @retval None 00496 */ 00497 void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState) 00498 { 00499 /* Check the parameters */ 00500 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00501 assert_param(IS_FUNCTIONAL_STATE(NewState)); 00502 if (NewState != DISABLE) 00503 { 00504 /* Enable the TTCM mode */ 00505 CANx->MCR |= CAN_MCR_TTCM; 00506 00507 /* Set TGT bits */ 00508 CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT); 00509 CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT); 00510 CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT); 00511 } 00512 else 00513 { 00514 /* Disable the TTCM mode */ 00515 CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM); 00516 00517 /* Reset TGT bits */ 00518 CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT); 00519 CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT); 00520 CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT); 00521 } 00522 } 00523 /** 00524 * @} 00525 */ 00526 00527 00528 /** @defgroup CAN_Group2 CAN Frames Transmission functions 00529 * @brief CAN Frames Transmission functions 00530 * 00531 @verbatim 00532 =============================================================================== 00533 ##### CAN Frames Transmission functions ##### 00534 =============================================================================== 00535 [..] This section provides functions allowing to 00536 (+) Initiate and transmit a CAN frame message (if there is an empty mailbox). 00537 (+) Check the transmission status of a CAN Frame. 00538 (+) Cancel a transmit request. 00539 00540 @endverbatim 00541 * @{ 00542 */ 00543 00544 /** 00545 * @brief Initiates and transmits a CAN frame message. 00546 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 00547 * @param TxMessage: pointer to a structure which contains CAN Id, CAN DLC and CAN data. 00548 * @retval The number of the mailbox that is used for transmission or 00549 * CAN_TxStatus_NoMailBox if there is no empty mailbox. 00550 */ 00551 uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage) 00552 { 00553 uint8_t transmit_mailbox = 0; 00554 /* Check the parameters */ 00555 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00556 assert_param(IS_CAN_IDTYPE(TxMessage->IDE)); 00557 assert_param(IS_CAN_RTR(TxMessage->RTR)); 00558 assert_param(IS_CAN_DLC(TxMessage->DLC)); 00559 00560 /* Select one empty transmit mailbox */ 00561 if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) 00562 { 00563 transmit_mailbox = 0; 00564 } 00565 else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) 00566 { 00567 transmit_mailbox = 1; 00568 } 00569 else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) 00570 { 00571 transmit_mailbox = 2; 00572 } 00573 else 00574 { 00575 transmit_mailbox = CAN_TxStatus_NoMailBox; 00576 } 00577 00578 if (transmit_mailbox != CAN_TxStatus_NoMailBox) 00579 { 00580 /* Set up the Id */ 00581 CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ; 00582 if (TxMessage->IDE == CAN_Id_Standard) 00583 { 00584 assert_param(IS_CAN_STDID(TxMessage->StdId)); 00585 CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \ 00586 TxMessage->RTR); 00587 } 00588 else 00589 { 00590 assert_param(IS_CAN_EXTID(TxMessage->ExtId)); 00591 CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \ 00592 TxMessage->IDE | \ 00593 TxMessage->RTR); 00594 } 00595 00596 /* Set up the DLC */ 00597 TxMessage->DLC &= (uint8_t)0x0000000F; 00598 CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0; 00599 CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC; 00600 00601 /* Set up the data field */ 00602 CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | 00603 ((uint32_t)TxMessage->Data[2] << 16) | 00604 ((uint32_t)TxMessage->Data[1] << 8) | 00605 ((uint32_t)TxMessage->Data[0])); 00606 CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | 00607 ((uint32_t)TxMessage->Data[6] << 16) | 00608 ((uint32_t)TxMessage->Data[5] << 8) | 00609 ((uint32_t)TxMessage->Data[4])); 00610 /* Request transmission */ 00611 CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ; 00612 } 00613 return transmit_mailbox; 00614 } 00615 00616 /** 00617 * @brief Checks the transmission status of a CAN Frame. 00618 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00619 * @param TransmitMailbox: the number of the mailbox that is used for transmission. 00620 * @retval CAN_TxStatus_Ok if the CAN driver transmits the message, 00621 * CAN_TxStatus_Failed in an other case. 00622 */ 00623 uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox) 00624 { 00625 uint32_t state = 0; 00626 00627 /* Check the parameters */ 00628 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00629 assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox)); 00630 00631 switch (TransmitMailbox) 00632 { 00633 case (CAN_TXMAILBOX_0): 00634 state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0); 00635 break; 00636 case (CAN_TXMAILBOX_1): 00637 state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1); 00638 break; 00639 case (CAN_TXMAILBOX_2): 00640 state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2); 00641 break; 00642 default: 00643 state = CAN_TxStatus_Failed; 00644 break; 00645 } 00646 switch (state) 00647 { 00648 /* transmit pending */ 00649 case (0x0): state = CAN_TxStatus_Pending; 00650 break; 00651 /* transmit failed */ 00652 case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed; 00653 break; 00654 case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed; 00655 break; 00656 case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed; 00657 break; 00658 /* transmit succeeded */ 00659 case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok; 00660 break; 00661 case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok; 00662 break; 00663 case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok; 00664 break; 00665 default: state = CAN_TxStatus_Failed; 00666 break; 00667 } 00668 return (uint8_t) state; 00669 } 00670 00671 /** 00672 * @brief Cancels a transmit request. 00673 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00674 * @param Mailbox: Mailbox number. 00675 * @retval None 00676 */ 00677 void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox) 00678 { 00679 /* Check the parameters */ 00680 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00681 assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox)); 00682 /* abort transmission */ 00683 switch (Mailbox) 00684 { 00685 case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0; 00686 break; 00687 case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1; 00688 break; 00689 case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2; 00690 break; 00691 default: 00692 break; 00693 } 00694 } 00695 /** 00696 * @} 00697 */ 00698 00699 00700 /** @defgroup CAN_Group3 CAN Frames Reception functions 00701 * @brief CAN Frames Reception functions 00702 * 00703 @verbatim 00704 =============================================================================== 00705 ##### CAN Frames Reception functions ##### 00706 =============================================================================== 00707 [..] This section provides functions allowing to 00708 (+) Receive a correct CAN frame. 00709 (+) Release a specified receive FIFO (2 FIFOs are available). 00710 (+) Return the number of the pending received CAN frames. 00711 00712 @endverbatim 00713 * @{ 00714 */ 00715 00716 /** 00717 * @brief Receives a correct CAN frame. 00718 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00719 * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 00720 * @param RxMessage: pointer to a structure receive frame which contains CAN Id, 00721 * CAN DLC, CAN data and FMI number. 00722 * @retval None 00723 */ 00724 void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage) 00725 { 00726 /* Check the parameters */ 00727 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00728 assert_param(IS_CAN_FIFO(FIFONumber)); 00729 /* Get the Id */ 00730 RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR; 00731 if (RxMessage->IDE == CAN_Id_Standard) 00732 { 00733 RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21); 00734 } 00735 else 00736 { 00737 RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3); 00738 } 00739 00740 RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR; 00741 /* Get the DLC */ 00742 RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR; 00743 /* Get the FMI */ 00744 RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8); 00745 /* Get the data field */ 00746 RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR; 00747 RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8); 00748 RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16); 00749 RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24); 00750 RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR; 00751 RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8); 00752 RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16); 00753 RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24); 00754 /* Release the FIFO */ 00755 /* Release FIFO0 */ 00756 if (FIFONumber == CAN_FIFO0) 00757 { 00758 CANx->RF0R |= CAN_RF0R_RFOM0; 00759 } 00760 /* Release FIFO1 */ 00761 else /* FIFONumber == CAN_FIFO1 */ 00762 { 00763 CANx->RF1R |= CAN_RF1R_RFOM1; 00764 } 00765 } 00766 00767 /** 00768 * @brief Releases the specified receive FIFO. 00769 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00770 * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1. 00771 * @retval None 00772 */ 00773 void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber) 00774 { 00775 /* Check the parameters */ 00776 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00777 assert_param(IS_CAN_FIFO(FIFONumber)); 00778 /* Release FIFO0 */ 00779 if (FIFONumber == CAN_FIFO0) 00780 { 00781 CANx->RF0R |= CAN_RF0R_RFOM0; 00782 } 00783 /* Release FIFO1 */ 00784 else /* FIFONumber == CAN_FIFO1 */ 00785 { 00786 CANx->RF1R |= CAN_RF1R_RFOM1; 00787 } 00788 } 00789 00790 /** 00791 * @brief Returns the number of pending received messages. 00792 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00793 * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 00794 * @retval NbMessage : which is the number of pending message. 00795 */ 00796 uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber) 00797 { 00798 uint8_t message_pending=0; 00799 /* Check the parameters */ 00800 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00801 assert_param(IS_CAN_FIFO(FIFONumber)); 00802 if (FIFONumber == CAN_FIFO0) 00803 { 00804 message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03); 00805 } 00806 else if (FIFONumber == CAN_FIFO1) 00807 { 00808 message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03); 00809 } 00810 else 00811 { 00812 message_pending = 0; 00813 } 00814 return message_pending; 00815 } 00816 /** 00817 * @} 00818 */ 00819 00820 00821 /** @defgroup CAN_Group4 CAN Operation modes functions 00822 * @brief CAN Operation modes functions 00823 * 00824 @verbatim 00825 =============================================================================== 00826 ##### CAN Operation modes functions ##### 00827 =============================================================================== 00828 [..] This section provides functions allowing to select the CAN Operation modes: 00829 (+) sleep mode. 00830 (+) normal mode. 00831 (+) initialization mode. 00832 00833 @endverbatim 00834 * @{ 00835 */ 00836 00837 00838 /** 00839 * @brief Selects the CAN Operation mode. 00840 * @param CAN_OperatingMode: CAN Operating Mode. 00841 * This parameter can be one of @ref CAN_OperatingMode_TypeDef enumeration. 00842 * @retval status of the requested mode which can be: 00843 * - CAN_ModeStatus_Failed: CAN failed entering the specific mode 00844 * - CAN_ModeStatus_Success: CAN Succeed entering the specific mode 00845 */ 00846 uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode) 00847 { 00848 uint8_t status = CAN_ModeStatus_Failed; 00849 00850 /* Timeout for INAK or also for SLAK bits*/ 00851 uint32_t timeout = INAK_TIMEOUT; 00852 00853 /* Check the parameters */ 00854 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00855 assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode)); 00856 00857 if (CAN_OperatingMode == CAN_OperatingMode_Initialization) 00858 { 00859 /* Request initialisation */ 00860 CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ); 00861 00862 /* Wait the acknowledge */ 00863 while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0)) 00864 { 00865 timeout--; 00866 } 00867 if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) 00868 { 00869 status = CAN_ModeStatus_Failed; 00870 } 00871 else 00872 { 00873 status = CAN_ModeStatus_Success; 00874 } 00875 } 00876 else if (CAN_OperatingMode == CAN_OperatingMode_Normal) 00877 { 00878 /* Request leave initialisation and sleep mode and enter Normal mode */ 00879 CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ)); 00880 00881 /* Wait the acknowledge */ 00882 while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0)) 00883 { 00884 timeout--; 00885 } 00886 if ((CANx->MSR & CAN_MODE_MASK) != 0) 00887 { 00888 status = CAN_ModeStatus_Failed; 00889 } 00890 else 00891 { 00892 status = CAN_ModeStatus_Success; 00893 } 00894 } 00895 else if (CAN_OperatingMode == CAN_OperatingMode_Sleep) 00896 { 00897 /* Request Sleep mode */ 00898 CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); 00899 00900 /* Wait the acknowledge */ 00901 while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0)) 00902 { 00903 timeout--; 00904 } 00905 if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) 00906 { 00907 status = CAN_ModeStatus_Failed; 00908 } 00909 else 00910 { 00911 status = CAN_ModeStatus_Success; 00912 } 00913 } 00914 else 00915 { 00916 status = CAN_ModeStatus_Failed; 00917 } 00918 00919 return (uint8_t) status; 00920 } 00921 00922 /** 00923 * @brief Enters the Sleep (low power) mode. 00924 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00925 * @retval CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed otherwise. 00926 */ 00927 uint8_t CAN_Sleep(CAN_TypeDef* CANx) 00928 { 00929 uint8_t sleepstatus = CAN_Sleep_Failed; 00930 00931 /* Check the parameters */ 00932 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00933 00934 /* Request Sleep mode */ 00935 CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); 00936 00937 /* Sleep mode status */ 00938 if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK) 00939 { 00940 /* Sleep mode not entered */ 00941 sleepstatus = CAN_Sleep_Ok; 00942 } 00943 /* return sleep mode status */ 00944 return (uint8_t)sleepstatus; 00945 } 00946 00947 /** 00948 * @brief Wakes up the CAN peripheral from sleep mode . 00949 * @param CANx: where x can be 1 to select the CAN1 peripheral. 00950 * @retval CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed otherwise. 00951 */ 00952 uint8_t CAN_WakeUp(CAN_TypeDef* CANx) 00953 { 00954 uint32_t wait_slak = SLAK_TIMEOUT; 00955 uint8_t wakeupstatus = CAN_WakeUp_Failed; 00956 00957 /* Check the parameters */ 00958 assert_param(IS_CAN_ALL_PERIPH(CANx)); 00959 00960 /* Wake up request */ 00961 CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP; 00962 00963 /* Sleep mode status */ 00964 while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00)) 00965 { 00966 wait_slak--; 00967 } 00968 if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK) 00969 { 00970 /* wake up done : Sleep mode exited */ 00971 wakeupstatus = CAN_WakeUp_Ok; 00972 } 00973 /* return wakeup status */ 00974 return (uint8_t)wakeupstatus; 00975 } 00976 /** 00977 * @} 00978 */ 00979 00980 00981 /** @defgroup CAN_Group5 CAN Bus Error management functions 00982 * @brief CAN Bus Error management functions 00983 * 00984 @verbatim 00985 =============================================================================== 00986 ##### CAN Bus Error management functions ##### 00987 =============================================================================== 00988 [..] This section provides functions allowing to 00989 (+) Return the CANx's last error code (LEC). 00990 (+) Return the CANx Receive Error Counter (REC). 00991 (+) Return the LSB of the 9-bit CANx Transmit Error Counter(TEC). 00992 [..] 00993 (@) If TEC is greater than 255, The CAN is in bus-off state. 00994 (@) If REC or TEC are greater than 96, an Error warning flag occurs. 00995 (@) If REC or TEC are greater than 127, an Error Passive Flag occurs. 00996 00997 @endverbatim 00998 * @{ 00999 */ 01000 01001 /** 01002 * @brief Returns the CANx's last error code (LEC). 01003 * @param CANx: where x can be 1 to select the CAN1 peripheral. 01004 * @retval Error code: 01005 * - CAN_ERRORCODE_NoErr: No Error 01006 * - CAN_ERRORCODE_StuffErr: Stuff Error 01007 * - CAN_ERRORCODE_FormErr: Form Error 01008 * - CAN_ERRORCODE_ACKErr : Acknowledgment Error 01009 * - CAN_ERRORCODE_BitRecessiveErr: Bit Recessive Error 01010 * - CAN_ERRORCODE_BitDominantErr: Bit Dominant Error 01011 * - CAN_ERRORCODE_CRCErr: CRC Error 01012 * - CAN_ERRORCODE_SoftwareSetErr: Software Set Error 01013 */ 01014 uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx) 01015 { 01016 uint8_t errorcode=0; 01017 01018 /* Check the parameters */ 01019 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01020 01021 /* Get the error code*/ 01022 errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC); 01023 01024 /* Return the error code*/ 01025 return errorcode; 01026 } 01027 01028 /** 01029 * @brief Returns the CANx Receive Error Counter (REC). 01030 * @note In case of an error during reception, this counter is incremented 01031 * by 1 or by 8 depending on the error condition as defined by the CAN 01032 * standard. After every successful reception, the counter is 01033 * decremented by 1 or reset to 120 if its value was higher than 128. 01034 * When the counter value exceeds 127, the CAN controller enters the 01035 * error passive state. 01036 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01037 * @retval CAN Receive Error Counter. 01038 */ 01039 uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx) 01040 { 01041 uint8_t counter=0; 01042 01043 /* Check the parameters */ 01044 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01045 01046 /* Get the Receive Error Counter*/ 01047 counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24); 01048 01049 /* Return the Receive Error Counter*/ 01050 return counter; 01051 } 01052 01053 01054 /** 01055 * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC). 01056 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01057 * @retval LSB of the 9-bit CAN Transmit Error Counter. 01058 */ 01059 uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx) 01060 { 01061 uint8_t counter=0; 01062 01063 /* Check the parameters */ 01064 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01065 01066 /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ 01067 counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16); 01068 01069 /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ 01070 return counter; 01071 } 01072 /** 01073 * @} 01074 */ 01075 01076 /** @defgroup CAN_Group6 Interrupts and flags management functions 01077 * @brief Interrupts and flags management functions 01078 * 01079 @verbatim 01080 =============================================================================== 01081 ##### Interrupts and flags management functions ##### 01082 =============================================================================== 01083 [..] This section provides functions allowing to configure the CAN Interrupts 01084 and to get the status and clear flags and Interrupts pending bits. 01085 [..] The CAN provides 14 Interrupts sources and 15 Flags: 01086 01087 *** Flags *** 01088 ============= 01089 [..] The 15 flags can be divided on 4 groups: 01090 (+) Transmit Flags: 01091 (++) CAN_FLAG_RQCP0. 01092 (++) CAN_FLAG_RQCP1. 01093 (++) CAN_FLAG_RQCP2: Request completed MailBoxes 0, 1 and 2 Flags 01094 Set when the last request (transmit or abort) has 01095 been performed. 01096 (+) Receive Flags: 01097 (++) CAN_FLAG_FMP0. 01098 (++) CAN_FLAG_FMP1: FIFO 0 and 1 Message Pending Flags; 01099 Set to signal that messages are pending in the receive FIFO. 01100 These Flags are cleared only by hardware. 01101 (++) CAN_FLAG_FF0. 01102 (++) CAN_FLAG_FF1: FIFO 0 and 1 Full Flags; 01103 Set when three messages are stored in the selected FIFO. 01104 (++) CAN_FLAG_FOV0. 01105 (++) CAN_FLAG_FOV1: FIFO 0 and 1 Overrun Flags; 01106 Set when a new message has been received and passed the filter 01107 while the FIFO was full. 01108 (+) Operating Mode Flags: 01109 (++) CAN_FLAG_WKU: Wake up Flag; 01110 Set to signal that a SOF bit has been detected while the CAN 01111 hardware was in Sleep mode. 01112 (++) CAN_FLAG_SLAK: Sleep acknowledge Flag; 01113 Set to signal that the CAN has entered Sleep Mode. 01114 (+) Error Flags: 01115 (++) CAN_FLAG_EWG: Error Warning Flag; 01116 Set when the warning limit has been reached (Receive Error Counter 01117 or Transmit Error Counter greater than 96). 01118 This Flag is cleared only by hardware. 01119 (++) CAN_FLAG_EPV: Error Passive Flag; 01120 Set when the Error Passive limit has been reached (Receive Error 01121 Counter or Transmit Error Counter greater than 127). 01122 This Flag is cleared only by hardware. 01123 (++) CAN_FLAG_BOF: Bus-Off Flag; 01124 Set when CAN enters the bus-off state. The bus-off state is 01125 entered on TEC overflow, greater than 255. 01126 This Flag is cleared only by hardware. 01127 (++) CAN_FLAG_LEC: Last error code Flag; 01128 Set If a message has been transferred (reception or transmission) 01129 with error, and the error code is hold. 01130 01131 *** Interrupts *** 01132 ================== 01133 [..] The 14 interrupts can be divided on 4 groups: 01134 (+) Transmit interrupt: 01135 (++) CAN_IT_TME: Transmit mailbox empty Interrupt; 01136 If enabled, this interrupt source is pending when no transmit 01137 request are pending for Tx mailboxes. 01138 (+) Receive Interrupts: 01139 (++) CAN_IT_FMP0. 01140 (++) CAN_IT_FMP1: FIFO 0 and FIFO1 message pending Interrupts; 01141 If enabled, these interrupt sources are pending when messages 01142 are pending in the receive FIFO. 01143 The corresponding interrupt pending bits are cleared only by hardware. 01144 (++) CAN_IT_FF0. 01145 (++) CAN_IT_FF1: FIFO 0 and FIFO1 full Interrupts; 01146 If enabled, these interrupt sources are pending when three messages 01147 are stored in the selected FIFO. 01148 (++) CAN_IT_FOV0. 01149 (++) CAN_IT_FOV1: FIFO 0 and FIFO1 overrun Interrupts; 01150 If enabled, these interrupt sources are pending when a new message 01151 has been received and passed the filter while the FIFO was full. 01152 (+) Operating Mode Interrupts: 01153 (++) CAN_IT_WKU: Wake-up Interrupt; 01154 If enabled, this interrupt source is pending when a SOF bit has 01155 been detected while the CAN hardware was in Sleep mode. 01156 (++) CAN_IT_SLK: Sleep acknowledge Interrupt: 01157 If enabled, this interrupt source is pending when the CAN has 01158 entered Sleep Mode. 01159 (+) Error Interrupts: 01160 (++) CAN_IT_EWG: Error warning Interrupt; 01161 If enabled, this interrupt source is pending when the warning limit 01162 has been reached (Receive Error Counter or Transmit Error Counter=96). 01163 (++) CAN_IT_EPV: Error passive Interrupt; 01164 If enabled, this interrupt source is pending when the Error Passive 01165 limit has been reached (Receive Error Counter or Transmit Error Counter>127). 01166 (++) CAN_IT_BOF: Bus-off Interrupt; 01167 If enabled, this interrupt source is pending when CAN enters 01168 the bus-off state. The bus-off state is entered on TEC overflow, 01169 greater than 255. 01170 This Flag is cleared only by hardware. 01171 (++) CAN_IT_LEC: Last error code Interrupt; 01172 If enabled, this interrupt source is pending when a message has 01173 been transferred (reception or transmission) with error and the 01174 error code is hold. 01175 (++) CAN_IT_ERR: Error Interrupt; 01176 If enabled, this interrupt source is pending when an error condition 01177 is pending. 01178 [..] Managing the CAN controller events: 01179 The user should identify which mode will be used in his application to manage 01180 the CAN controller events: Polling mode or Interrupt mode. 01181 (+) In the Polling Mode it is advised to use the following functions: 01182 (++) CAN_GetFlagStatus() : to check if flags events occur. 01183 (++) CAN_ClearFlag() : to clear the flags events. 01184 (+) In the Interrupt Mode it is advised to use the following functions: 01185 (++) CAN_ITConfig() : to enable or disable the interrupt source. 01186 (++) CAN_GetITStatus() : to check if Interrupt occurs. 01187 (++) CAN_ClearITPendingBit() : to clear the Interrupt pending Bit 01188 (corresponding Flag). 01189 This function has no impact on CAN_IT_FMP0 and CAN_IT_FMP1 Interrupts 01190 pending bits since there are cleared only by hardware. 01191 01192 @endverbatim 01193 * @{ 01194 */ 01195 /** 01196 * @brief Enables or disables the specified CANx interrupts. 01197 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01198 * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled. 01199 * This parameter can be: 01200 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt 01201 * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt 01202 * @arg CAN_IT_FF0: FIFO 0 full Interrupt 01203 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt 01204 * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt 01205 * @arg CAN_IT_FF1: FIFO 1 full Interrupt 01206 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt 01207 * @arg CAN_IT_WKU: Wake-up Interrupt 01208 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt 01209 * @arg CAN_IT_EWG: Error warning Interrupt 01210 * @arg CAN_IT_EPV: Error passive Interrupt 01211 * @arg CAN_IT_BOF: Bus-off Interrupt 01212 * @arg CAN_IT_LEC: Last error code Interrupt 01213 * @arg CAN_IT_ERR: Error Interrupt 01214 * @param NewState: new state of the CAN interrupts. 01215 * This parameter can be: ENABLE or DISABLE. 01216 * @retval None 01217 */ 01218 void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState) 01219 { 01220 /* Check the parameters */ 01221 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01222 assert_param(IS_CAN_IT(CAN_IT)); 01223 assert_param(IS_FUNCTIONAL_STATE(NewState)); 01224 01225 if (NewState != DISABLE) 01226 { 01227 /* Enable the selected CANx interrupt */ 01228 CANx->IER |= CAN_IT; 01229 } 01230 else 01231 { 01232 /* Disable the selected CANx interrupt */ 01233 CANx->IER &= ~CAN_IT; 01234 } 01235 } 01236 /** 01237 * @brief Checks whether the specified CAN flag is set or not. 01238 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01239 * @param CAN_FLAG: specifies the flag to check. 01240 * This parameter can be one of the following values: 01241 * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag 01242 * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag 01243 * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag 01244 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 01245 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 01246 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 01247 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 01248 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 01249 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 01250 * @arg CAN_FLAG_WKU: Wake up Flag 01251 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag 01252 * @arg CAN_FLAG_EWG: Error Warning Flag 01253 * @arg CAN_FLAG_EPV: Error Passive Flag 01254 * @arg CAN_FLAG_BOF: Bus-Off Flag 01255 * @arg CAN_FLAG_LEC: Last error code Flag 01256 * @retval The new state of CAN_FLAG (SET or RESET). 01257 */ 01258 FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG) 01259 { 01260 FlagStatus bitstatus = RESET; 01261 01262 /* Check the parameters */ 01263 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01264 assert_param(IS_CAN_GET_FLAG(CAN_FLAG)); 01265 01266 01267 if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET) 01268 { 01269 /* Check the status of the specified CAN flag */ 01270 if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) 01271 { 01272 /* CAN_FLAG is set */ 01273 bitstatus = SET; 01274 } 01275 else 01276 { 01277 /* CAN_FLAG is reset */ 01278 bitstatus = RESET; 01279 } 01280 } 01281 else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET) 01282 { 01283 /* Check the status of the specified CAN flag */ 01284 if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) 01285 { 01286 /* CAN_FLAG is set */ 01287 bitstatus = SET; 01288 } 01289 else 01290 { 01291 /* CAN_FLAG is reset */ 01292 bitstatus = RESET; 01293 } 01294 } 01295 else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET) 01296 { 01297 /* Check the status of the specified CAN flag */ 01298 if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) 01299 { 01300 /* CAN_FLAG is set */ 01301 bitstatus = SET; 01302 } 01303 else 01304 { 01305 /* CAN_FLAG is reset */ 01306 bitstatus = RESET; 01307 } 01308 } 01309 else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET) 01310 { 01311 /* Check the status of the specified CAN flag */ 01312 if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) 01313 { 01314 /* CAN_FLAG is set */ 01315 bitstatus = SET; 01316 } 01317 else 01318 { 01319 /* CAN_FLAG is reset */ 01320 bitstatus = RESET; 01321 } 01322 } 01323 else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */ 01324 { 01325 /* Check the status of the specified CAN flag */ 01326 if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) 01327 { 01328 /* CAN_FLAG is set */ 01329 bitstatus = SET; 01330 } 01331 else 01332 { 01333 /* CAN_FLAG is reset */ 01334 bitstatus = RESET; 01335 } 01336 } 01337 /* Return the CAN_FLAG status */ 01338 return bitstatus; 01339 } 01340 01341 /** 01342 * @brief Clears the CAN's pending flags. 01343 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01344 * @param CAN_FLAG: specifies the flag to clear. 01345 * This parameter can be one of the following values: 01346 * @arg CAN_FLAG_RQCP0: Request MailBox0 Flag 01347 * @arg CAN_FLAG_RQCP1: Request MailBox1 Flag 01348 * @arg CAN_FLAG_RQCP2: Request MailBox2 Flag 01349 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 01350 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 01351 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 01352 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 01353 * @arg CAN_FLAG_WKU: Wake up Flag 01354 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag 01355 * @arg CAN_FLAG_LEC: Last error code Flag 01356 * @retval None 01357 */ 01358 void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG) 01359 { 01360 uint32_t flagtmp=0; 01361 /* Check the parameters */ 01362 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01363 assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG)); 01364 01365 if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */ 01366 { 01367 /* Clear the selected CAN flags */ 01368 CANx->ESR = (uint32_t)RESET; 01369 } 01370 else /* MSR or TSR or RF0R or RF1R */ 01371 { 01372 flagtmp = CAN_FLAG & 0x000FFFFF; 01373 01374 if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET) 01375 { 01376 /* Receive Flags */ 01377 CANx->RF0R = (uint32_t)(flagtmp); 01378 } 01379 else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET) 01380 { 01381 /* Receive Flags */ 01382 CANx->RF1R = (uint32_t)(flagtmp); 01383 } 01384 else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET) 01385 { 01386 /* Transmit Flags */ 01387 CANx->TSR = (uint32_t)(flagtmp); 01388 } 01389 else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */ 01390 { 01391 /* Operating mode Flags */ 01392 CANx->MSR = (uint32_t)(flagtmp); 01393 } 01394 } 01395 } 01396 01397 /** 01398 * @brief Checks whether the specified CANx interrupt has occurred or not. 01399 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01400 * @param CAN_IT: specifies the CAN interrupt source to check. 01401 * This parameter can be one of the following values: 01402 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt 01403 * @arg CAN_IT_FMP0: FIFO 0 message pending Interrupt 01404 * @arg CAN_IT_FF0: FIFO 0 full Interrupt 01405 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt 01406 * @arg CAN_IT_FMP1: FIFO 1 message pending Interrupt 01407 * @arg CAN_IT_FF1: FIFO 1 full Interrupt 01408 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt 01409 * @arg CAN_IT_WKU: Wake-up Interrupt 01410 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt 01411 * @arg CAN_IT_EWG: Error warning Interrupt 01412 * @arg CAN_IT_EPV: Error passive Interrupt 01413 * @arg CAN_IT_BOF: Bus-off Interrupt 01414 * @arg CAN_IT_LEC: Last error code Interrupt 01415 * @arg CAN_IT_ERR: Error Interrupt 01416 * @retval The current state of CAN_IT (SET or RESET). 01417 */ 01418 ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT) 01419 { 01420 ITStatus itstatus = RESET; 01421 /* Check the parameters */ 01422 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01423 assert_param(IS_CAN_IT(CAN_IT)); 01424 01425 /* check the interrupt enable bit */ 01426 if((CANx->IER & CAN_IT) != RESET) 01427 { 01428 /* in case the Interrupt is enabled, .... */ 01429 switch (CAN_IT) 01430 { 01431 case CAN_IT_TME: 01432 /* Check CAN_TSR_RQCPx bits */ 01433 itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2); 01434 break; 01435 case CAN_IT_FMP0: 01436 /* Check CAN_RF0R_FMP0 bit */ 01437 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0); 01438 break; 01439 case CAN_IT_FF0: 01440 /* Check CAN_RF0R_FULL0 bit */ 01441 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0); 01442 break; 01443 case CAN_IT_FOV0: 01444 /* Check CAN_RF0R_FOVR0 bit */ 01445 itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0); 01446 break; 01447 case CAN_IT_FMP1: 01448 /* Check CAN_RF1R_FMP1 bit */ 01449 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1); 01450 break; 01451 case CAN_IT_FF1: 01452 /* Check CAN_RF1R_FULL1 bit */ 01453 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1); 01454 break; 01455 case CAN_IT_FOV1: 01456 /* Check CAN_RF1R_FOVR1 bit */ 01457 itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1); 01458 break; 01459 case CAN_IT_WKU: 01460 /* Check CAN_MSR_WKUI bit */ 01461 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI); 01462 break; 01463 case CAN_IT_SLK: 01464 /* Check CAN_MSR_SLAKI bit */ 01465 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI); 01466 break; 01467 case CAN_IT_EWG: 01468 /* Check CAN_ESR_EWGF bit */ 01469 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF); 01470 break; 01471 case CAN_IT_EPV: 01472 /* Check CAN_ESR_EPVF bit */ 01473 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF); 01474 break; 01475 case CAN_IT_BOF: 01476 /* Check CAN_ESR_BOFF bit */ 01477 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF); 01478 break; 01479 case CAN_IT_LEC: 01480 /* Check CAN_ESR_LEC bit */ 01481 itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC); 01482 break; 01483 case CAN_IT_ERR: 01484 /* Check CAN_MSR_ERRI bit */ 01485 itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI); 01486 break; 01487 default: 01488 /* in case of error, return RESET */ 01489 itstatus = RESET; 01490 break; 01491 } 01492 } 01493 else 01494 { 01495 /* in case the Interrupt is not enabled, return RESET */ 01496 itstatus = RESET; 01497 } 01498 01499 /* Return the CAN_IT status */ 01500 return itstatus; 01501 } 01502 01503 /** 01504 * @brief Clears the CANx's interrupt pending bits. 01505 * @param CANx: where x can be 1 or 2 to select the CAN peripheral. 01506 * @param CAN_IT: specifies the interrupt pending bit to clear. 01507 * This parameter can be one of the following values: 01508 * @arg CAN_IT_TME: Transmit mailbox empty Interrupt 01509 * @arg CAN_IT_FF0: FIFO 0 full Interrupt 01510 * @arg CAN_IT_FOV0: FIFO 0 overrun Interrupt 01511 * @arg CAN_IT_FF1: FIFO 1 full Interrupt 01512 * @arg CAN_IT_FOV1: FIFO 1 overrun Interrupt 01513 * @arg CAN_IT_WKU: Wake-up Interrupt 01514 * @arg CAN_IT_SLK: Sleep acknowledge Interrupt 01515 * @arg CAN_IT_EWG: Error warning Interrupt 01516 * @arg CAN_IT_EPV: Error passive Interrupt 01517 * @arg CAN_IT_BOF: Bus-off Interrupt 01518 * @arg CAN_IT_LEC: Last error code Interrupt 01519 * @arg CAN_IT_ERR: Error Interrupt 01520 * @retval None 01521 */ 01522 void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT) 01523 { 01524 /* Check the parameters */ 01525 assert_param(IS_CAN_ALL_PERIPH(CANx)); 01526 assert_param(IS_CAN_CLEAR_IT(CAN_IT)); 01527 01528 switch (CAN_IT) 01529 { 01530 case CAN_IT_TME: 01531 /* Clear CAN_TSR_RQCPx (rc_w1)*/ 01532 CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2; 01533 break; 01534 case CAN_IT_FF0: 01535 /* Clear CAN_RF0R_FULL0 (rc_w1)*/ 01536 CANx->RF0R = CAN_RF0R_FULL0; 01537 break; 01538 case CAN_IT_FOV0: 01539 /* Clear CAN_RF0R_FOVR0 (rc_w1)*/ 01540 CANx->RF0R = CAN_RF0R_FOVR0; 01541 break; 01542 case CAN_IT_FF1: 01543 /* Clear CAN_RF1R_FULL1 (rc_w1)*/ 01544 CANx->RF1R = CAN_RF1R_FULL1; 01545 break; 01546 case CAN_IT_FOV1: 01547 /* Clear CAN_RF1R_FOVR1 (rc_w1)*/ 01548 CANx->RF1R = CAN_RF1R_FOVR1; 01549 break; 01550 case CAN_IT_WKU: 01551 /* Clear CAN_MSR_WKUI (rc_w1)*/ 01552 CANx->MSR = CAN_MSR_WKUI; 01553 break; 01554 case CAN_IT_SLK: 01555 /* Clear CAN_MSR_SLAKI (rc_w1)*/ 01556 CANx->MSR = CAN_MSR_SLAKI; 01557 break; 01558 case CAN_IT_EWG: 01559 /* Clear CAN_MSR_ERRI (rc_w1) */ 01560 CANx->MSR = CAN_MSR_ERRI; 01561 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/ 01562 break; 01563 case CAN_IT_EPV: 01564 /* Clear CAN_MSR_ERRI (rc_w1) */ 01565 CANx->MSR = CAN_MSR_ERRI; 01566 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/ 01567 break; 01568 case CAN_IT_BOF: 01569 /* Clear CAN_MSR_ERRI (rc_w1) */ 01570 CANx->MSR = CAN_MSR_ERRI; 01571 /* @note the corresponding Flag is cleared by hardware depending on the CAN Bus status*/ 01572 break; 01573 case CAN_IT_LEC: 01574 /* Clear LEC bits */ 01575 CANx->ESR = RESET; 01576 /* Clear CAN_MSR_ERRI (rc_w1) */ 01577 CANx->MSR = CAN_MSR_ERRI; 01578 break; 01579 case CAN_IT_ERR: 01580 /*Clear LEC bits */ 01581 CANx->ESR = RESET; 01582 /* Clear CAN_MSR_ERRI (rc_w1) */ 01583 CANx->MSR = CAN_MSR_ERRI; 01584 /* @note BOFF, EPVF and EWGF Flags are cleared by hardware depending on the CAN Bus status*/ 01585 break; 01586 default: 01587 break; 01588 } 01589 } 01590 /** 01591 * @} 01592 */ 01593 01594 /** 01595 * @brief Checks whether the CAN interrupt has occurred or not. 01596 * @param CAN_Reg: specifies the CAN interrupt register to check. 01597 * @param It_Bit: specifies the interrupt source bit to check. 01598 * @retval The new state of the CAN Interrupt (SET or RESET). 01599 */ 01600 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit) 01601 { 01602 ITStatus pendingbitstatus = RESET; 01603 01604 if ((CAN_Reg & It_Bit) != (uint32_t)RESET) 01605 { 01606 /* CAN_IT is set */ 01607 pendingbitstatus = SET; 01608 } 01609 else 01610 { 01611 /* CAN_IT is reset */ 01612 pendingbitstatus = RESET; 01613 } 01614 return pendingbitstatus; 01615 } 01616 01617 /** 01618 * @} 01619 */ 01620 01621 /** 01622 * @} 01623 */ 01624 01625 /** 01626 * @} 01627 */ 01628 01629 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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