stm32f30x_adc.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f30x_adc.c
00004   * @author  MCD Application Team
00005   * @version V1.2.3
00006   * @date    10-July-2015
00007   * @brief   This file provides firmware functions to manage the following 
00008   *          functionalities of the Analog to Digital Convertor (ADC) peripheral:
00009   *           + Initialization and Configuration
00010   *           + Analog Watchdog configuration
00011   *           + Temperature Sensor, Vbat & Vrefint (Internal Reference Voltage) management 
00012   *           + Regular Channels Configuration
00013   *           + Regular Channels DMA Configuration
00014   *           + Injected channels Configuration
00015   *           + Interrupts and flags management
00016   *           + Dual mode configuration  
00017   *         
00018   @verbatim
00019   ==============================================================================
00020                              ##### How to use this driver #####
00021   ==============================================================================
00022     [..]
00023     (#) select the ADC clock using the function RCC_ADCCLKConfig()
00024     (#) Enable the ADC interface clock using RCC_AHBPeriphClockCmd();
00025     (#) ADC pins configuration
00026         (++) Enable the clock for the ADC GPIOs using the following function:
00027              RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOx, ENABLE);
00028         (++) Configure these ADC pins in analog mode using GPIO_Init();
00029     (#) Configure the ADC conversion resolution, data alignment, external
00030         trigger and edge, sequencer lenght and Enable/Disable the continuous mode
00031         using the ADC_Init() function.
00032     (#) Activate the ADC peripheral using ADC_Cmd() function.
00033 
00034     *** ADC channels group configuration ***
00035     ========================================    
00036     [..] 
00037     (+) To configure the ADC channels features, use ADC_Init(), ADC_InjectedInit()
00038         and/or ADC_RegularChannelConfig() functions.
00039     (+) To activate the continuous mode, use the ADC_ContinuousModeCmd()
00040         function.
00041     (+) To activate the Discontinuous mode, use the ADC_DiscModeCmd() functions. 
00042     (+) To activate the overrun mode, use the ADC_OverrunModeCmd() functions.
00043     (+) To activate the calibration mode, use the ADC_StartCalibration() functions.
00044     (+) To read the ADC converted values, use the ADC_GetConversionValue()
00045         function.
00046 
00047     *** DMA for ADC channels features configuration ***
00048     ===================================================     
00049     [..] 
00050     (+) To enable the DMA mode for ADC channels group, use the ADC_DMACmd() function.
00051     (+) To configure the DMA transfer request, use ADC_DMAConfig() function.
00052 
00053   @endverbatim
00054   *
00055   ******************************************************************************
00056   * @attention
00057   *
00058   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
00059   *
00060   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00061   * You may not use this file except in compliance with the License.
00062   * You may obtain a copy of the License at:
00063   *
00064   *        http://www.st.com/software_license_agreement_liberty_v2
00065   *
00066   * Unless required by applicable law or agreed to in writing, software 
00067   * distributed under the License is distributed on an "AS IS" BASIS, 
00068   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00069   * See the License for the specific language governing permissions and
00070   * limitations under the License.
00071   *
00072   ******************************************************************************
00073   */
00074 
00075 /* Includes ------------------------------------------------------------------*/
00076 #include "stm32f30x_adc.h"
00077 #include "stm32f30x_rcc.h"
00078 
00079 /** @addtogroup STM32F30x_StdPeriph_Driver
00080   * @{
00081   */
00082 
00083 /** @defgroup ADC 
00084   * @brief ADC driver modules
00085   * @{
00086   */
00087 
00088 /* Private typedef -----------------------------------------------------------*/
00089 /* Private define ------------------------------------------------------------*/
00090 
00091 /* CFGR register Mask */
00092 #define CFGR_CLEAR_Mask             ((uint32_t)0xFDFFC007)
00093 
00094 /* JSQR register Mask */
00095 #define JSQR_CLEAR_Mask             ((uint32_t)0x00000000)
00096 
00097 /* ADC ADON mask */
00098 #define CCR_CLEAR_MASK              ((uint32_t)0xFFFC10E0)
00099 
00100 /* ADC JDRx registers offset */
00101 #define JDR_Offset                  ((uint8_t)0x80)
00102 
00103 /* Private macro -------------------------------------------------------------*/
00104 /* Private variables ---------------------------------------------------------*/
00105 /* Private function prototypes -----------------------------------------------*/
00106 /* Private functions ---------------------------------------------------------*/
00107 
00108 /** @defgroup ADC_Private_Functions
00109   * @{
00110   */
00111 
00112 /** @defgroup ADC_Group1 Initialization and Configuration functions
00113  *  @brief   Initialization and Configuration functions 
00114  *
00115 @verbatim    
00116  ===============================================================================
00117                  ##### Initialization and Configuration functions  #####
00118  ===============================================================================  
00119   [..] 
00120   This section provides functions allowing to:
00121    (#) Initialize and configure the ADC injected and/or regular channels and dual mode.
00122    (#) Management of the calibration process
00123    (#) ADC Power-on Power-off
00124    (#) Single ended or differential mode 
00125    (#) Enabling the queue of context and the auto delay mode
00126    (#) The number of ADC conversions that will be done using the sequencer for regular 
00127        channel group
00128    (#) Enable or disable the ADC peripheral
00129    
00130 @endverbatim
00131   * @{
00132   */
00133 
00134 /**
00135   * @brief  Deinitializes the ADCx peripheral registers to their default reset values.
00136   * @param  ADCx: where x can be 1, 2,3 or 4 to select the ADC peripheral.
00137   * @retval None
00138   */
00139 void ADC_DeInit(ADC_TypeDef* ADCx)
00140 {
00141   /* Check the parameters */
00142   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00143 
00144 
00145   if((ADCx == ADC1) || (ADCx == ADC2))
00146   {
00147     /* Enable ADC1/ADC2 reset state */
00148     RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC12, ENABLE);
00149     /* Release ADC1/ADC2 from reset state */
00150     RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC12, DISABLE);
00151   }
00152   else if((ADCx == ADC3) || (ADCx == ADC4))
00153   {
00154     /* Enable ADC3/ADC4 reset state */
00155     RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC34, ENABLE);
00156     /* Release ADC3/ADC4 from reset state */
00157     RCC_AHBPeriphResetCmd(RCC_AHBPeriph_ADC34, DISABLE);
00158   }
00159 }
00160 /**
00161   * @brief  Initializes the ADCx peripheral according to the specified parameters
00162   *         in the ADC_InitStruct.
00163   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00164   * @param  ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
00165   *         the configuration information for the specified ADC peripheral.
00166   * @retval None
00167   */
00168 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
00169 {
00170   uint32_t tmpreg1 = 0;
00171   /* Check the parameters */
00172   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00173   assert_param(IS_ADC_CONVMODE(ADC_InitStruct->ADC_ContinuousConvMode));
00174   assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution));
00175   assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConvEvent)); 
00176   assert_param(IS_EXTERNALTRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigEventEdge));  
00177   assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); 
00178   assert_param(IS_ADC_OVRUNMODE(ADC_InitStruct->ADC_OverrunMode));
00179   assert_param(IS_ADC_AUTOINJECMODE(ADC_InitStruct->ADC_AutoInjMode));
00180   assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfRegChannel));
00181 
00182   /*---------------------------- ADCx CFGR Configuration -----------------*/
00183   /* Get the ADCx CFGR value */
00184   tmpreg1 = ADCx->CFGR;
00185   /* Clear SCAN bit */
00186   tmpreg1 &= CFGR_CLEAR_Mask; 
00187   /* Configure ADCx: scan conversion mode */
00188   /* Set SCAN bit according to ADC_ScanConvMode value */
00189   tmpreg1 |= (uint32_t)ADC_InitStruct->ADC_ContinuousConvMode | 
00190   ADC_InitStruct->ADC_Resolution|                 
00191   ADC_InitStruct->ADC_ExternalTrigConvEvent|         
00192   ADC_InitStruct->ADC_ExternalTrigEventEdge|     
00193   ADC_InitStruct->ADC_DataAlign|                 
00194   ADC_InitStruct->ADC_OverrunMode|        
00195   ADC_InitStruct->ADC_AutoInjMode;
00196   
00197   /* Write to ADCx CFGR */
00198   ADCx->CFGR = tmpreg1;
00199   
00200   /*---------------------------- ADCx SQR1 Configuration -----------------*/
00201   /* Get the ADCx SQR1 value */
00202   tmpreg1 = ADCx->SQR1;
00203   /* Clear L bits */
00204   tmpreg1 &= ~(uint32_t)(ADC_SQR1_L);
00205   /* Configure ADCx: regular channel sequence length */
00206   /* Set L bits according to ADC_NbrOfRegChannel value */
00207   tmpreg1 |= (uint32_t) (ADC_InitStruct->ADC_NbrOfRegChannel - 1);
00208   /* Write to ADCx SQR1 */
00209   ADCx->SQR1 = tmpreg1; 
00210    
00211 }  
00212 
00213 /**
00214   * @brief  Fills each ADC_InitStruct member with its default value.
00215   * @param  ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized.
00216   * @retval None
00217   */
00218 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
00219 {
00220   /* Reset ADC init structure parameters values */
00221   ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
00222   ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b;                 
00223   ADC_InitStruct->ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0;         
00224   ADC_InitStruct->ADC_ExternalTrigEventEdge = ADC_ExternalTrigEventEdge_None;
00225   ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;                 
00226   ADC_InitStruct->ADC_OverrunMode = DISABLE;   
00227   ADC_InitStruct->ADC_AutoInjMode = DISABLE;  
00228   ADC_InitStruct->ADC_NbrOfRegChannel = 1; 
00229 }
00230 
00231 /**
00232   * @brief  Initializes the ADCx peripheral according to the specified parameters
00233   *         in the ADC_InitStruct.
00234   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00235   * @param  ADC_InjectInitStruct: pointer to an ADC_InjecInitTypeDef structure that contains
00236   *         the configuration information for the specified ADC injected channel.
00237   * @retval None
00238   */
00239 void ADC_InjectedInit(ADC_TypeDef* ADCx, ADC_InjectedInitTypeDef* ADC_InjectedInitStruct)
00240 {
00241   uint32_t tmpreg1 = 0;
00242   /* Check the parameters */
00243   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00244   assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent)); 
00245   assert_param(IS_EXTERNALTRIGINJ_EDGE(ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge));   
00246   assert_param(IS_ADC_INJECTED_LENGTH(ADC_InjectedInitStruct->ADC_NbrOfInjecChannel));
00247   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence1));
00248   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence2));
00249   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence3));
00250   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedInitStruct->ADC_InjecSequence4));
00251   
00252   /*---------------------------- ADCx JSQR Configuration -----------------*/
00253   /* Get the ADCx JSQR value */
00254   tmpreg1 = ADCx->JSQR;
00255   /* Clear L bits */
00256   tmpreg1 &= JSQR_CLEAR_Mask;
00257   /* Configure ADCx: Injected channel sequence length, external trigger, 
00258      external trigger edge and sequences
00259   */
00260   tmpreg1 = (uint32_t) ((ADC_InjectedInitStruct->ADC_NbrOfInjecChannel - (uint8_t)1) |
00261                          ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent |         
00262                          ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge |
00263                          (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence1) << 8) |
00264                          (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence2) << 14) |
00265                          (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence3) << 20) |
00266                          (uint32_t)((ADC_InjectedInitStruct->ADC_InjecSequence4) << 26));
00267   /* Write to ADCx SQR1 */
00268   ADCx->JSQR = tmpreg1;  
00269 }
00270 
00271 /**
00272   * @brief  Fills each ADC_InjectedInitStruct member with its default value.
00273   * @param  ADC_InjectedInitStruct : pointer to an ADC_InjectedInitTypeDef structure which will be initialized.
00274   * @retval None
00275   */
00276 void ADC_InjectedStructInit(ADC_InjectedInitTypeDef* ADC_InjectedInitStruct)
00277 {
00278   ADC_InjectedInitStruct->ADC_ExternalTrigInjecConvEvent = ADC_ExternalTrigInjecConvEvent_0;    
00279   ADC_InjectedInitStruct->ADC_ExternalTrigInjecEventEdge = ADC_ExternalTrigInjecEventEdge_None;     
00280   ADC_InjectedInitStruct->ADC_NbrOfInjecChannel = 1;                                                             
00281   ADC_InjectedInitStruct->ADC_InjecSequence1 = ADC_InjectedChannel_1; 
00282   ADC_InjectedInitStruct->ADC_InjecSequence2 = ADC_InjectedChannel_1;
00283   ADC_InjectedInitStruct->ADC_InjecSequence3 = ADC_InjectedChannel_1;
00284   ADC_InjectedInitStruct->ADC_InjecSequence4 = ADC_InjectedChannel_1; 
00285 }
00286     
00287 /**
00288   * @brief  Initializes the ADCs peripherals according to the specified parameters 
00289   *         in the ADC_CommonInitStruct.
00290   * @param  ADCx: where x can be 1 or 4 to select the ADC peripheral.
00291   * @param  ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure 
00292   *         that contains the configuration information for  All ADCs peripherals.
00293   * @retval None
00294   */
00295 void ADC_CommonInit(ADC_TypeDef* ADCx, ADC_CommonInitTypeDef* ADC_CommonInitStruct)
00296 {
00297   uint32_t tmpreg1 = 0;
00298   /* Check the parameters */
00299   assert_param(IS_ADC_MODE(ADC_CommonInitStruct->ADC_Mode));
00300   assert_param(IS_ADC_CLOCKMODE(ADC_CommonInitStruct->ADC_Clock));
00301   assert_param(IS_ADC_DMA_MODE(ADC_CommonInitStruct->ADC_DMAMode));
00302   assert_param(IS_ADC_DMA_ACCESS_MODE(ADC_CommonInitStruct->ADC_DMAAccessMode));
00303   assert_param(IS_ADC_TWOSAMPLING_DELAY(ADC_CommonInitStruct->ADC_TwoSamplingDelay));
00304 
00305   if((ADCx == ADC1) || (ADCx == ADC2))
00306   {
00307     /* Get the ADC CCR value */
00308     tmpreg1 = ADC1_2->CCR;
00309   
00310     /* Clear MULTI, DELAY, DMA and ADCPRE bits */
00311     tmpreg1 &= CCR_CLEAR_MASK;
00312   }
00313   else
00314   {
00315     /* Get the ADC CCR value */
00316     tmpreg1 = ADC3_4->CCR;
00317   
00318     /* Clear MULTI, DELAY, DMA and ADCPRE bits */
00319     tmpreg1 &= CCR_CLEAR_MASK;
00320   }
00321   /*---------------------------- ADC CCR Configuration -----------------*/  
00322   /* Configure ADCx: Multi mode, Delay between two sampling time, ADC clock, DMA mode
00323      and DMA access mode for dual mode */
00324   /* Set MULTI bits according to ADC_Mode value */
00325   /* Set CKMODE bits according to ADC_Clock value */
00326   /* Set MDMA bits according to ADC_DMAAccessMode value */
00327   /* Set DMACFG bits according to ADC_DMAMode value */
00328   /* Set DELAY bits according to ADC_TwoSamplingDelay value */    
00329   tmpreg1 |= (uint32_t)(ADC_CommonInitStruct->ADC_Mode | 
00330                         ADC_CommonInitStruct->ADC_Clock | 
00331                         ADC_CommonInitStruct->ADC_DMAAccessMode | 
00332                         (uint32_t)(ADC_CommonInitStruct->ADC_DMAMode << 12) |
00333                         (uint32_t)((uint32_t)ADC_CommonInitStruct->ADC_TwoSamplingDelay << 8));
00334 
00335   if((ADCx == ADC1) || (ADCx == ADC2))
00336   {                        
00337     /* Write to ADC CCR */
00338     ADC1_2->CCR = tmpreg1;
00339   }
00340   else
00341   {
00342     /* Write to ADC CCR */
00343     ADC3_4->CCR = tmpreg1;
00344   }
00345 }
00346 
00347 /**
00348   * @brief  Fills each ADC_CommonInitStruct member with its default value.
00349   * @param  ADC_CommonInitStruct: pointer to an ADC_CommonInitTypeDef structure
00350   *         which will be initialized.
00351   * @retval None
00352   */
00353 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct)
00354 {
00355   /* Initialize the ADC_Mode member */
00356   ADC_CommonInitStruct->ADC_Mode = ADC_Mode_Independent;
00357 
00358   /* initialize the ADC_Clock member */
00359   ADC_CommonInitStruct->ADC_Clock = ADC_Clock_AsynClkMode;
00360 
00361   /* Initialize the ADC_DMAAccessMode member */
00362   ADC_CommonInitStruct->ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
00363 
00364   /* Initialize the ADC_DMAMode member */
00365   ADC_CommonInitStruct->ADC_DMAMode = ADC_DMAMode_OneShot;
00366 
00367   /* Initialize the ADC_TwoSamplingDelay member */
00368   ADC_CommonInitStruct->ADC_TwoSamplingDelay = 0;
00369 
00370 }
00371 
00372 /**
00373   * @brief  Enables or disables the specified ADC peripheral.
00374   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00375   * @param  NewState: new state of the ADCx peripheral.
00376   *   This parameter can be: ENABLE or DISABLE.
00377   * @retval None
00378   */
00379 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00380 {
00381   /* Check the parameters */
00382   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00383   assert_param(IS_FUNCTIONAL_STATE(NewState));
00384 
00385   if (NewState != DISABLE)
00386   {
00387     /* Set the ADEN bit */
00388     ADCx->CR |= ADC_CR_ADEN;
00389   }
00390   else
00391   {
00392     /* Disable the selected ADC peripheral: Set the ADDIS bit */
00393     ADCx->CR |= ADC_CR_ADDIS;
00394   }
00395 }
00396 
00397 /**
00398   * @brief  Starts the selected ADC calibration process.
00399   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00400   * @retval None
00401   */
00402 void ADC_StartCalibration(ADC_TypeDef* ADCx)
00403 {
00404   /* Check the parameters */
00405   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00406 
00407   /* Set the ADCAL bit */
00408   ADCx->CR |= ADC_CR_ADCAL;
00409 }
00410 
00411 /**
00412   * @brief  Returns the ADCx calibration value.
00413   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00414   * @retval None
00415   */
00416 uint32_t ADC_GetCalibrationValue(ADC_TypeDef* ADCx)
00417 {
00418   /* Check the parameters */
00419   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00420 
00421   /* Return the selected ADC calibration value */
00422   return (uint32_t)ADCx->CALFACT;
00423 }
00424 
00425 /**
00426   * @brief  Sets the ADCx calibration register.
00427   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00428   * @retval None
00429   */
00430 void ADC_SetCalibrationValue(ADC_TypeDef* ADCx, uint32_t ADC_Calibration)
00431 {
00432   /* Check the parameters */
00433   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00434 
00435   /* Set the ADC calibration register value */
00436   ADCx->CALFACT = ADC_Calibration;
00437 }
00438 
00439 /**
00440   * @brief  Select the ADC calibration mode.
00441   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00442   * @param  ADC_CalibrationMode: the ADC calibration mode.
00443   *         This parameter can be one of the following values: 
00444   *          @arg ADC_CalibrationMode_Single: to select the calibration for single channel
00445   *          @arg ADC_CalibrationMode_Differential: to select the calibration for differential channel         
00446   * @retval None
00447   */
00448 void ADC_SelectCalibrationMode(ADC_TypeDef* ADCx, uint32_t ADC_CalibrationMode)
00449 {
00450   /* Check the parameters */
00451   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00452   assert_param(IS_ADC_CALIBRATION_MODE(ADC_CalibrationMode));
00453   /* Set or Reset the ADCALDIF bit */
00454   ADCx->CR &= (~ADC_CR_ADCALDIF);
00455   ADCx->CR |= ADC_CalibrationMode;
00456 
00457 }
00458 
00459 /**
00460   * @brief  Gets the selected ADC calibration status.
00461   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00462   * @retval The new state of ADC calibration (SET or RESET).
00463   */
00464 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx)
00465 {
00466   FlagStatus bitstatus = RESET;
00467   /* Check the parameters */
00468   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00469   /* Check the status of CAL bit */
00470   if ((ADCx->CR & ADC_CR_ADCAL) != (uint32_t)RESET)
00471   {
00472     /* CAL bit is set: calibration on going */
00473     bitstatus = SET;
00474   }
00475   else
00476   {
00477     /* CAL bit is reset: end of calibration */
00478     bitstatus = RESET;
00479   }
00480   /* Return the CAL bit status */
00481   return  bitstatus;
00482 }
00483 
00484 /**
00485   * @brief  ADC Disable Command.
00486   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00487   * @retval None
00488   */
00489 void ADC_DisableCmd(ADC_TypeDef* ADCx)
00490 {
00491   /* Check the parameters */
00492   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00493 
00494   /* Set the ADDIS bit */
00495   ADCx->CR |= ADC_CR_ADDIS;
00496 }
00497 
00498 
00499 /**
00500   * @brief  Gets the selected ADC disable command Status.
00501   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00502   * @retval The new state of ADC ADC disable command (SET or RESET).
00503   */
00504 FlagStatus ADC_GetDisableCmdStatus(ADC_TypeDef* ADCx)
00505 {
00506   FlagStatus bitstatus = RESET;
00507   /* Check the parameters */
00508   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00509 
00510   /* Check the status of ADDIS bit */
00511   if ((ADCx->CR & ADC_CR_ADDIS) != (uint32_t)RESET)
00512   {
00513     /* ADDIS bit is set */
00514     bitstatus = SET;
00515   }
00516   else
00517   {
00518     /* ADDIS bit is reset */
00519     bitstatus = RESET;
00520   }
00521   /* Return the ADDIS bit status */
00522   return  bitstatus;
00523 }
00524 
00525 /**
00526   * @brief  Enables or disables the specified ADC Voltage Regulator.
00527   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00528   * @param  NewState: new state of the ADCx Voltage Regulator.
00529   *         This parameter can be: ENABLE or DISABLE.
00530   * @retval None
00531   */
00532 void ADC_VoltageRegulatorCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00533 {
00534   /* Check the parameters */
00535   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00536   assert_param(IS_FUNCTIONAL_STATE(NewState));
00537 
00538   /* set the intermediate state before moving the ADC voltage regulator 
00539   from enable state to disable state or from disable state to enable state */
00540   ADCx->CR &= ~(ADC_CR_ADVREGEN);
00541   
00542   if (NewState != DISABLE)
00543   {
00544     /* Set the ADVREGEN bit 0 */
00545     ADCx->CR |= ADC_CR_ADVREGEN_0;
00546   }
00547   else
00548   {
00549     /* Set the ADVREGEN bit 1 */
00550     ADCx->CR |=ADC_CR_ADVREGEN_1;
00551   }
00552 }
00553 
00554 /**
00555   * @brief  Selects the differential mode for a specific channel
00556   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00557   * @param  ADC_Channel: the ADC channel to configure for the analog watchdog. 
00558   *   This parameter can be one of the following values:
00559   *     @arg ADC_Channel_1: ADC Channel1 selected
00560   *     @arg ADC_Channel_2: ADC Channel2 selected
00561   *     @arg ADC_Channel_3: ADC Channel3 selected
00562   *     @arg ADC_Channel_4: ADC Channel4 selected
00563   *     @arg ADC_Channel_5: ADC Channel5 selected
00564   *     @arg ADC_Channel_6: ADC Channel6 selected
00565   *     @arg ADC_Channel_7: ADC Channel7 selected
00566   *     @arg ADC_Channel_8: ADC Channel8 selected
00567   *     @arg ADC_Channel_9: ADC Channel9 selected
00568   *     @arg ADC_Channel_10: ADC Channel10 selected
00569   *     @arg ADC_Channel_11: ADC Channel11 selected
00570   *     @arg ADC_Channel_12: ADC Channel12 selected
00571   *     @arg ADC_Channel_13: ADC Channel13 selected
00572   *     @arg ADC_Channel_14: ADC Channel14 selected
00573   * @note : Channel 15, 16 and 17 are fixed to single-ended inputs mode.
00574   * @retval None
00575   */
00576 void ADC_SelectDifferentialMode(ADC_TypeDef* ADCx, uint8_t ADC_Channel, FunctionalState NewState)
00577 {
00578   /* Check the parameters */
00579   assert_param(IS_ADC_ALL_PERIPH(ADCx)); 
00580   assert_param(IS_ADC_DIFFCHANNEL(ADC_Channel)); 
00581   assert_param(IS_FUNCTIONAL_STATE(NewState));
00582 
00583   if (NewState != DISABLE)
00584   {
00585     /* Set the DIFSEL bit */
00586    ADCx->DIFSEL |= (uint32_t)(1 << ADC_Channel );
00587   }
00588   else
00589   {
00590     /* Reset the DIFSEL bit */
00591    ADCx->DIFSEL &= ~(uint32_t)(1 << ADC_Channel);
00592   }
00593 }
00594 
00595 /**
00596   * @brief  Selects the Queue Of Context Mode for injected channels.
00597   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00598   * @param  NewState: new state of the Queue Of Context Mode.
00599   *   This parameter can be: ENABLE or DISABLE.
00600   * @retval None
00601   */
00602 void ADC_SelectQueueOfContextMode(ADC_TypeDef* ADCx, FunctionalState NewState)
00603 {
00604   /* Check the parameters */
00605   assert_param(IS_ADC_ALL_PERIPH(ADCx)); 
00606   assert_param(IS_FUNCTIONAL_STATE(NewState));
00607 
00608   if (NewState != DISABLE)
00609   {
00610     /* Set the JQM bit */
00611     ADCx->CFGR |= (uint32_t)(ADC_CFGR_JQM );
00612   }
00613   else
00614   {
00615     /* Reset the JQM bit */
00616     ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_JQM);
00617   }
00618 }
00619 
00620 /**
00621   * @brief  Selects the ADC Delayed Conversion Mode.
00622   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00623   * @param  NewState: new state of the ADC Delayed Conversion Mode.
00624   *   This parameter can be: ENABLE or DISABLE.
00625   * @retval None
00626   */
00627 void ADC_AutoDelayCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00628 {
00629   /* Check the parameters */
00630   assert_param(IS_ADC_ALL_PERIPH(ADCx)); 
00631   assert_param(IS_FUNCTIONAL_STATE(NewState));
00632 
00633   if (NewState != DISABLE)
00634   {
00635     /* Set the AUTDLY bit */
00636     ADCx->CFGR |= (uint32_t)(ADC_CFGR_AUTDLY );
00637   }
00638   else
00639   {
00640     /* Reset the AUTDLY bit */
00641     ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_AUTDLY);
00642   }
00643 }
00644 
00645 /**
00646   * @}
00647   */
00648 
00649 /** @defgroup ADC_Group2 Analog Watchdog configuration functions
00650  *  @brief   Analog Watchdog configuration functions 
00651  *
00652 @verbatim   
00653  ===============================================================================
00654                     ##### Analog Watchdog configuration functions #####
00655  ===============================================================================  
00656 
00657   [..] This section provides functions allowing to configure the 3 Analog Watchdogs 
00658        (AWDG1, AWDG2 and AWDG3) in the ADC.
00659   
00660   [..] A typical configuration Analog Watchdog is done following these steps :
00661    (#) The ADC guarded channel(s) is (are) selected using the functions: 
00662       (++) ADC_AnalogWatchdog1SingleChannelConfig().
00663       (++) ADC_AnalogWatchdog2SingleChannelConfig().
00664       (++) ADC_AnalogWatchdog3SingleChannelConfig().
00665 
00666    (#) The Analog watchdog lower and higher threshold are configured using the functions: 
00667       (++) ADC_AnalogWatchdog1ThresholdsConfig().
00668       (++) ADC_AnalogWatchdog2ThresholdsConfig().
00669       (++) ADC_AnalogWatchdog3ThresholdsConfig().
00670 
00671    (#) The Analog watchdog is enabled and configured to enable the check, on one
00672       or more channels, using the function:
00673       (++) ADC_AnalogWatchdogCmd().
00674 
00675 @endverbatim
00676   * @{
00677   */
00678 
00679 /**
00680   * @brief  Enables or disables the analog watchdog on single/all regular
00681   *         or injected channels
00682   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00683   * @param  ADC_AnalogWatchdog: the ADC analog watchdog configuration.
00684   *   This parameter can be one of the following values:
00685   *     @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel
00686   *     @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel
00687   *     @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel
00688   *     @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on  all regular channel
00689   *     @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on  all injected channel
00690   *     @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels
00691   *     @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog
00692   * @retval None      
00693   */
00694 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
00695 {
00696   uint32_t tmpreg = 0;
00697   /* Check the parameters */
00698   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00699   assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
00700   /* Get the old register value */
00701   tmpreg = ADCx->CFGR;
00702   /* Clear AWDEN, AWDENJ and AWDSGL bits */
00703   tmpreg &= ~(uint32_t)(ADC_CFGR_AWD1SGL|ADC_CFGR_AWD1EN|ADC_CFGR_JAWD1EN);
00704   /* Set the analog watchdog enable mode */
00705   tmpreg |= ADC_AnalogWatchdog;
00706   /* Store the new register value */
00707   ADCx->CFGR = tmpreg;
00708 }
00709 
00710 /**
00711   * @brief  Configures the high and low thresholds of the analog watchdog1.
00712   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00713   * @param  HighThreshold: the ADC analog watchdog High threshold value.
00714   *   This parameter must be a 12bit value.
00715   * @param  LowThreshold: the ADC analog watchdog Low threshold value.
00716   *   This parameter must be a 12bit value.
00717   * @retval None
00718   */
00719 void ADC_AnalogWatchdog1ThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
00720                                          uint16_t LowThreshold)
00721 {
00722   /* Check the parameters */
00723   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00724   assert_param(IS_ADC_THRESHOLD(HighThreshold));
00725   assert_param(IS_ADC_THRESHOLD(LowThreshold));
00726   /* Set the ADCx high threshold */
00727   ADCx->TR1 &= ~(uint32_t)ADC_TR1_HT1;
00728   ADCx->TR1 |= (uint32_t)((uint32_t)HighThreshold << 16);
00729 
00730   /* Set the ADCx low threshold */
00731   ADCx->TR1 &= ~(uint32_t)ADC_TR1_LT1;
00732   ADCx->TR1 |= LowThreshold;
00733 }
00734 
00735 /**
00736   * @brief  Configures the high and low thresholds of the analog watchdog2.
00737   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00738   * @param  HighThreshold: the ADC analog watchdog High threshold value.
00739   *   This parameter must be a 8bit value.
00740   * @param  LowThreshold: the ADC analog watchdog Low threshold value.
00741   *   This parameter must be a 8bit value.
00742   * @retval None
00743   */
00744 void ADC_AnalogWatchdog2ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold,
00745                                          uint8_t LowThreshold)
00746 {
00747   /* Check the parameters */
00748   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00749   
00750   /* Set the ADCx high threshold */
00751   ADCx->TR2 &= ~(uint32_t)ADC_TR2_HT2;
00752   ADCx->TR2 |= (uint32_t)((uint32_t)HighThreshold << 16);
00753 
00754   /* Set the ADCx low threshold */
00755   ADCx->TR2 &= ~(uint32_t)ADC_TR2_LT2;
00756   ADCx->TR2 |= LowThreshold;
00757 }
00758 
00759 /**
00760   * @brief  Configures the high and low thresholds of the analog watchdog3.
00761   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00762   * @param  HighThreshold: the ADC analog watchdog High threshold value.
00763   *   This parameter must be a 8bit value.
00764   * @param  LowThreshold: the ADC analog watchdog Low threshold value.
00765   *   This parameter must be a 8bit value.
00766   * @retval None
00767   */
00768 void ADC_AnalogWatchdog3ThresholdsConfig(ADC_TypeDef* ADCx, uint8_t HighThreshold,
00769                                          uint8_t LowThreshold)
00770 {
00771   /* Check the parameters */
00772   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00773 
00774   /* Set the ADCx high threshold */
00775   ADCx->TR3 &= ~(uint32_t)ADC_TR3_HT3;
00776   ADCx->TR3 |= (uint32_t)((uint32_t)HighThreshold << 16);
00777 
00778   /* Set the ADCx low threshold */
00779   ADCx->TR3 &= ~(uint32_t)ADC_TR3_LT3;
00780   ADCx->TR3 |= LowThreshold;
00781 }
00782 
00783 /**
00784   * @brief  Configures the analog watchdog 2 guarded single channel
00785   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00786   * @param  ADC_Channel: the ADC channel to configure for the analog watchdog. 
00787   *   This parameter can be one of the following values:
00788   *     @arg ADC_Channel_1: ADC Channel1 selected
00789   *     @arg ADC_Channel_2: ADC Channel2 selected
00790   *     @arg ADC_Channel_3: ADC Channel3 selected
00791   *     @arg ADC_Channel_4: ADC Channel4 selected
00792   *     @arg ADC_Channel_5: ADC Channel5 selected
00793   *     @arg ADC_Channel_6: ADC Channel6 selected
00794   *     @arg ADC_Channel_7: ADC Channel7 selected
00795   *     @arg ADC_Channel_8: ADC Channel8 selected
00796   *     @arg ADC_Channel_9: ADC Channel9 selected
00797   *     @arg ADC_Channel_10: ADC Channel10 selected
00798   *     @arg ADC_Channel_11: ADC Channel11 selected
00799   *     @arg ADC_Channel_12: ADC Channel12 selected
00800   *     @arg ADC_Channel_13: ADC Channel13 selected
00801   *     @arg ADC_Channel_14: ADC Channel14 selected
00802   *     @arg ADC_Channel_15: ADC Channel15 selected
00803   *     @arg ADC_Channel_16: ADC Channel16 selected
00804   *     @arg ADC_Channel_17: ADC Channel17 selected
00805   *     @arg ADC_Channel_18: ADC Channel18 selected
00806   * @retval None
00807   */
00808 void ADC_AnalogWatchdog1SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
00809 {
00810   uint32_t tmpreg = 0;
00811   /* Check the parameters */
00812   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00813   assert_param(IS_ADC_CHANNEL(ADC_Channel));
00814   /* Get the old register value */
00815   tmpreg = ADCx->CFGR;
00816   /* Clear the Analog watchdog channel select bits */
00817   tmpreg &= ~(uint32_t)ADC_CFGR_AWD1CH;
00818   /* Set the Analog watchdog channel */
00819   tmpreg |= (uint32_t)((uint32_t)ADC_Channel << 26);
00820   /* Store the new register value */
00821   ADCx->CFGR = tmpreg;
00822 }
00823 
00824 /**
00825   * @brief  Configures the analog watchdog 2 guarded single channel
00826   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00827   * @param  ADC_Channel: the ADC channel to configure for the analog watchdog. 
00828   *   This parameter can be one of the following values:
00829   *     @arg ADC_Channel_1: ADC Channel1 selected
00830   *     @arg ADC_Channel_2: ADC Channel2 selected
00831   *     @arg ADC_Channel_3: ADC Channel3 selected
00832   *     @arg ADC_Channel_4: ADC Channel4 selected
00833   *     @arg ADC_Channel_5: ADC Channel5 selected
00834   *     @arg ADC_Channel_6: ADC Channel6 selected
00835   *     @arg ADC_Channel_7: ADC Channel7 selected
00836   *     @arg ADC_Channel_8: ADC Channel8 selected
00837   *     @arg ADC_Channel_9: ADC Channel9 selected
00838   *     @arg ADC_Channel_10: ADC Channel10 selected
00839   *     @arg ADC_Channel_11: ADC Channel11 selected
00840   *     @arg ADC_Channel_12: ADC Channel12 selected
00841   *     @arg ADC_Channel_13: ADC Channel13 selected
00842   *     @arg ADC_Channel_14: ADC Channel14 selected
00843   *     @arg ADC_Channel_15: ADC Channel15 selected
00844   *     @arg ADC_Channel_16: ADC Channel16 selected
00845   *     @arg ADC_Channel_17: ADC Channel17 selected
00846   *     @arg ADC_Channel_18: ADC Channel18 selected
00847   * @retval None
00848   */
00849 void ADC_AnalogWatchdog2SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
00850 {
00851   uint32_t tmpreg = 0;
00852   /* Check the parameters */
00853   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00854   assert_param(IS_ADC_CHANNEL(ADC_Channel));
00855   /* Get the old register value */
00856   tmpreg = ADCx->AWD2CR;
00857   /* Clear the Analog watchdog channel select bits */
00858   tmpreg &= ~(uint32_t)ADC_AWD2CR_AWD2CH;
00859   /* Set the Analog watchdog channel */
00860   tmpreg |= (uint32_t)1 << (ADC_Channel);
00861   /* Store the new register value */
00862   ADCx->AWD2CR |= tmpreg;
00863 }
00864 
00865 /**
00866   * @brief  Configures the analog watchdog 3 guarded single channel
00867   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
00868   * @param  ADC_Channel: the ADC channel to configure for the analog watchdog. 
00869   *   This parameter can be one of the following values:
00870   *     @arg ADC_Channel_1: ADC Channel1 selected
00871   *     @arg ADC_Channel_2: ADC Channel2 selected
00872   *     @arg ADC_Channel_3: ADC Channel3 selected
00873   *     @arg ADC_Channel_4: ADC Channel4 selected
00874   *     @arg ADC_Channel_5: ADC Channel5 selected
00875   *     @arg ADC_Channel_6: ADC Channel6 selected
00876   *     @arg ADC_Channel_7: ADC Channel7 selected
00877   *     @arg ADC_Channel_8: ADC Channel8 selected
00878   *     @arg ADC_Channel_9: ADC Channel9 selected
00879   *     @arg ADC_Channel_10: ADC Channel10 selected
00880   *     @arg ADC_Channel_11: ADC Channel11 selected
00881   *     @arg ADC_Channel_12: ADC Channel12 selected
00882   *     @arg ADC_Channel_13: ADC Channel13 selected
00883   *     @arg ADC_Channel_14: ADC Channel14 selected
00884   *     @arg ADC_Channel_15: ADC Channel15 selected
00885   *     @arg ADC_Channel_16: ADC Channel16 selected
00886   *     @arg ADC_Channel_17: ADC Channel17 selected
00887   *     @arg ADC_Channel_18: ADC Channel18 selected
00888   * @retval None
00889   */
00890 void ADC_AnalogWatchdog3SingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
00891 {
00892   uint32_t tmpreg = 0;
00893   /* Check the parameters */
00894   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00895   assert_param(IS_ADC_CHANNEL(ADC_Channel));
00896   /* Get the old register value */
00897   tmpreg = ADCx->AWD3CR;
00898   /* Clear the Analog watchdog channel select bits */
00899   tmpreg &= ~(uint32_t)ADC_AWD3CR_AWD3CH;
00900   /* Set the Analog watchdog channel */
00901   tmpreg |= (uint32_t)1 << (ADC_Channel);
00902   /* Store the new register value */
00903   ADCx->AWD3CR |= tmpreg;
00904 }
00905 
00906 /**
00907   * @}
00908   */
00909 
00910 /** @defgroup ADC_Group3 Temperature Sensor - Vrefint (Internal Reference Voltage) and VBAT management functions
00911  *  @brief   Vbat, Temperature Sensor & Vrefint (Internal Reference Voltage) management function 
00912  *
00913 @verbatim   
00914  ====================================================================================================
00915   ##### Temperature Sensor - Vrefint (Internal Reference Voltage) and VBAT management functions #####
00916  ====================================================================================================  
00917 
00918   [..] This section provides a function allowing to enable/ disable the internal 
00919   connections between the ADC and the Vbat/2, Temperature Sensor and the Vrefint source.
00920 
00921   [..] A typical configuration to get the Temperature sensor and Vrefint channels 
00922   voltages is done following these steps :
00923    (#) Enable the internal connection of Vbat/2, Temperature sensor and Vrefint sources 
00924        with the ADC channels using:
00925       (++) ADC_TempSensorCmd()  
00926       (++) ADC_VrefintCmd() 
00927       (++) ADC_VbatCmd()  
00928 
00929    (#) select the ADC_Channel_TempSensor and/or ADC_Channel_Vrefint and/or ADC_Channel_Vbat using 
00930       (++) ADC_RegularChannelConfig() or  
00931       (++) ADC_InjectedInit() functions 
00932 
00933    (#) Get the voltage values, using:
00934       (++) ADC_GetConversionValue() or  
00935       (++) ADC_GetInjectedConversionValue().
00936  
00937 @endverbatim
00938   * @{
00939   */
00940 
00941 /**
00942   * @brief  Enables or disables the temperature sensor channel.
00943   * @param  ADCx: where x can be 1 to select the ADC peripheral.
00944   * @param  NewState: new state of the temperature sensor.
00945   *   This parameter can be: ENABLE or DISABLE.
00946   * @retval None
00947   */
00948 void ADC_TempSensorCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00949 {
00950   /* Check the parameters */
00951   assert_param(IS_FUNCTIONAL_STATE(NewState));
00952 
00953   if (NewState != DISABLE)
00954    {
00955      /* Enable the temperature sensor channel*/
00956      ADC1_2->CCR |= ADC12_CCR_TSEN;
00957    }
00958   else
00959    {
00960      /* Disable the temperature sensor channel*/
00961      ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_TSEN;
00962    }
00963 }
00964 
00965 /**
00966   * @brief  Enables or disables the Vrefint channel.
00967   * @param  ADCx: where x can be 1 or 4 to select the ADC peripheral.
00968   * @param  NewState: new state of the Vrefint.
00969   *   This parameter can be: ENABLE or DISABLE.
00970   * @retval None
00971   */
00972 void ADC_VrefintCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00973 {
00974   /* Check the parameters */
00975   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00976   assert_param(IS_FUNCTIONAL_STATE(NewState));
00977 
00978   if((ADCx == ADC1) || (ADCx == ADC2))
00979   {
00980     if (NewState != DISABLE)
00981     {
00982       /* Enable the Vrefint channel*/
00983       ADC1_2->CCR |= ADC12_CCR_VREFEN;
00984     }
00985     else
00986     {
00987       /* Disable the Vrefint channel*/
00988       ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_VREFEN;
00989     }
00990   }
00991   else
00992   {
00993     if (NewState != DISABLE)
00994     {
00995       /* Enable the Vrefint channel*/
00996       ADC3_4->CCR |= ADC34_CCR_VREFEN;
00997     }
00998     else
00999     {
01000       /* Disable the Vrefint channel*/
01001       ADC3_4->CCR &= ~(uint32_t)ADC34_CCR_VREFEN;
01002     }
01003   }
01004 }
01005 
01006 /**
01007   * @brief  Enables or disables the Vbat channel.
01008   * @param  ADCx: where x can be 1 to select the ADC peripheral.
01009   * @param  NewState: new state of the Vbat.
01010   *   This parameter can be: ENABLE or DISABLE.
01011   * @retval None
01012   */
01013 void ADC_VbatCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01014 {
01015   /* Check the parameters */
01016   assert_param(IS_FUNCTIONAL_STATE(NewState));
01017 
01018   if (NewState != DISABLE)
01019    {
01020      /* Enable the Vbat channel*/
01021      ADC1_2->CCR |= ADC12_CCR_VBATEN;
01022    }
01023   else
01024    {
01025      /* Disable the Vbat channel*/
01026      ADC1_2->CCR &= ~(uint32_t)ADC12_CCR_VBATEN;
01027    }
01028 }
01029 
01030 /**
01031   * @}
01032   */
01033 
01034 /** @defgroup ADC_Group4 Regular Channels Configuration functions
01035  *  @brief   Regular Channels Configuration functions 
01036  *
01037 @verbatim   
01038  ===============================================================================
01039                   ##### Channels Configuration functions #####
01040  ===============================================================================  
01041 
01042   [..] This section provides functions allowing to manage the ADC regular channels.
01043    
01044   [..] To configure a regular sequence of channels use:
01045    (#) ADC_RegularChannelConfig()
01046        this function allows:
01047        (++) Configure the rank in the regular group sequencer for each channel
01048        (++) Configure the sampling time for each channel
01049 
01050    (#) ADC_RegularChannelSequencerLengthConfig() to set the length of the regular sequencer
01051 
01052    [..] The regular trigger is configured using the following functions:
01053    (#) ADC_SelectExternalTrigger()
01054    (#) ADC_ExternalTriggerPolarityConfig()
01055 
01056    [..] The start and the stop conversion are controlled by:
01057    (#) ADC_StartConversion()
01058    (#) ADC_StopConversion()
01059     
01060    [..] 
01061    (@)Please Note that the following features for regular channels are configured
01062      using the ADC_Init() function : 
01063           (++) continuous mode activation
01064           (++) Resolution  
01065           (++) Data Alignement 
01066           (++) Overrun Mode.
01067      
01068   [..] Get the conversion data: This subsection provides an important function in 
01069      the ADC peripheral since it returns the converted data of the current 
01070      regular channel. When the Conversion value is read, the EOC Flag is 
01071      automatically cleared.
01072 
01073   [..] To configure the  discontinuous mode, the following functions should be used:
01074    (#) ADC_DiscModeChannelCountConfig() to configure the number of discontinuous channel to be converted.
01075    (#) ADC_DiscModeCmd() to enable the discontinuous mode.
01076 
01077   [..] To configure and enable/disable the Channel offset use the functions:
01078      (++) ADC_SetChannelOffset1()
01079      (++) ADC_SetChannelOffset2()
01080      (++) ADC_SetChannelOffset3()
01081      (++) ADC_SetChannelOffset4()
01082      (++) ADC_ChannelOffset1Cmd()
01083      (++) ADC_ChannelOffset2Cmd()
01084      (++) ADC_ChannelOffset3Cmd()
01085      (++) ADC_ChannelOffset4Cmd()
01086   
01087 @endverbatim
01088   * @{
01089   */
01090 
01091 /**
01092   * @brief  Configures for the selected ADC regular channel its corresponding
01093   *         rank in the sequencer and its sample time.
01094   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01095   * @param  ADC_Channel: the ADC channel to configure. 
01096   *   This parameter can be one of the following values:
01097   *     @arg ADC_Channel_1: ADC Channel1 selected
01098   *     @arg ADC_Channel_2: ADC Channel2 selected
01099   *     @arg ADC_Channel_3: ADC Channel3 selected
01100   *     @arg ADC_Channel_4: ADC Channel4 selected
01101   *     @arg ADC_Channel_5: ADC Channel5 selected
01102   *     @arg ADC_Channel_6: ADC Channel6 selected
01103   *     @arg ADC_Channel_7: ADC Channel7 selected
01104   *     @arg ADC_Channel_8: ADC Channel8 selected
01105   *     @arg ADC_Channel_9: ADC Channel9 selected
01106   *     @arg ADC_Channel_10: ADC Channel10 selected
01107   *     @arg ADC_Channel_11: ADC Channel11 selected
01108   *     @arg ADC_Channel_12: ADC Channel12 selected
01109   *     @arg ADC_Channel_13: ADC Channel13 selected
01110   *     @arg ADC_Channel_14: ADC Channel14 selected
01111   *     @arg ADC_Channel_15: ADC Channel15 selected
01112   *     @arg ADC_Channel_16: ADC Channel16 selected
01113   *     @arg ADC_Channel_17: ADC Channel17 selected
01114   *     @arg ADC_Channel_18: ADC Channel18 selected
01115   * @param  Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16.
01116   * @param  ADC_SampleTime: The sample time value to be set for the selected channel. 
01117   *   This parameter can be one of the following values:
01118   *     @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
01119   *     @arg ADC_SampleTime_2Cycles5: Sample time equal to 2.5 cycles
01120   *     @arg ADC_SampleTime_4Cycles5: Sample time equal to 4.5 cycles
01121   *     @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles   
01122   *     @arg ADC_SampleTime_19Cycles5: Sample time equal to 19.5 cycles 
01123   *     @arg ADC_SampleTime_61Cycles5: Sample time equal to 61.5 cycles 
01124   *     @arg ADC_SampleTime_181Cycles5: Sample time equal to 181.5 cycles   
01125   *     @arg ADC_SampleTime_601Cycles5: Sample time equal to 601.5 cycles   
01126   * @retval None
01127   */
01128 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
01129 {
01130   uint32_t tmpreg1 = 0, tmpreg2 = 0;
01131   /* Check the parameters */
01132   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01133   assert_param(IS_ADC_CHANNEL(ADC_Channel));
01134   assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
01135 
01136   /* Regular sequence configuration */
01137   /* For Rank 1 to 4 */
01138   if (Rank < 5)
01139   {
01140     /* Get the old register value */
01141     tmpreg1 = ADCx->SQR1;
01142     /* Calculate the mask to clear */
01143     tmpreg2 = 0x1F << (6 * (Rank ));
01144     /* Clear the old SQx bits for the selected rank */
01145     tmpreg1 &= ~tmpreg2;
01146     /* Calculate the mask to set */
01147     tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank));
01148     /* Set the SQx bits for the selected rank */
01149     tmpreg1 |= tmpreg2;
01150     /* Store the new register value */
01151     ADCx->SQR1 = tmpreg1;
01152   }
01153   /* For Rank 5 to 9 */
01154   else if (Rank < 10)
01155   {
01156     /* Get the old register value */
01157     tmpreg1 = ADCx->SQR2;
01158     /* Calculate the mask to clear */
01159     tmpreg2 = ADC_SQR2_SQ5 << (6 * (Rank - 5));
01160     /* Clear the old SQx bits for the selected rank */
01161     tmpreg1 &= ~tmpreg2;
01162     /* Calculate the mask to set */
01163     tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 5));
01164     /* Set the SQx bits for the selected rank */
01165     tmpreg1 |= tmpreg2;
01166     /* Store the new register value */
01167     ADCx->SQR2 = tmpreg1;
01168   }
01169   /* For Rank 10 to 14 */
01170   else if (Rank < 15)
01171   {
01172     /* Get the old register value */
01173     tmpreg1 = ADCx->SQR3;
01174     /* Calculate the mask to clear */
01175     tmpreg2 = ADC_SQR3_SQ10 << (6 * (Rank - 10));
01176     /* Clear the old SQx bits for the selected rank */
01177     tmpreg1 &= ~tmpreg2;
01178     /* Calculate the mask to set */
01179     tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 10));
01180     /* Set the SQx bits for the selected rank */
01181     tmpreg1 |= tmpreg2;
01182     /* Store the new register value */
01183     ADCx->SQR3 = tmpreg1;
01184   }
01185   else 
01186   {
01187     /* Get the old register value */
01188     tmpreg1 = ADCx->SQR4;
01189     /* Calculate the mask to clear */
01190     tmpreg2 = ADC_SQR3_SQ15 << (6 * (Rank - 15));
01191     /* Clear the old SQx bits for the selected rank */
01192     tmpreg1 &= ~tmpreg2;
01193     /* Calculate the mask to set */
01194     tmpreg2 = (uint32_t)(ADC_Channel) << (6 * (Rank - 15));
01195     /* Set the SQx bits for the selected rank */
01196     tmpreg1 |= tmpreg2;
01197     /* Store the new register value */
01198     ADCx->SQR4 = tmpreg1;
01199   }
01200 
01201   /* Channel sampling configuration */
01202   /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
01203   if (ADC_Channel > ADC_Channel_9)
01204   {
01205     /* Get the old register value */
01206     tmpreg1 = ADCx->SMPR2;
01207     /* Calculate the mask to clear */
01208     tmpreg2 = ADC_SMPR2_SMP10 << (3 * (ADC_Channel - 10));
01209     /* Clear the old channel sample time */
01210     ADCx->SMPR2 &= ~tmpreg2;
01211     /* Calculate the mask to set */
01212     ADCx->SMPR2 |= (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
01213 
01214   }
01215   else /* ADC_Channel include in ADC_Channel_[0..9] */
01216   {
01217     /* Get the old register value */
01218     tmpreg1 = ADCx->SMPR1;
01219     /* Calculate the mask to clear */
01220     tmpreg2 = ADC_SMPR1_SMP1 << (3 * (ADC_Channel - 1));
01221     /* Clear the old channel sample time */
01222     ADCx->SMPR1 &= ~tmpreg2;
01223     /* Calculate the mask to set */
01224     ADCx->SMPR1 |= (uint32_t)ADC_SampleTime << (3 * (ADC_Channel));
01225   }
01226 }
01227 
01228 /**
01229   * @brief  Sets the ADC regular channel sequence lenght.
01230   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01231   * @param  SequenceLength: The Regular sequence length. This parameter must be between 1 to 16.
01232   *   This parameter can be: ENABLE or DISABLE.
01233   * @retval None
01234   */
01235 void ADC_RegularChannelSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t SequencerLength)
01236 {
01237   /* Check the parameters */
01238   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01239 
01240   /* Configure the ADC sequence lenght */  
01241   ADCx->SQR1 &= ~(uint32_t)ADC_SQR1_L;
01242   ADCx->SQR1 |= (uint32_t)(SequencerLength - 1);   
01243 }
01244 
01245 /**
01246   * @brief  External Trigger Enable and Polarity Selection for regular channels.
01247   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01248   * @param  ADC_ExternalTrigConvEvent: ADC external Trigger source.
01249   *   This parameter can be one of the following values:
01250   *     @arg ADC_ExternalTrigger_Event0: External trigger event 0 
01251   *     @arg ADC_ExternalTrigger_Event1: External trigger event 1
01252   *     @arg ADC_ExternalTrigger_Event2: External trigger event 2
01253   *     @arg ADC_ExternalTrigger_Event3: External trigger event 3
01254   *     @arg ADC_ExternalTrigger_Event4: External trigger event 4 
01255   *     @arg ADC_ExternalTrigger_Event5: External trigger event 5
01256   *     @arg ADC_ExternalTrigger_Event6: External trigger event 6
01257   *     @arg ADC_ExternalTrigger_Event7: External trigger event 7
01258   *     @arg ADC_ExternalTrigger_Event8: External trigger event 8 
01259   *     @arg ADC_ExternalTrigger_Event9: External trigger event 9
01260   *     @arg ADC_ExternalTrigger_Event10: External trigger event 10
01261   *     @arg ADC_ExternalTrigger_Event11: External trigger event 11
01262   *     @arg ADC_ExternalTrigger_Event12: External trigger event 12 
01263   *     @arg ADC_ExternalTrigger_Event13: External trigger event 13
01264   *     @arg ADC_ExternalTrigger_Event14: External trigger event 14
01265   *     @arg ADC_ExternalTrigger_Event15: External trigger event 15   
01266   * @param  ADC_ExternalTrigEventEdge: ADC external Trigger Polarity.
01267   *   This parameter can be one of the following values:
01268   *     @arg ADC_ExternalTrigEventEdge_OFF: Hardware trigger detection disabled 
01269   *                                          (conversions can be launched by software)
01270   *     @arg ADC_ExternalTrigEventEdge_RisingEdge: Hardware trigger detection on the rising edge
01271   *     @arg ADC_ExternalTrigEventEdge_FallingEdge: Hardware trigger detection on the falling edge
01272   *     @arg ADC_ExternalTrigEventEdge_BothEdge: Hardware trigger detection on both the rising and falling edges    
01273   * @retval None
01274   */
01275 void ADC_ExternalTriggerConfig(ADC_TypeDef* ADCx, uint16_t ADC_ExternalTrigConvEvent, uint16_t ADC_ExternalTrigEventEdge)
01276 {
01277   /* Check the parameters */
01278   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01279   assert_param(IS_ADC_EXT_TRIG(ADC_ExternalTrigConvEvent));
01280   assert_param(IS_EXTERNALTRIG_EDGE(ADC_ExternalTrigEventEdge));
01281 
01282   /* Disable the selected ADC conversion on external event */
01283   ADCx->CFGR &= ~(ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL);
01284   ADCx->CFGR |= (uint32_t)(ADC_ExternalTrigEventEdge | ADC_ExternalTrigConvEvent);
01285 }
01286 
01287 /**
01288   * @brief  Enables or disables the selected ADC start conversion .
01289   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01290   * @retval None
01291   */
01292 void ADC_StartConversion(ADC_TypeDef* ADCx)
01293 {
01294   /* Check the parameters */
01295   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01296 
01297   /* Set the ADSTART bit */
01298   ADCx->CR |= ADC_CR_ADSTART;
01299 }
01300 
01301 /**
01302   * @brief  Gets the selected ADC start conversion Status.
01303   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01304   * @retval The new state of ADC start conversion (SET or RESET).
01305   */
01306 FlagStatus ADC_GetStartConversionStatus(ADC_TypeDef* ADCx)
01307 {
01308   FlagStatus bitstatus = RESET;
01309   /* Check the parameters */
01310   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01311   /* Check the status of ADSTART bit */
01312   if ((ADCx->CR & ADC_CR_ADSTART) != (uint32_t)RESET)
01313   {
01314     /* ADSTART bit is set */
01315     bitstatus = SET;
01316   }
01317   else
01318   {
01319     /* ADSTART bit is reset */
01320     bitstatus = RESET;
01321   }
01322   /* Return the ADSTART bit status */
01323   return  bitstatus;
01324 }
01325 
01326 /**
01327   * @brief  Stops the selected ADC ongoing conversion.
01328   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01329   * @retval None
01330   */
01331 void ADC_StopConversion(ADC_TypeDef* ADCx)
01332 {
01333   /* Check the parameters */
01334   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01335 
01336   /* Set the ADSTP bit */
01337    ADCx->CR |= ADC_CR_ADSTP;
01338 }
01339 
01340 
01341 /**
01342   * @brief  Configures the discontinuous mode for the selected ADC regular
01343   *         group channel.
01344   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01345   * @param  Number: specifies the discontinuous mode regular channel
01346   *         count value. This number must be between 1 and 8.
01347   * @retval None
01348   */
01349 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
01350 {
01351   uint32_t tmpreg1 = 0;
01352   uint32_t tmpreg2 = 0;
01353   /* Check the parameters */
01354   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01355   assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
01356   /* Get the old register value */
01357   tmpreg1 = ADCx->CFGR;
01358   /* Clear the old discontinuous mode channel count */
01359   tmpreg1 &= ~(uint32_t)(ADC_CFGR_DISCNUM);
01360   /* Set the discontinuous mode channel count */
01361   tmpreg2 = Number - 1;
01362   tmpreg1 |= tmpreg2 << 17;
01363   /* Store the new register value */
01364   ADCx->CFGR = tmpreg1;
01365 }
01366 
01367 /**
01368   * @brief  Enables or disables the discontinuous mode on regular group
01369   *         channel for the specified ADC
01370   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01371   * @param  NewState: new state of the selected ADC discontinuous mode
01372   *         on regular group channel.
01373   *         This parameter can be: ENABLE or DISABLE.
01374   * @retval None
01375   */
01376 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01377 {
01378   /* Check the parameters */
01379   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01380   assert_param(IS_FUNCTIONAL_STATE(NewState));
01381   if (NewState != DISABLE)
01382   {
01383     /* Enable the selected ADC regular discontinuous mode */
01384     ADCx->CFGR |= ADC_CFGR_DISCEN;
01385   }
01386   else
01387   {
01388     /* Disable the selected ADC regular discontinuous mode */
01389     ADCx->CFGR &= ~(uint32_t)(ADC_CFGR_DISCEN);
01390   }
01391 }
01392 
01393 /**
01394   * @brief  Returns the last ADCx conversion result data for regular channel.
01395   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01396   * @retval The Data conversion value.
01397   */
01398 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
01399 {
01400   /* Check the parameters */
01401   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01402   /* Return the selected ADC conversion value */
01403   return (uint16_t) ADCx->DR;
01404 }
01405 
01406 /**
01407   * @brief  Returns the last ADC1, ADC2, ADC3 and ADC4 regular conversions results 
01408   *         data in the selected dual mode.
01409   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.  
01410   * @retval The Data conversion value.
01411   * @note   In dual mode, the value returned by this function is as following
01412   *           Data[15:0] : these bits contain the regular data of the Master ADC.
01413   *           Data[31:16]: these bits contain the regular data of the Slave ADC.           
01414   */
01415 uint32_t ADC_GetDualModeConversionValue(ADC_TypeDef* ADCx)
01416 {
01417   uint32_t tmpreg1 = 0;
01418 
01419   /* Check the parameters */
01420   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01421 
01422   if((ADCx == ADC1) || (ADCx== ADC2))
01423   {
01424     /* Get the dual mode conversion value */
01425     tmpreg1 = ADC1_2->CDR;
01426   }
01427   else
01428   { 
01429     /* Get the dual mode conversion value */
01430     tmpreg1 = ADC3_4->CDR;
01431   }
01432   /* Return the dual mode conversion value */
01433   return (uint32_t) tmpreg1;
01434 }
01435 
01436 /**
01437   * @brief  Set the ADC channels conversion value offset1
01438   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01439   * @param  ADC_Channel: the ADC channel to configure. 
01440   *   This parameter can be one of the following values:
01441   *     @arg ADC_Channel_1: ADC Channel1 selected
01442   *     @arg ADC_Channel_2: ADC Channel2 selected
01443   *     @arg ADC_Channel_3: ADC Channel3 selected
01444   *     @arg ADC_Channel_4: ADC Channel4 selected
01445   *     @arg ADC_Channel_5: ADC Channel5 selected
01446   *     @arg ADC_Channel_6: ADC Channel6 selected
01447   *     @arg ADC_Channel_7: ADC Channel7 selected
01448   *     @arg ADC_Channel_8: ADC Channel8 selected
01449   *     @arg ADC_Channel_9: ADC Channel9 selected
01450   *     @arg ADC_Channel_10: ADC Channel10 selected
01451   *     @arg ADC_Channel_11: ADC Channel11 selected
01452   *     @arg ADC_Channel_12: ADC Channel12 selected
01453   *     @arg ADC_Channel_13: ADC Channel13 selected
01454   *     @arg ADC_Channel_14: ADC Channel14 selected
01455   *     @arg ADC_Channel_15: ADC Channel15 selected
01456   *     @arg ADC_Channel_16: ADC Channel16 selected
01457   *     @arg ADC_Channel_17: ADC Channel17 selected
01458   *     @arg ADC_Channel_18: ADC Channel18 selected
01459   * @param  Offset: the offset value for the selected ADC Channel
01460   *   This parameter must be a 12bit value.
01461   * @retval None
01462   */
01463 void ADC_SetChannelOffset1(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
01464 {
01465   /* Check the parameters */
01466   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01467   assert_param(IS_ADC_CHANNEL(ADC_Channel));
01468   assert_param(IS_ADC_OFFSET(Offset));
01469     
01470   /* Select the Channel */
01471   ADCx->OFR1 &= ~ (uint32_t) ADC_OFR1_OFFSET1_CH;
01472   ADCx->OFR1 |= (uint32_t)((uint32_t)ADC_Channel << 26);
01473 
01474   /* Set the data offset */
01475   ADCx->OFR1 &= ~ (uint32_t) ADC_OFR1_OFFSET1;
01476   ADCx->OFR1 |= (uint32_t)Offset;
01477 }
01478 
01479 /**
01480   * @brief  Set the ADC channels conversion value offset2
01481   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01482   * @param  ADC_Channel: the ADC channel to configure. 
01483   *   This parameter can be one of the following values:
01484   *     @arg ADC_Channel_1: ADC Channel1 selected
01485   *     @arg ADC_Channel_2: ADC Channel2 selected
01486   *     @arg ADC_Channel_3: ADC Channel3 selected
01487   *     @arg ADC_Channel_4: ADC Channel4 selected
01488   *     @arg ADC_Channel_5: ADC Channel5 selected
01489   *     @arg ADC_Channel_6: ADC Channel6 selected
01490   *     @arg ADC_Channel_7: ADC Channel7 selected
01491   *     @arg ADC_Channel_8: ADC Channel8 selected
01492   *     @arg ADC_Channel_9: ADC Channel9 selected
01493   *     @arg ADC_Channel_10: ADC Channel10 selected
01494   *     @arg ADC_Channel_11: ADC Channel11 selected
01495   *     @arg ADC_Channel_12: ADC Channel12 selected
01496   *     @arg ADC_Channel_13: ADC Channel13 selected
01497   *     @arg ADC_Channel_14: ADC Channel14 selected
01498   *     @arg ADC_Channel_15: ADC Channel15 selected
01499   *     @arg ADC_Channel_16: ADC Channel16 selected
01500   *     @arg ADC_Channel_17: ADC Channel17 selected
01501   *     @arg ADC_Channel_18: ADC Channel18 selected
01502   * @param  Offset: the offset value for the selected ADC Channel
01503   *   This parameter must be a 12bit value.
01504   * @retval None
01505   */
01506 void ADC_SetChannelOffset2(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
01507 {
01508   /* Check the parameters */
01509   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01510   assert_param(IS_ADC_CHANNEL(ADC_Channel));
01511   assert_param(IS_ADC_OFFSET(Offset));
01512     
01513   /* Select the Channel */
01514   ADCx->OFR2 &= ~ (uint32_t) ADC_OFR2_OFFSET2_CH;
01515   ADCx->OFR2 |= (uint32_t)((uint32_t)ADC_Channel << 26);
01516 
01517   /* Set the data offset */
01518   ADCx->OFR2 &= ~ (uint32_t) ADC_OFR2_OFFSET2;
01519   ADCx->OFR2 |= (uint32_t)Offset;
01520 }
01521 
01522 /**
01523   * @brief  Set the ADC channels conversion value offset3
01524   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01525   * @param  ADC_Channel: the ADC channel to configure. 
01526   *   This parameter can be one of the following values:
01527   *     @arg ADC_Channel_1: ADC Channel1 selected
01528   *     @arg ADC_Channel_2: ADC Channel2 selected
01529   *     @arg ADC_Channel_3: ADC Channel3 selected
01530   *     @arg ADC_Channel_4: ADC Channel4 selected
01531   *     @arg ADC_Channel_5: ADC Channel5 selected
01532   *     @arg ADC_Channel_6: ADC Channel6 selected
01533   *     @arg ADC_Channel_7: ADC Channel7 selected
01534   *     @arg ADC_Channel_8: ADC Channel8 selected
01535   *     @arg ADC_Channel_9: ADC Channel9 selected
01536   *     @arg ADC_Channel_10: ADC Channel10 selected
01537   *     @arg ADC_Channel_11: ADC Channel11 selected
01538   *     @arg ADC_Channel_12: ADC Channel12 selected
01539   *     @arg ADC_Channel_13: ADC Channel13 selected
01540   *     @arg ADC_Channel_14: ADC Channel14 selected
01541   *     @arg ADC_Channel_15: ADC Channel15 selected
01542   *     @arg ADC_Channel_16: ADC Channel16 selected
01543   *     @arg ADC_Channel_17: ADC Channel17 selected
01544   *     @arg ADC_Channel_18: ADC Channel18 selected
01545   * @param  Offset: the offset value for the selected ADC Channel
01546   *   This parameter must be a 12bit value.
01547   * @retval None
01548   */
01549 void ADC_SetChannelOffset3(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
01550 {
01551   /* Check the parameters */
01552   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01553   assert_param(IS_ADC_CHANNEL(ADC_Channel));
01554   assert_param(IS_ADC_OFFSET(Offset));
01555     
01556   /* Select the Channel */
01557   ADCx->OFR3 &= ~ (uint32_t) ADC_OFR3_OFFSET3_CH;
01558   ADCx->OFR3 |= (uint32_t)((uint32_t)ADC_Channel << 26);
01559 
01560   /* Set the data offset */
01561   ADCx->OFR3 &= ~ (uint32_t) ADC_OFR3_OFFSET3;
01562   ADCx->OFR3 |= (uint32_t)Offset;
01563 }
01564 
01565 /**
01566   * @brief  Set the ADC channels conversion value offset4
01567   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01568   * @param  ADC_Channel: the ADC channel to configure. 
01569   *   This parameter can be one of the following values:
01570   *     @arg ADC_Channel_1: ADC Channel1 selected
01571   *     @arg ADC_Channel_2: ADC Channel2 selected
01572   *     @arg ADC_Channel_3: ADC Channel3 selected
01573   *     @arg ADC_Channel_4: ADC Channel4 selected
01574   *     @arg ADC_Channel_5: ADC Channel5 selected
01575   *     @arg ADC_Channel_6: ADC Channel6 selected
01576   *     @arg ADC_Channel_7: ADC Channel7 selected
01577   *     @arg ADC_Channel_8: ADC Channel8 selected
01578   *     @arg ADC_Channel_9: ADC Channel9 selected
01579   *     @arg ADC_Channel_10: ADC Channel10 selected
01580   *     @arg ADC_Channel_11: ADC Channel11 selected
01581   *     @arg ADC_Channel_12: ADC Channel12 selected
01582   *     @arg ADC_Channel_13: ADC Channel13 selected
01583   *     @arg ADC_Channel_14: ADC Channel14 selected
01584   *     @arg ADC_Channel_15: ADC Channel15 selected
01585   *     @arg ADC_Channel_16: ADC Channel16 selected
01586   *     @arg ADC_Channel_17: ADC Channel17 selected
01587   *     @arg ADC_Channel_18: ADC Channel18 selected
01588   * @param  Offset: the offset value for the selected ADC Channel
01589   *   This parameter must be a 12bit value.
01590   * @retval None
01591   */
01592 void ADC_SetChannelOffset4(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint16_t Offset)
01593 {
01594   /* Check the parameters */
01595   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01596   assert_param(IS_ADC_CHANNEL(ADC_Channel));
01597   assert_param(IS_ADC_OFFSET(Offset));
01598     
01599   /* Select the Channel */
01600   ADCx->OFR4 &= ~ (uint32_t) ADC_OFR4_OFFSET4_CH;
01601   ADCx->OFR4 |= (uint32_t)((uint32_t)ADC_Channel << 26);
01602 
01603   /* Set the data offset */
01604   ADCx->OFR4 &= ~ (uint32_t) ADC_OFR4_OFFSET4;
01605   ADCx->OFR4 |= (uint32_t)Offset;
01606 }
01607 
01608 /**
01609   * @brief  Enables or disables the Offset1.
01610   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01611   * @param  NewState: new state of the ADCx offset1.
01612   *   This parameter can be: ENABLE or DISABLE.
01613   * @retval None
01614   */
01615 void ADC_ChannelOffset1Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01616 {
01617   /* Check the parameters */
01618   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01619   assert_param(IS_FUNCTIONAL_STATE(NewState));
01620 
01621   if (NewState != DISABLE)
01622   {
01623     /* Set the OFFSET1_EN bit */
01624     ADCx->OFR1 |= ADC_OFR1_OFFSET1_EN;
01625   }
01626   else
01627   {
01628     /* Reset the OFFSET1_EN bit */
01629     ADCx->OFR1 &= ~(ADC_OFR1_OFFSET1_EN);
01630   }
01631 }
01632 
01633 /**
01634   * @brief  Enables or disables the Offset2.
01635   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01636   * @param  NewState: new state of the ADCx offset2.
01637   *   This parameter can be: ENABLE or DISABLE.
01638   * @retval None
01639   */
01640 void ADC_ChannelOffset2Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01641 {
01642   /* Check the parameters */
01643   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01644   assert_param(IS_FUNCTIONAL_STATE(NewState));
01645 
01646   if (NewState != DISABLE)
01647   {
01648     /* Set the OFFSET1_EN bit */
01649     ADCx->OFR2 |= ADC_OFR2_OFFSET2_EN;
01650   }
01651   else
01652   {
01653     /* Reset the OFFSET1_EN bit */
01654     ADCx->OFR2 &= ~(ADC_OFR2_OFFSET2_EN);
01655   }
01656 }
01657 
01658 /**
01659   * @brief  Enables or disables the Offset3.
01660   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01661   * @param  NewState: new state of the ADCx offset3.
01662   *   This parameter can be: ENABLE or DISABLE.
01663   * @retval None
01664   */
01665 void ADC_ChannelOffset3Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01666 {
01667   /* Check the parameters */
01668   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01669   assert_param(IS_FUNCTIONAL_STATE(NewState));
01670 
01671   if (NewState != DISABLE)
01672   {
01673     /* Set the OFFSET1_EN bit */
01674     ADCx->OFR3 |= ADC_OFR3_OFFSET3_EN;
01675   }
01676   else
01677   {
01678     /* Reset the OFFSET1_EN bit */
01679     ADCx->OFR3 &= ~(ADC_OFR3_OFFSET3_EN);
01680   }
01681 }
01682 
01683 /**
01684   * @brief  Enables or disables the Offset4.
01685   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01686   * @param  NewState: new state of the ADCx offset4.
01687   *   This parameter can be: ENABLE or DISABLE.
01688   * @retval None
01689   */
01690 void ADC_ChannelOffset4Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01691 {
01692   /* Check the parameters */
01693   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01694   assert_param(IS_FUNCTIONAL_STATE(NewState));
01695 
01696   if (NewState != DISABLE)
01697   {
01698     /* Set the OFFSET1_EN bit */
01699     ADCx->OFR4 |= ADC_OFR4_OFFSET4_EN;
01700   }
01701   else
01702   {
01703     /* Reset the OFFSET1_EN bit */
01704     ADCx->OFR4 &= ~(ADC_OFR4_OFFSET4_EN);
01705   }
01706 }
01707 
01708 /**
01709   * @}
01710   */
01711 
01712 /** @defgroup ADC_Group5 Regular Channels DMA Configuration functions
01713  *  @brief   Regular Channels DMA Configuration functions 
01714  *
01715 @verbatim   
01716  ===============================================================================
01717                    ##### Regular Channels DMA Configuration functions #####
01718  ===============================================================================  
01719 
01720   [..] This section provides functions allowing to configure the DMA for ADC regular 
01721   channels. Since converted regular channel values are stored into a unique data register, 
01722   it is useful to use DMA for conversion of more than one regular channel. This 
01723   avoids the loss of the data already stored in the ADC Data register. 
01724   
01725   (#) ADC_DMACmd() function is used to enable the ADC DMA mode, after each
01726       conversion of a regular channel, a DMA request is generated.
01727   (#) ADC_DMAConfig() function is used to select between the one shot DMA mode 
01728       or the circular DMA mode
01729 
01730 @endverbatim
01731   * @{
01732   */
01733 
01734 /**
01735   * @brief  Enables or disables the specified ADC DMA request.
01736   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01737   * @param  NewState: new state of the selected ADC DMA transfer.
01738   *   This parameter can be: ENABLE or DISABLE.
01739   * @retval None
01740   */
01741 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01742 {
01743   /* Check the parameters */
01744   assert_param(IS_ADC_DMA_PERIPH(ADCx));
01745   assert_param(IS_FUNCTIONAL_STATE(NewState));
01746   if (NewState != DISABLE)
01747   {
01748     /* Enable the selected ADC DMA request */
01749     ADCx->CFGR |= ADC_CFGR_DMAEN;
01750   }
01751   else
01752   {
01753     /* Disable the selected ADC DMA request */
01754     ADCx->CFGR &= ~(uint32_t)ADC_CFGR_DMAEN;
01755   }
01756 }
01757 
01758 /**
01759   * @brief  Configure ADC DMA mode.
01760   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01761   * @param  ADC_DMAMode: select the ADC DMA mode.
01762   *   This parameter can be one of the following values:
01763   *     @arg ADC_DMAMode_OneShot: ADC DMA Oneshot mode
01764   *     @arg ADC_DMAMode_Circular: ADC DMA circular mode
01765   * @retval None
01766   */
01767 void ADC_DMAConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMAMode)
01768 {
01769   /* Check the parameters */
01770   assert_param(IS_ADC_DMA_PERIPH(ADCx));
01771   assert_param(IS_ADC_DMA_MODE(ADC_DMAMode));
01772 
01773   /* Set or reset the DMACFG bit */
01774    ADCx->CFGR &= ~(uint32_t)ADC_CFGR_DMACFG;
01775    ADCx->CFGR |= ADC_DMAMode;
01776 }
01777 
01778 /**
01779   * @}
01780   */
01781 
01782 /** @defgroup ADC_Group6 Injected channels Configuration functions
01783  *  @brief   Injected channels Configuration functions 
01784  *
01785 @verbatim   
01786  ===============================================================================
01787                      ##### Injected channels Configuration functions #####
01788  ===============================================================================  
01789 
01790   [..] This section provide functions allowing to manage the ADC Injected channels,
01791   it is composed of : 
01792     
01793    (#) Configuration functions for Injected channels sample time
01794    (#) Functions to start and stop the injected conversion
01795    (#) unction to select the discontinuous mode    
01796    (#) Function to get the Specified Injected channel conversion data: This subsection 
01797       provides an important function in the ADC peripheral since it returns the 
01798       converted data of the specific injected channel.
01799 
01800 @endverbatim
01801   * @{
01802   */ 
01803 
01804 /**
01805   * @brief  Configures for the selected ADC injected channel its corresponding
01806   *         sample time.
01807   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01808   * @param  ADC_Channel: the ADC channel to configure. 
01809   *   This parameter can be one of the following values:
01810   *     @arg ADC_InjectedChannel_1: ADC Channel1 selected
01811   *     @arg ADC_InjectedChannel_2: ADC Channel2 selected
01812   *     @arg ADC_InjectedChannel_3: ADC Channel3 selected
01813   *     @arg ADC_InjectedChannel_4: ADC Channel4 selected
01814   *     @arg ADC_InjectedChannel_5: ADC Channel5 selected
01815   *     @arg ADC_InjectedChannel_6: ADC Channel6 selected
01816   *     @arg ADC_InjectedChannel_7: ADC Channel7 selected
01817   *     @arg ADC_InjectedChannel_8: ADC Channel8 selected
01818   *     @arg ADC_InjectedChannel_9: ADC Channel9 selected
01819   *     @arg ADC_InjectedChannel_10: ADC Channel10 selected
01820   *     @arg ADC_InjectedChannel_11: ADC Channel11 selected
01821   *     @arg ADC_InjectedChannel_12: ADC Channel12 selected
01822   *     @arg ADC_InjectedChannel_13: ADC Channel13 selected
01823   *     @arg ADC_InjectedChannel_14: ADC Channel14 selected
01824   *     @arg ADC_InjectedChannel_15: ADC Channel15 selected
01825   *     @arg ADC_InjectedChannel_16: ADC Channel16 selected
01826   *     @arg ADC_InjectedChannel_17: ADC Channel17 selected
01827   *     @arg ADC_InjectedChannel_18: ADC Channel18 selected
01828   * @param  ADC_SampleTime: The sample time value to be set for the selected channel. 
01829   *   This parameter can be one of the following values:
01830   *     @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
01831   *     @arg ADC_SampleTime_2Cycles5: Sample time equal to 2.5 cycles
01832   *     @arg ADC_SampleTime_4Cycles5: Sample time equal to 4.5 cycles
01833   *     @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles   
01834   *     @arg ADC_SampleTime_19Cycles5: Sample time equal to 19.5 cycles 
01835   *     @arg ADC_SampleTime_61Cycles5: Sample time equal to 61.5 cycles 
01836   *     @arg ADC_SampleTime_181Cycles5: Sample time equal to 181.5 cycles   
01837   *     @arg ADC_SampleTime_601Cycles5: Sample time equal to 601.5 cycles   
01838   * @retval None
01839   */
01840 void ADC_InjectedChannelSampleTimeConfig(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint8_t ADC_SampleTime)
01841 {
01842   uint32_t tmpreg1 = 0;
01843   /* Check the parameters */
01844   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01845   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
01846   assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
01847 
01848   /* Channel sampling configuration */
01849   /* if ADC_InjectedChannel_10 ... ADC_InjectedChannel_18 is selected */
01850   if (ADC_InjectedChannel > ADC_InjectedChannel_9)
01851   {
01852     /* Calculate the mask to clear */
01853     tmpreg1 = ADC_SMPR2_SMP10 << (3 * (ADC_InjectedChannel - 10));
01854     /* Clear the old channel sample time */
01855     ADCx->SMPR2 &= ~tmpreg1;
01856     /* Calculate the mask to set */
01857     ADCx->SMPR2 |= (uint32_t)ADC_SampleTime << (3 * (ADC_InjectedChannel - 10));
01858 
01859   }
01860   else /* ADC_InjectedChannel include in ADC_InjectedChannel_[0..9] */
01861   {
01862     /* Calculate the mask to clear */
01863     tmpreg1 = ADC_SMPR1_SMP1 << (3 * (ADC_InjectedChannel - 1));
01864     /* Clear the old channel sample time */
01865     ADCx->SMPR1 &= ~tmpreg1;
01866     /* Calculate the mask to set */
01867     ADCx->SMPR1 |= (uint32_t)ADC_SampleTime << (3 * (ADC_InjectedChannel));
01868   }  
01869 }
01870 
01871 /**
01872   * @brief  Enables or disables the selected ADC start of the injected 
01873   *         channels conversion.
01874   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01875   * @param  NewState: new state of the selected ADC software start injected conversion.
01876   *   This parameter can be: ENABLE or DISABLE.
01877   * @retval None
01878   */
01879 void ADC_StartInjectedConversion(ADC_TypeDef* ADCx)
01880 {
01881   /* Check the parameters */
01882   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01883 
01884   /* Enable the selected ADC conversion for injected group on external event and start the selected
01885      ADC injected conversion */
01886   ADCx->CR |= ADC_CR_JADSTART;
01887 }
01888 
01889 /**
01890   * @brief  Stops the selected ADC ongoing injected conversion.
01891   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01892   * @retval None
01893   */
01894 void ADC_StopInjectedConversion(ADC_TypeDef* ADCx)
01895 {
01896   /* Check the parameters */
01897   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01898 
01899   /* Set the JADSTP bit */
01900    ADCx->CR |= ADC_CR_JADSTP;
01901 }
01902 
01903 /**
01904   * @brief  Gets the selected ADC Software start injected conversion Status.
01905   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01906   * @retval The new state of ADC start injected conversion (SET or RESET).
01907   */
01908 FlagStatus ADC_GetStartInjectedConversionStatus(ADC_TypeDef* ADCx)
01909 {
01910   FlagStatus bitstatus = RESET;
01911   /* Check the parameters */
01912   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01913 
01914   /* Check the status of JADSTART bit */
01915   if ((ADCx->CR & ADC_CR_JADSTART) != (uint32_t)RESET)
01916   {
01917     /* JADSTART bit is set */
01918     bitstatus = SET;
01919   }
01920   else
01921   {
01922     /* JADSTART bit is reset */
01923     bitstatus = RESET;
01924   }
01925   /* Return the JADSTART bit status */
01926   return  bitstatus;
01927 }
01928 
01929 /**
01930   * @brief  Enables or disables the selected ADC automatic injected group
01931   *         conversion after regular one.
01932   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01933   * @param  NewState: new state of the selected ADC auto injected conversion
01934   *   This parameter can be: ENABLE or DISABLE.
01935   * @retval None
01936   */
01937 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01938 {
01939   /* Check the parameters */
01940   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01941   assert_param(IS_FUNCTIONAL_STATE(NewState));
01942   if (NewState != DISABLE)
01943   {
01944     /* Enable the selected ADC automatic injected group conversion */
01945     ADCx->CFGR |= ADC_CFGR_JAUTO;
01946   }
01947   else
01948   {
01949     /* Disable the selected ADC automatic injected group conversion */
01950     ADCx->CFGR &= ~ADC_CFGR_JAUTO;
01951   }
01952 }
01953 
01954 /**
01955   * @brief  Enables or disables the discontinuous mode for injected group
01956   *         channel for the specified ADC
01957   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01958   * @param  NewState: new state of the selected ADC discontinuous mode
01959   *         on injected group channel.
01960   *   This parameter can be: ENABLE or DISABLE.
01961   * @retval None
01962   */
01963 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
01964 {
01965   /* Check the parameters */
01966   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01967   assert_param(IS_FUNCTIONAL_STATE(NewState));
01968   if (NewState != DISABLE)
01969   {
01970     /* Enable the selected ADC injected discontinuous mode */
01971     ADCx->CFGR |= ADC_CFGR_JDISCEN;
01972   }
01973   else
01974   {
01975     /* Disable the selected ADC injected discontinuous mode */
01976     ADCx->CFGR &= ~ADC_CFGR_JDISCEN;
01977   }
01978 }
01979 
01980 /**
01981   * @brief  Returns the ADC injected channel conversion result
01982   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
01983   * @param  ADC_InjectedSequence: the converted ADC injected sequence.
01984   *   This parameter can be one of the following values:
01985   *     @arg ADC_InjectedSequence_1: Injected Sequence1 selected
01986   *     @arg ADC_InjectedSequence_2: Injected Sequence2 selected
01987   *     @arg ADC_InjectedSequence_3: Injected Sequence3 selected
01988   *     @arg ADC_InjectedSequence_4: Injected Sequence4 selected
01989   * @retval The Data conversion value.
01990   */
01991 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedSequence)
01992 {
01993   __IO uint32_t tmp = 0;
01994   
01995   /* Check the parameters */
01996   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01997   assert_param(IS_ADC_INJECTED_SEQUENCE(ADC_InjectedSequence));
01998 
01999   tmp = (uint32_t)ADCx;
02000   tmp += ((ADC_InjectedSequence - 1 )<< 2) + JDR_Offset;
02001   
02002   /* Returns the selected injected channel conversion data value */
02003   return (uint16_t) (*(__IO uint32_t*)  tmp);   
02004 }
02005 
02006 /**
02007   * @}
02008   */
02009 
02010 /** @defgroup ADC_Group7 Interrupts and flags management functions
02011  *  @brief   Interrupts and flags management functions
02012  *
02013 @verbatim   
02014  ===============================================================================
02015                    ##### Interrupts and flags management functions #####
02016  ===============================================================================  
02017 
02018   [..] This section provides functions allowing to configure the ADC Interrupts, get 
02019         the status and clear flags and Interrupts pending bits.
02020   
02021   [..] The ADC provide 11 Interrupts sources and 11 Flags which can be divided into 3 groups:
02022   
02023   (#) Flags and Interrupts for ADC regular channels
02024   (##)Flags
02025       (+) ADC_FLAG_RDY: ADC Ready flag
02026       (+) ADC_FLAG_EOSMP: ADC End of Sampling flag
02027       (+) ADC_FLAG_EOC: ADC End of Regular Conversion flag.
02028       (+) ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag
02029       (+) ADC_FLAG_OVR: ADC overrun flag
02030      
02031   (##) Interrupts
02032       (+) ADC_IT_RDY: ADC Ready interrupt source 
02033       (+) ADC_IT_EOSMP: ADC End of Sampling interrupt source
02034       (+) ADC_IT_EOC: ADC End of Regular Conversion interrupt source
02035       (+) ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt
02036       (+) ADC_IT_OVR: ADC overrun interrupt source
02037   
02038   
02039   (#) Flags and Interrupts for ADC regular channels
02040   (##)Flags
02041       (+) ADC_FLAG_JEOC: ADC Ready flag
02042       (+) ADC_FLAG_JEOS: ADC End of Sampling flag
02043       (+) ADC_FLAG_JQOVF: ADC End of Regular Conversion flag.
02044      
02045   (##) Interrupts
02046       (+) ADC_IT_JEOC: ADC End of Injected Conversion interrupt source 
02047       (+) ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source
02048       (+) ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source   
02049 
02050   (#) General Flags and Interrupts for the ADC
02051   (##)Flags 
02052      (+)  ADC_FLAG_AWD1: ADC Analog watchdog 1 flag
02053      (+) ADC_FLAG_AWD2: ADC Analog watchdog 2 flag
02054      (+) ADC_FLAG_AWD3: ADC Analog watchdog 3 flag
02055     
02056   (##)Flags 
02057      (+)  ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source
02058      (+) ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source
02059      (+) ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source
02060      
02061   (#) Flags  for ADC dual mode
02062   (##)Flags for Master
02063      (+) ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag 
02064      (+) ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag 
02065      (+) ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag 
02066      (+) ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag 
02067      (+) ADC_FLAG_MSTOVR: ADC master overrun flag 
02068      (+) ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag 
02069      (+) ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag 
02070      (+) ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag 
02071      (+) ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag 
02072      (+) ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag 
02073      (+) ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag       
02074      
02075   (##) Flags for Slave
02076      (+) ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag 
02077      (+) ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag 
02078      (+) ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag 
02079      (+) ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag 
02080      (+) ADC_FLAG_SLVOVR: ADC slave overrun flag 
02081      (+) ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag 
02082      (+) ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag 
02083      (+) ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag 
02084      (+) ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag 
02085      (+) ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag 
02086      (+) ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag 
02087      
02088   The user should identify which mode will be used in his application to manage   
02089   the ADC controller events: Polling mode or Interrupt mode.
02090   
02091   In the Polling Mode it is advised to use the following functions:
02092       - ADC_GetFlagStatus() : to check if flags events occur. 
02093       - ADC_ClearFlag()     : to clear the flags events.
02094       
02095   In the Interrupt Mode it is advised to use the following functions:
02096      - ADC_ITConfig()       : to enable or disable the interrupt source.
02097      - ADC_GetITStatus()    : to check if Interrupt occurs.
02098      - ADC_ClearITPendingBit() : to clear the Interrupt pending Bit 
02099                                 (corresponding Flag). 
02100 @endverbatim
02101   * @{
02102   */ 
02103 
02104 /**
02105   * @brief  Enables or disables the specified ADC interrupts.
02106   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
02107   * @param  ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. 
02108   *   This parameter can be any combination of the following values:
02109   *     @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source 
02110   *     @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source 
02111   *     @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source 
02112   *     @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source 
02113   *     @arg ADC_IT_OVR: ADC overrun interrupt source 
02114   *     @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source 
02115   *     @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source 
02116   *     @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source 
02117   *     @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source 
02118   *     @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source 
02119   *     @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source 
02120   * @param  NewState: new state of the specified ADC interrupts.
02121   *   This parameter can be: ENABLE or DISABLE.
02122   * @retval None
02123   */
02124 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState)
02125 {
02126   /* Check the parameters */
02127   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02128   assert_param(IS_FUNCTIONAL_STATE(NewState));
02129   assert_param(IS_ADC_IT(ADC_IT));
02130 
02131   if (NewState != DISABLE)
02132   {
02133     /* Enable the selected ADC interrupts */
02134     ADCx->IER |= ADC_IT;
02135   }
02136   else
02137   {
02138     /* Disable the selected ADC interrupts */
02139     ADCx->IER &= (~(uint32_t)ADC_IT);
02140   }
02141 }
02142 
02143 /**
02144   * @brief  Checks whether the specified ADC flag is set or not.
02145   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
02146   * @param  ADC_FLAG: specifies the flag to check. 
02147   *   This parameter can be one of the following values:
02148   *     @arg ADC_FLAG_RDY: ADC Ready (ADRDY) flag 
02149   *     @arg ADC_FLAG_EOSMP: ADC End of Sampling flag 
02150   *     @arg ADC_FLAG_EOC: ADC End of Regular Conversion flag 
02151   *     @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag 
02152   *     @arg ADC_FLAG_OVR: ADC overrun flag 
02153   *     @arg ADC_FLAG_JEOC: ADC End of Injected Conversion flag 
02154   *     @arg ADC_FLAG_JEOS: ADC End of Injected sequence of Conversions flag 
02155   *     @arg ADC_FLAG_AWD1: ADC Analog watchdog 1 flag 
02156   *     @arg ADC_FLAG_AWD2: ADC Analog watchdog 2 flag 
02157   *     @arg ADC_FLAG_AWD3: ADC Analog watchdog 3 flag 
02158   *     @arg ADC_FLAG_JQOVF: ADC Injected Context Queue Overflow flag 
02159   * @retval The new state of ADC_FLAG (SET or RESET).
02160   */
02161 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
02162 {
02163   FlagStatus bitstatus = RESET;
02164   /* Check the parameters */
02165   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02166   assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
02167 
02168   /* Check the status of the specified ADC flag */
02169   if ((ADCx->ISR & ADC_FLAG) != (uint32_t)RESET)
02170   {
02171     /* ADC_FLAG is set */
02172     bitstatus = SET;
02173   }
02174   else
02175   {
02176     /* ADC_FLAG is reset */
02177     bitstatus = RESET;
02178   }
02179   /* Return the ADC_FLAG status */
02180   return  bitstatus;
02181 }
02182 
02183 /**
02184   * @brief  Clears the ADCx's pending flags.
02185   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
02186   * @param  ADC_FLAG: specifies the flag to clear. 
02187   *   This parameter can be any combination of the following values:
02188   *     @arg ADC_FLAG_RDY: ADC Ready (ADRDY) flag 
02189   *     @arg ADC_FLAG_EOSMP: ADC End of Sampling flag 
02190   *     @arg ADC_FLAG_EOC: ADC End of Regular Conversion flag 
02191   *     @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag 
02192   *     @arg ADC_FLAG_OVR: ADC overrun flag 
02193   *     @arg ADC_FLAG_JEOC: ADC End of Injected Conversion flag 
02194   *     @arg ADC_FLAG_JEOS: ADC End of Injected sequence of Conversions flag 
02195   *     @arg ADC_FLAG_AWD1: ADC Analog watchdog 1 flag 
02196   *     @arg ADC_FLAG_AWD2: ADC Analog watchdog 2 flag 
02197   *     @arg ADC_FLAG_AWD3: ADC Analog watchdog 3 flag 
02198   *     @arg ADC_FLAG_JQOVF: ADC Injected Context Queue Overflow flag 
02199   * @retval None
02200   */
02201 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
02202 {
02203   /* Check the parameters */
02204   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02205   assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
02206   /* Clear the selected ADC flags */
02207   ADCx->ISR = (uint32_t)ADC_FLAG;
02208 }
02209 
02210 /**
02211   * @brief  Checks whether the specified ADC flag is set or not.
02212   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
02213   * @param  ADC_FLAG: specifies the master or slave flag to check. 
02214   *   This parameter can be one of the following values:
02215   *     @arg ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag 
02216   *     @arg ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag 
02217   *     @arg ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag 
02218   *     @arg ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag 
02219   *     @arg ADC_FLAG_MSTOVR: ADC master overrun flag 
02220   *     @arg ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag 
02221   *     @arg ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag 
02222   *     @arg ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag 
02223   *     @arg ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag 
02224   *     @arg ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag 
02225   *     @arg ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag 
02226   *     @arg ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag 
02227   *     @arg ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag 
02228   *     @arg ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag 
02229   *     @arg ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag 
02230   *     @arg ADC_FLAG_SLVOVR: ADC slave overrun flag 
02231   *     @arg ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag 
02232   *     @arg ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag 
02233   *     @arg ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag 
02234   *     @arg ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag 
02235   *     @arg ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag 
02236   *     @arg ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag 
02237   * @retval The new state of ADC_FLAG (SET or RESET).
02238   */
02239 FlagStatus ADC_GetCommonFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
02240 {
02241   uint32_t tmpreg1 = 0;
02242   FlagStatus bitstatus = RESET;
02243 
02244   /* Check the parameters */
02245   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02246   assert_param(IS_ADC_GET_COMMONFLAG(ADC_FLAG));
02247 
02248   if((ADCx == ADC1) || (ADCx == ADC2))
02249   {
02250     tmpreg1 = ADC1_2->CSR;
02251   }
02252   else
02253   {
02254     tmpreg1 = ADC3_4->CSR;
02255   }  
02256   /* Check the status of the specified ADC flag */
02257   if ((tmpreg1 & ADC_FLAG) != (uint32_t)RESET)
02258   {
02259     /* ADC_FLAG is set */
02260     bitstatus = SET;
02261   }
02262   else
02263   {
02264     /* ADC_FLAG is reset */
02265     bitstatus = RESET;
02266   }
02267   /* Return the ADC_FLAG status */
02268   return  bitstatus;
02269 }
02270 
02271 /**
02272   * @brief  Clears the ADCx's pending flags.
02273   * @param  ADCx: where x can be 1, 2, 3 or 4 to select the ADC peripheral.
02274   * @param  ADC_FLAG: specifies the master or slave flag to clear. 
02275   *   This parameter can be one of the following values:
02276   *     @arg ADC_FLAG_MSTRDY: ADC master Ready (ADRDY) flag 
02277   *     @arg ADC_FLAG_MSTEOSMP: ADC master End of Sampling flag 
02278   *     @arg ADC_FLAG_MSTEOC: ADC master End of Regular Conversion flag 
02279   *     @arg ADC_FLAG_MSTEOS: ADC master End of Regular sequence of Conversions flag 
02280   *     @arg ADC_FLAG_MSTOVR: ADC master overrun flag 
02281   *     @arg ADC_FLAG_MSTJEOC: ADC master End of Injected Conversion flag 
02282   *     @arg ADC_FLAG_MSTJEOS: ADC master End of Injected sequence of Conversions flag 
02283   *     @arg ADC_FLAG_MSTAWD1: ADC master Analog watchdog 1 flag 
02284   *     @arg ADC_FLAG_MSTAWD2: ADC master Analog watchdog 2 flag 
02285   *     @arg ADC_FLAG_MSTAWD3: ADC master Analog watchdog 3 flag 
02286   *     @arg ADC_FLAG_MSTJQOVF: ADC master Injected Context Queue Overflow flag 
02287   *     @arg ADC_FLAG_SLVRDY: ADC slave Ready (ADRDY) flag 
02288   *     @arg ADC_FLAG_SLVEOSMP: ADC slave End of Sampling flag 
02289   *     @arg ADC_FLAG_SLVEOC: ADC slave End of Regular Conversion flag 
02290   *     @arg ADC_FLAG_SLVEOS: ADC slave End of Regular sequence of Conversions flag 
02291   *     @arg ADC_FLAG_SLVOVR: ADC slave overrun flag 
02292   *     @arg ADC_FLAG_SLVJEOC: ADC slave End of Injected Conversion flag 
02293   *     @arg ADC_FLAG_SLVJEOS: ADC slave End of Injected sequence of Conversions flag 
02294   *     @arg ADC_FLAG_SLVAWD1: ADC slave Analog watchdog 1 flag 
02295   *     @arg ADC_FLAG_SLVAWD2: ADC slave Analog watchdog 2 flag 
02296   *     @arg ADC_FLAG_SLVAWD3: ADC slave Analog watchdog 3 flag 
02297   *     @arg ADC_FLAG_SLVJQOVF: ADC slave Injected Context Queue Overflow flag 
02298   * @retval None
02299   */
02300 void ADC_ClearCommonFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
02301 {
02302   /* Check the parameters */
02303   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02304   assert_param(IS_ADC_CLEAR_COMMONFLAG(ADC_FLAG));
02305 
02306   if((ADCx == ADC1) || (ADCx == ADC2))
02307   {
02308     /* Clear the selected ADC flags */
02309     ADC1_2->CSR |= (uint32_t)ADC_FLAG;
02310   }
02311   else
02312   {
02313     /* Clear the selected ADC flags */
02314     ADC3_4->CSR |= (uint32_t)ADC_FLAG;
02315   }  
02316 }
02317 
02318 /**
02319   * @brief  Checks whether the specified ADC interrupt has occurred or not.
02320   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
02321   * @param  ADC_IT: specifies the ADC interrupt source to check. 
02322   *   This parameter can be one of the following values:
02323   *     @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source 
02324   *     @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source 
02325   *     @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source 
02326   *     @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source 
02327   *     @arg ADC_IT_OVR: ADC overrun interrupt source 
02328   *     @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source 
02329   *     @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source 
02330   *     @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source 
02331   *     @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source 
02332   *     @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source 
02333   *     @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source 
02334   * @retval The new state of ADC_IT (SET or RESET).
02335   */
02336 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT)
02337 {
02338   ITStatus bitstatus = RESET;  
02339   uint16_t itstatus = 0x0, itenable = 0x0;
02340   /* Check the parameters */
02341   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02342   assert_param(IS_ADC_GET_IT(ADC_IT));
02343    
02344   itstatus = ADCx->ISR & ADC_IT;
02345   
02346   itenable = ADCx->IER & ADC_IT;
02347   if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET))
02348   {
02349     bitstatus = SET;
02350   }
02351   else
02352   {
02353     bitstatus = RESET;
02354   }
02355   return bitstatus;
02356 }
02357 
02358 /**
02359   * @brief  Clears the ADCx's interrupt pending bits.
02360   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
02361   * @param  ADC_IT: specifies the ADC interrupt pending bit to clear.
02362   *   This parameter can be any combination of the following values:
02363   *     @arg ADC_IT_RDY: ADC Ready (ADRDY) interrupt source 
02364   *     @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source 
02365   *     @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source 
02366   *     @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source 
02367   *     @arg ADC_IT_OVR: ADC overrun interrupt source 
02368   *     @arg ADC_IT_JEOC: ADC End of Injected Conversion interrupt source 
02369   *     @arg ADC_IT_JEOS: ADC End of Injected sequence of Conversions interrupt source 
02370   *     @arg ADC_IT_AWD1: ADC Analog watchdog 1 interrupt source 
02371   *     @arg ADC_IT_AWD2: ADC Analog watchdog 2 interrupt source 
02372   *     @arg ADC_IT_AWD3: ADC Analog watchdog 3 interrupt source 
02373   *     @arg ADC_IT_JQOVF: ADC Injected Context Queue Overflow interrupt source
02374   * @retval None
02375   */
02376 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT)
02377 {
02378   /* Check the parameters */
02379   assert_param(IS_ADC_ALL_PERIPH(ADCx));
02380   assert_param(IS_ADC_IT(ADC_IT));
02381   /* Clear the selected ADC interrupt pending bit */
02382   ADCx->ISR = (uint32_t)ADC_IT;
02383 }
02384 
02385 /**
02386   * @}
02387   */
02388 
02389 /**
02390   * @}
02391   */ 
02392 
02393 /**
02394   * @}
02395   */ 
02396 
02397 /**
02398   * @}
02399   */ 
02400 
02401 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/