Martin Johnson / STM32F3-Discovery-minimal

Dependents:   accelerometer_test neopixel_square accelerometer_test_minimal Colour_Video_Demo

Committer:
MartinJohnson
Date:
Wed May 02 02:01:13 2018 +0000
Revision:
0:c65854d98061
Initial Version

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MartinJohnson 0:c65854d98061 1 /**************************************************************************//**
MartinJohnson 0:c65854d98061 2 * @file core_cmFunc.h
MartinJohnson 0:c65854d98061 3 * @brief CMSIS Cortex-M Core Function Access Header File
MartinJohnson 0:c65854d98061 4 * @version V4.00
MartinJohnson 0:c65854d98061 5 * @date 28. August 2014
MartinJohnson 0:c65854d98061 6 *
MartinJohnson 0:c65854d98061 7 * @note
MartinJohnson 0:c65854d98061 8 *
MartinJohnson 0:c65854d98061 9 ******************************************************************************/
MartinJohnson 0:c65854d98061 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
MartinJohnson 0:c65854d98061 11
MartinJohnson 0:c65854d98061 12 All rights reserved.
MartinJohnson 0:c65854d98061 13 Redistribution and use in source and binary forms, with or without
MartinJohnson 0:c65854d98061 14 modification, are permitted provided that the following conditions are met:
MartinJohnson 0:c65854d98061 15 - Redistributions of source code must retain the above copyright
MartinJohnson 0:c65854d98061 16 notice, this list of conditions and the following disclaimer.
MartinJohnson 0:c65854d98061 17 - Redistributions in binary form must reproduce the above copyright
MartinJohnson 0:c65854d98061 18 notice, this list of conditions and the following disclaimer in the
MartinJohnson 0:c65854d98061 19 documentation and/or other materials provided with the distribution.
MartinJohnson 0:c65854d98061 20 - Neither the name of ARM nor the names of its contributors may be used
MartinJohnson 0:c65854d98061 21 to endorse or promote products derived from this software without
MartinJohnson 0:c65854d98061 22 specific prior written permission.
MartinJohnson 0:c65854d98061 23 *
MartinJohnson 0:c65854d98061 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
MartinJohnson 0:c65854d98061 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
MartinJohnson 0:c65854d98061 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
MartinJohnson 0:c65854d98061 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
MartinJohnson 0:c65854d98061 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
MartinJohnson 0:c65854d98061 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
MartinJohnson 0:c65854d98061 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
MartinJohnson 0:c65854d98061 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
MartinJohnson 0:c65854d98061 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
MartinJohnson 0:c65854d98061 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
MartinJohnson 0:c65854d98061 34 POSSIBILITY OF SUCH DAMAGE.
MartinJohnson 0:c65854d98061 35 ---------------------------------------------------------------------------*/
MartinJohnson 0:c65854d98061 36
MartinJohnson 0:c65854d98061 37
MartinJohnson 0:c65854d98061 38 #ifndef __CORE_CMFUNC_H
MartinJohnson 0:c65854d98061 39 #define __CORE_CMFUNC_H
MartinJohnson 0:c65854d98061 40
MartinJohnson 0:c65854d98061 41
MartinJohnson 0:c65854d98061 42 /* ########################### Core Function Access ########################### */
MartinJohnson 0:c65854d98061 43 /** \ingroup CMSIS_Core_FunctionInterface
MartinJohnson 0:c65854d98061 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
MartinJohnson 0:c65854d98061 45 @{
MartinJohnson 0:c65854d98061 46 */
MartinJohnson 0:c65854d98061 47
MartinJohnson 0:c65854d98061 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
MartinJohnson 0:c65854d98061 49 /* ARM armcc specific functions */
MartinJohnson 0:c65854d98061 50
MartinJohnson 0:c65854d98061 51 #if (__ARMCC_VERSION < 400677)
MartinJohnson 0:c65854d98061 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
MartinJohnson 0:c65854d98061 53 #endif
MartinJohnson 0:c65854d98061 54
MartinJohnson 0:c65854d98061 55 /* intrinsic void __enable_irq(); */
MartinJohnson 0:c65854d98061 56 /* intrinsic void __disable_irq(); */
MartinJohnson 0:c65854d98061 57
MartinJohnson 0:c65854d98061 58 /** \brief Get Control Register
MartinJohnson 0:c65854d98061 59
MartinJohnson 0:c65854d98061 60 This function returns the content of the Control Register.
MartinJohnson 0:c65854d98061 61
MartinJohnson 0:c65854d98061 62 \return Control Register value
MartinJohnson 0:c65854d98061 63 */
MartinJohnson 0:c65854d98061 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
MartinJohnson 0:c65854d98061 65 {
MartinJohnson 0:c65854d98061 66 register uint32_t __regControl __ASM("control");
MartinJohnson 0:c65854d98061 67 return(__regControl);
MartinJohnson 0:c65854d98061 68 }
MartinJohnson 0:c65854d98061 69
MartinJohnson 0:c65854d98061 70
MartinJohnson 0:c65854d98061 71 /** \brief Set Control Register
MartinJohnson 0:c65854d98061 72
MartinJohnson 0:c65854d98061 73 This function writes the given value to the Control Register.
MartinJohnson 0:c65854d98061 74
MartinJohnson 0:c65854d98061 75 \param [in] control Control Register value to set
MartinJohnson 0:c65854d98061 76 */
MartinJohnson 0:c65854d98061 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
MartinJohnson 0:c65854d98061 78 {
MartinJohnson 0:c65854d98061 79 register uint32_t __regControl __ASM("control");
MartinJohnson 0:c65854d98061 80 __regControl = control;
MartinJohnson 0:c65854d98061 81 }
MartinJohnson 0:c65854d98061 82
MartinJohnson 0:c65854d98061 83
MartinJohnson 0:c65854d98061 84 /** \brief Get IPSR Register
MartinJohnson 0:c65854d98061 85
MartinJohnson 0:c65854d98061 86 This function returns the content of the IPSR Register.
MartinJohnson 0:c65854d98061 87
MartinJohnson 0:c65854d98061 88 \return IPSR Register value
MartinJohnson 0:c65854d98061 89 */
MartinJohnson 0:c65854d98061 90 __STATIC_INLINE uint32_t __get_IPSR(void)
MartinJohnson 0:c65854d98061 91 {
MartinJohnson 0:c65854d98061 92 register uint32_t __regIPSR __ASM("ipsr");
MartinJohnson 0:c65854d98061 93 return(__regIPSR);
MartinJohnson 0:c65854d98061 94 }
MartinJohnson 0:c65854d98061 95
MartinJohnson 0:c65854d98061 96
MartinJohnson 0:c65854d98061 97 /** \brief Get APSR Register
MartinJohnson 0:c65854d98061 98
MartinJohnson 0:c65854d98061 99 This function returns the content of the APSR Register.
MartinJohnson 0:c65854d98061 100
MartinJohnson 0:c65854d98061 101 \return APSR Register value
MartinJohnson 0:c65854d98061 102 */
MartinJohnson 0:c65854d98061 103 __STATIC_INLINE uint32_t __get_APSR(void)
MartinJohnson 0:c65854d98061 104 {
MartinJohnson 0:c65854d98061 105 register uint32_t __regAPSR __ASM("apsr");
MartinJohnson 0:c65854d98061 106 return(__regAPSR);
MartinJohnson 0:c65854d98061 107 }
MartinJohnson 0:c65854d98061 108
MartinJohnson 0:c65854d98061 109
MartinJohnson 0:c65854d98061 110 /** \brief Get xPSR Register
MartinJohnson 0:c65854d98061 111
MartinJohnson 0:c65854d98061 112 This function returns the content of the xPSR Register.
MartinJohnson 0:c65854d98061 113
MartinJohnson 0:c65854d98061 114 \return xPSR Register value
MartinJohnson 0:c65854d98061 115 */
MartinJohnson 0:c65854d98061 116 __STATIC_INLINE uint32_t __get_xPSR(void)
MartinJohnson 0:c65854d98061 117 {
MartinJohnson 0:c65854d98061 118 register uint32_t __regXPSR __ASM("xpsr");
MartinJohnson 0:c65854d98061 119 return(__regXPSR);
MartinJohnson 0:c65854d98061 120 }
MartinJohnson 0:c65854d98061 121
MartinJohnson 0:c65854d98061 122
MartinJohnson 0:c65854d98061 123 /** \brief Get Process Stack Pointer
MartinJohnson 0:c65854d98061 124
MartinJohnson 0:c65854d98061 125 This function returns the current value of the Process Stack Pointer (PSP).
MartinJohnson 0:c65854d98061 126
MartinJohnson 0:c65854d98061 127 \return PSP Register value
MartinJohnson 0:c65854d98061 128 */
MartinJohnson 0:c65854d98061 129 __STATIC_INLINE uint32_t __get_PSP(void)
MartinJohnson 0:c65854d98061 130 {
MartinJohnson 0:c65854d98061 131 register uint32_t __regProcessStackPointer __ASM("psp");
MartinJohnson 0:c65854d98061 132 return(__regProcessStackPointer);
MartinJohnson 0:c65854d98061 133 }
MartinJohnson 0:c65854d98061 134
MartinJohnson 0:c65854d98061 135
MartinJohnson 0:c65854d98061 136 /** \brief Set Process Stack Pointer
MartinJohnson 0:c65854d98061 137
MartinJohnson 0:c65854d98061 138 This function assigns the given value to the Process Stack Pointer (PSP).
MartinJohnson 0:c65854d98061 139
MartinJohnson 0:c65854d98061 140 \param [in] topOfProcStack Process Stack Pointer value to set
MartinJohnson 0:c65854d98061 141 */
MartinJohnson 0:c65854d98061 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
MartinJohnson 0:c65854d98061 143 {
MartinJohnson 0:c65854d98061 144 register uint32_t __regProcessStackPointer __ASM("psp");
MartinJohnson 0:c65854d98061 145 __regProcessStackPointer = topOfProcStack;
MartinJohnson 0:c65854d98061 146 }
MartinJohnson 0:c65854d98061 147
MartinJohnson 0:c65854d98061 148
MartinJohnson 0:c65854d98061 149 /** \brief Get Main Stack Pointer
MartinJohnson 0:c65854d98061 150
MartinJohnson 0:c65854d98061 151 This function returns the current value of the Main Stack Pointer (MSP).
MartinJohnson 0:c65854d98061 152
MartinJohnson 0:c65854d98061 153 \return MSP Register value
MartinJohnson 0:c65854d98061 154 */
MartinJohnson 0:c65854d98061 155 __STATIC_INLINE uint32_t __get_MSP(void)
MartinJohnson 0:c65854d98061 156 {
MartinJohnson 0:c65854d98061 157 register uint32_t __regMainStackPointer __ASM("msp");
MartinJohnson 0:c65854d98061 158 return(__regMainStackPointer);
MartinJohnson 0:c65854d98061 159 }
MartinJohnson 0:c65854d98061 160
MartinJohnson 0:c65854d98061 161
MartinJohnson 0:c65854d98061 162 /** \brief Set Main Stack Pointer
MartinJohnson 0:c65854d98061 163
MartinJohnson 0:c65854d98061 164 This function assigns the given value to the Main Stack Pointer (MSP).
MartinJohnson 0:c65854d98061 165
MartinJohnson 0:c65854d98061 166 \param [in] topOfMainStack Main Stack Pointer value to set
MartinJohnson 0:c65854d98061 167 */
MartinJohnson 0:c65854d98061 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
MartinJohnson 0:c65854d98061 169 {
MartinJohnson 0:c65854d98061 170 register uint32_t __regMainStackPointer __ASM("msp");
MartinJohnson 0:c65854d98061 171 __regMainStackPointer = topOfMainStack;
MartinJohnson 0:c65854d98061 172 }
MartinJohnson 0:c65854d98061 173
MartinJohnson 0:c65854d98061 174
MartinJohnson 0:c65854d98061 175 /** \brief Get Priority Mask
MartinJohnson 0:c65854d98061 176
MartinJohnson 0:c65854d98061 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
MartinJohnson 0:c65854d98061 178
MartinJohnson 0:c65854d98061 179 \return Priority Mask value
MartinJohnson 0:c65854d98061 180 */
MartinJohnson 0:c65854d98061 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
MartinJohnson 0:c65854d98061 182 {
MartinJohnson 0:c65854d98061 183 register uint32_t __regPriMask __ASM("primask");
MartinJohnson 0:c65854d98061 184 return(__regPriMask);
MartinJohnson 0:c65854d98061 185 }
MartinJohnson 0:c65854d98061 186
MartinJohnson 0:c65854d98061 187
MartinJohnson 0:c65854d98061 188 /** \brief Set Priority Mask
MartinJohnson 0:c65854d98061 189
MartinJohnson 0:c65854d98061 190 This function assigns the given value to the Priority Mask Register.
MartinJohnson 0:c65854d98061 191
MartinJohnson 0:c65854d98061 192 \param [in] priMask Priority Mask
MartinJohnson 0:c65854d98061 193 */
MartinJohnson 0:c65854d98061 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
MartinJohnson 0:c65854d98061 195 {
MartinJohnson 0:c65854d98061 196 register uint32_t __regPriMask __ASM("primask");
MartinJohnson 0:c65854d98061 197 __regPriMask = (priMask);
MartinJohnson 0:c65854d98061 198 }
MartinJohnson 0:c65854d98061 199
MartinJohnson 0:c65854d98061 200
MartinJohnson 0:c65854d98061 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
MartinJohnson 0:c65854d98061 202
MartinJohnson 0:c65854d98061 203 /** \brief Enable FIQ
MartinJohnson 0:c65854d98061 204
MartinJohnson 0:c65854d98061 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
MartinJohnson 0:c65854d98061 206 Can only be executed in Privileged modes.
MartinJohnson 0:c65854d98061 207 */
MartinJohnson 0:c65854d98061 208 #define __enable_fault_irq __enable_fiq
MartinJohnson 0:c65854d98061 209
MartinJohnson 0:c65854d98061 210
MartinJohnson 0:c65854d98061 211 /** \brief Disable FIQ
MartinJohnson 0:c65854d98061 212
MartinJohnson 0:c65854d98061 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
MartinJohnson 0:c65854d98061 214 Can only be executed in Privileged modes.
MartinJohnson 0:c65854d98061 215 */
MartinJohnson 0:c65854d98061 216 #define __disable_fault_irq __disable_fiq
MartinJohnson 0:c65854d98061 217
MartinJohnson 0:c65854d98061 218
MartinJohnson 0:c65854d98061 219 /** \brief Get Base Priority
MartinJohnson 0:c65854d98061 220
MartinJohnson 0:c65854d98061 221 This function returns the current value of the Base Priority register.
MartinJohnson 0:c65854d98061 222
MartinJohnson 0:c65854d98061 223 \return Base Priority register value
MartinJohnson 0:c65854d98061 224 */
MartinJohnson 0:c65854d98061 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
MartinJohnson 0:c65854d98061 226 {
MartinJohnson 0:c65854d98061 227 register uint32_t __regBasePri __ASM("basepri");
MartinJohnson 0:c65854d98061 228 return(__regBasePri);
MartinJohnson 0:c65854d98061 229 }
MartinJohnson 0:c65854d98061 230
MartinJohnson 0:c65854d98061 231
MartinJohnson 0:c65854d98061 232 /** \brief Set Base Priority
MartinJohnson 0:c65854d98061 233
MartinJohnson 0:c65854d98061 234 This function assigns the given value to the Base Priority register.
MartinJohnson 0:c65854d98061 235
MartinJohnson 0:c65854d98061 236 \param [in] basePri Base Priority value to set
MartinJohnson 0:c65854d98061 237 */
MartinJohnson 0:c65854d98061 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
MartinJohnson 0:c65854d98061 239 {
MartinJohnson 0:c65854d98061 240 register uint32_t __regBasePri __ASM("basepri");
MartinJohnson 0:c65854d98061 241 __regBasePri = (basePri & 0xff);
MartinJohnson 0:c65854d98061 242 }
MartinJohnson 0:c65854d98061 243
MartinJohnson 0:c65854d98061 244
MartinJohnson 0:c65854d98061 245 /** \brief Get Fault Mask
MartinJohnson 0:c65854d98061 246
MartinJohnson 0:c65854d98061 247 This function returns the current value of the Fault Mask register.
MartinJohnson 0:c65854d98061 248
MartinJohnson 0:c65854d98061 249 \return Fault Mask register value
MartinJohnson 0:c65854d98061 250 */
MartinJohnson 0:c65854d98061 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
MartinJohnson 0:c65854d98061 252 {
MartinJohnson 0:c65854d98061 253 register uint32_t __regFaultMask __ASM("faultmask");
MartinJohnson 0:c65854d98061 254 return(__regFaultMask);
MartinJohnson 0:c65854d98061 255 }
MartinJohnson 0:c65854d98061 256
MartinJohnson 0:c65854d98061 257
MartinJohnson 0:c65854d98061 258 /** \brief Set Fault Mask
MartinJohnson 0:c65854d98061 259
MartinJohnson 0:c65854d98061 260 This function assigns the given value to the Fault Mask register.
MartinJohnson 0:c65854d98061 261
MartinJohnson 0:c65854d98061 262 \param [in] faultMask Fault Mask value to set
MartinJohnson 0:c65854d98061 263 */
MartinJohnson 0:c65854d98061 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
MartinJohnson 0:c65854d98061 265 {
MartinJohnson 0:c65854d98061 266 register uint32_t __regFaultMask __ASM("faultmask");
MartinJohnson 0:c65854d98061 267 __regFaultMask = (faultMask & (uint32_t)1);
MartinJohnson 0:c65854d98061 268 }
MartinJohnson 0:c65854d98061 269
MartinJohnson 0:c65854d98061 270 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
MartinJohnson 0:c65854d98061 271
MartinJohnson 0:c65854d98061 272
MartinJohnson 0:c65854d98061 273 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
MartinJohnson 0:c65854d98061 274
MartinJohnson 0:c65854d98061 275 /** \brief Get FPSCR
MartinJohnson 0:c65854d98061 276
MartinJohnson 0:c65854d98061 277 This function returns the current value of the Floating Point Status/Control register.
MartinJohnson 0:c65854d98061 278
MartinJohnson 0:c65854d98061 279 \return Floating Point Status/Control register value
MartinJohnson 0:c65854d98061 280 */
MartinJohnson 0:c65854d98061 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
MartinJohnson 0:c65854d98061 282 {
MartinJohnson 0:c65854d98061 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
MartinJohnson 0:c65854d98061 284 register uint32_t __regfpscr __ASM("fpscr");
MartinJohnson 0:c65854d98061 285 return(__regfpscr);
MartinJohnson 0:c65854d98061 286 #else
MartinJohnson 0:c65854d98061 287 return(0);
MartinJohnson 0:c65854d98061 288 #endif
MartinJohnson 0:c65854d98061 289 }
MartinJohnson 0:c65854d98061 290
MartinJohnson 0:c65854d98061 291
MartinJohnson 0:c65854d98061 292 /** \brief Set FPSCR
MartinJohnson 0:c65854d98061 293
MartinJohnson 0:c65854d98061 294 This function assigns the given value to the Floating Point Status/Control register.
MartinJohnson 0:c65854d98061 295
MartinJohnson 0:c65854d98061 296 \param [in] fpscr Floating Point Status/Control value to set
MartinJohnson 0:c65854d98061 297 */
MartinJohnson 0:c65854d98061 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
MartinJohnson 0:c65854d98061 299 {
MartinJohnson 0:c65854d98061 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
MartinJohnson 0:c65854d98061 301 register uint32_t __regfpscr __ASM("fpscr");
MartinJohnson 0:c65854d98061 302 __regfpscr = (fpscr);
MartinJohnson 0:c65854d98061 303 #endif
MartinJohnson 0:c65854d98061 304 }
MartinJohnson 0:c65854d98061 305
MartinJohnson 0:c65854d98061 306 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
MartinJohnson 0:c65854d98061 307
MartinJohnson 0:c65854d98061 308
MartinJohnson 0:c65854d98061 309 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
MartinJohnson 0:c65854d98061 310 /* GNU gcc specific functions */
MartinJohnson 0:c65854d98061 311
MartinJohnson 0:c65854d98061 312 /** \brief Enable IRQ Interrupts
MartinJohnson 0:c65854d98061 313
MartinJohnson 0:c65854d98061 314 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
MartinJohnson 0:c65854d98061 315 Can only be executed in Privileged modes.
MartinJohnson 0:c65854d98061 316 */
MartinJohnson 0:c65854d98061 317 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
MartinJohnson 0:c65854d98061 318 {
MartinJohnson 0:c65854d98061 319 __ASM volatile ("cpsie i" : : : "memory");
MartinJohnson 0:c65854d98061 320 }
MartinJohnson 0:c65854d98061 321
MartinJohnson 0:c65854d98061 322
MartinJohnson 0:c65854d98061 323 /** \brief Disable IRQ Interrupts
MartinJohnson 0:c65854d98061 324
MartinJohnson 0:c65854d98061 325 This function disables IRQ interrupts by setting the I-bit in the CPSR.
MartinJohnson 0:c65854d98061 326 Can only be executed in Privileged modes.
MartinJohnson 0:c65854d98061 327 */
MartinJohnson 0:c65854d98061 328 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
MartinJohnson 0:c65854d98061 329 {
MartinJohnson 0:c65854d98061 330 __ASM volatile ("cpsid i" : : : "memory");
MartinJohnson 0:c65854d98061 331 }
MartinJohnson 0:c65854d98061 332
MartinJohnson 0:c65854d98061 333
MartinJohnson 0:c65854d98061 334 /** \brief Get Control Register
MartinJohnson 0:c65854d98061 335
MartinJohnson 0:c65854d98061 336 This function returns the content of the Control Register.
MartinJohnson 0:c65854d98061 337
MartinJohnson 0:c65854d98061 338 \return Control Register value
MartinJohnson 0:c65854d98061 339 */
MartinJohnson 0:c65854d98061 340 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
MartinJohnson 0:c65854d98061 341 {
MartinJohnson 0:c65854d98061 342 uint32_t result;
MartinJohnson 0:c65854d98061 343
MartinJohnson 0:c65854d98061 344 __ASM volatile ("MRS %0, control" : "=r" (result) );
MartinJohnson 0:c65854d98061 345 return(result);
MartinJohnson 0:c65854d98061 346 }
MartinJohnson 0:c65854d98061 347
MartinJohnson 0:c65854d98061 348
MartinJohnson 0:c65854d98061 349 /** \brief Set Control Register
MartinJohnson 0:c65854d98061 350
MartinJohnson 0:c65854d98061 351 This function writes the given value to the Control Register.
MartinJohnson 0:c65854d98061 352
MartinJohnson 0:c65854d98061 353 \param [in] control Control Register value to set
MartinJohnson 0:c65854d98061 354 */
MartinJohnson 0:c65854d98061 355 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
MartinJohnson 0:c65854d98061 356 {
MartinJohnson 0:c65854d98061 357 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
MartinJohnson 0:c65854d98061 358 }
MartinJohnson 0:c65854d98061 359
MartinJohnson 0:c65854d98061 360
MartinJohnson 0:c65854d98061 361 /** \brief Get IPSR Register
MartinJohnson 0:c65854d98061 362
MartinJohnson 0:c65854d98061 363 This function returns the content of the IPSR Register.
MartinJohnson 0:c65854d98061 364
MartinJohnson 0:c65854d98061 365 \return IPSR Register value
MartinJohnson 0:c65854d98061 366 */
MartinJohnson 0:c65854d98061 367 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
MartinJohnson 0:c65854d98061 368 {
MartinJohnson 0:c65854d98061 369 uint32_t result;
MartinJohnson 0:c65854d98061 370
MartinJohnson 0:c65854d98061 371 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
MartinJohnson 0:c65854d98061 372 return(result);
MartinJohnson 0:c65854d98061 373 }
MartinJohnson 0:c65854d98061 374
MartinJohnson 0:c65854d98061 375
MartinJohnson 0:c65854d98061 376 /** \brief Get APSR Register
MartinJohnson 0:c65854d98061 377
MartinJohnson 0:c65854d98061 378 This function returns the content of the APSR Register.
MartinJohnson 0:c65854d98061 379
MartinJohnson 0:c65854d98061 380 \return APSR Register value
MartinJohnson 0:c65854d98061 381 */
MartinJohnson 0:c65854d98061 382 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
MartinJohnson 0:c65854d98061 383 {
MartinJohnson 0:c65854d98061 384 uint32_t result;
MartinJohnson 0:c65854d98061 385
MartinJohnson 0:c65854d98061 386 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
MartinJohnson 0:c65854d98061 387 return(result);
MartinJohnson 0:c65854d98061 388 }
MartinJohnson 0:c65854d98061 389
MartinJohnson 0:c65854d98061 390
MartinJohnson 0:c65854d98061 391 /** \brief Get xPSR Register
MartinJohnson 0:c65854d98061 392
MartinJohnson 0:c65854d98061 393 This function returns the content of the xPSR Register.
MartinJohnson 0:c65854d98061 394
MartinJohnson 0:c65854d98061 395 \return xPSR Register value
MartinJohnson 0:c65854d98061 396 */
MartinJohnson 0:c65854d98061 397 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
MartinJohnson 0:c65854d98061 398 {
MartinJohnson 0:c65854d98061 399 uint32_t result;
MartinJohnson 0:c65854d98061 400
MartinJohnson 0:c65854d98061 401 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
MartinJohnson 0:c65854d98061 402 return(result);
MartinJohnson 0:c65854d98061 403 }
MartinJohnson 0:c65854d98061 404
MartinJohnson 0:c65854d98061 405
MartinJohnson 0:c65854d98061 406 /** \brief Get Process Stack Pointer
MartinJohnson 0:c65854d98061 407
MartinJohnson 0:c65854d98061 408 This function returns the current value of the Process Stack Pointer (PSP).
MartinJohnson 0:c65854d98061 409
MartinJohnson 0:c65854d98061 410 \return PSP Register value
MartinJohnson 0:c65854d98061 411 */
MartinJohnson 0:c65854d98061 412 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
MartinJohnson 0:c65854d98061 413 {
MartinJohnson 0:c65854d98061 414 register uint32_t result;
MartinJohnson 0:c65854d98061 415
MartinJohnson 0:c65854d98061 416 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
MartinJohnson 0:c65854d98061 417 return(result);
MartinJohnson 0:c65854d98061 418 }
MartinJohnson 0:c65854d98061 419
MartinJohnson 0:c65854d98061 420
MartinJohnson 0:c65854d98061 421 /** \brief Set Process Stack Pointer
MartinJohnson 0:c65854d98061 422
MartinJohnson 0:c65854d98061 423 This function assigns the given value to the Process Stack Pointer (PSP).
MartinJohnson 0:c65854d98061 424
MartinJohnson 0:c65854d98061 425 \param [in] topOfProcStack Process Stack Pointer value to set
MartinJohnson 0:c65854d98061 426 */
MartinJohnson 0:c65854d98061 427 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
MartinJohnson 0:c65854d98061 428 {
MartinJohnson 0:c65854d98061 429 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
MartinJohnson 0:c65854d98061 430 }
MartinJohnson 0:c65854d98061 431
MartinJohnson 0:c65854d98061 432
MartinJohnson 0:c65854d98061 433 /** \brief Get Main Stack Pointer
MartinJohnson 0:c65854d98061 434
MartinJohnson 0:c65854d98061 435 This function returns the current value of the Main Stack Pointer (MSP).
MartinJohnson 0:c65854d98061 436
MartinJohnson 0:c65854d98061 437 \return MSP Register value
MartinJohnson 0:c65854d98061 438 */
MartinJohnson 0:c65854d98061 439 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
MartinJohnson 0:c65854d98061 440 {
MartinJohnson 0:c65854d98061 441 register uint32_t result;
MartinJohnson 0:c65854d98061 442
MartinJohnson 0:c65854d98061 443 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
MartinJohnson 0:c65854d98061 444 return(result);
MartinJohnson 0:c65854d98061 445 }
MartinJohnson 0:c65854d98061 446
MartinJohnson 0:c65854d98061 447
MartinJohnson 0:c65854d98061 448 /** \brief Set Main Stack Pointer
MartinJohnson 0:c65854d98061 449
MartinJohnson 0:c65854d98061 450 This function assigns the given value to the Main Stack Pointer (MSP).
MartinJohnson 0:c65854d98061 451
MartinJohnson 0:c65854d98061 452 \param [in] topOfMainStack Main Stack Pointer value to set
MartinJohnson 0:c65854d98061 453 */
MartinJohnson 0:c65854d98061 454 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
MartinJohnson 0:c65854d98061 455 {
MartinJohnson 0:c65854d98061 456 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
MartinJohnson 0:c65854d98061 457 }
MartinJohnson 0:c65854d98061 458
MartinJohnson 0:c65854d98061 459
MartinJohnson 0:c65854d98061 460 /** \brief Get Priority Mask
MartinJohnson 0:c65854d98061 461
MartinJohnson 0:c65854d98061 462 This function returns the current state of the priority mask bit from the Priority Mask Register.
MartinJohnson 0:c65854d98061 463
MartinJohnson 0:c65854d98061 464 \return Priority Mask value
MartinJohnson 0:c65854d98061 465 */
MartinJohnson 0:c65854d98061 466 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
MartinJohnson 0:c65854d98061 467 {
MartinJohnson 0:c65854d98061 468 uint32_t result;
MartinJohnson 0:c65854d98061 469
MartinJohnson 0:c65854d98061 470 __ASM volatile ("MRS %0, primask" : "=r" (result) );
MartinJohnson 0:c65854d98061 471 return(result);
MartinJohnson 0:c65854d98061 472 }
MartinJohnson 0:c65854d98061 473
MartinJohnson 0:c65854d98061 474
MartinJohnson 0:c65854d98061 475 /** \brief Set Priority Mask
MartinJohnson 0:c65854d98061 476
MartinJohnson 0:c65854d98061 477 This function assigns the given value to the Priority Mask Register.
MartinJohnson 0:c65854d98061 478
MartinJohnson 0:c65854d98061 479 \param [in] priMask Priority Mask
MartinJohnson 0:c65854d98061 480 */
MartinJohnson 0:c65854d98061 481 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
MartinJohnson 0:c65854d98061 482 {
MartinJohnson 0:c65854d98061 483 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
MartinJohnson 0:c65854d98061 484 }
MartinJohnson 0:c65854d98061 485
MartinJohnson 0:c65854d98061 486
MartinJohnson 0:c65854d98061 487 #if (__CORTEX_M >= 0x03)
MartinJohnson 0:c65854d98061 488
MartinJohnson 0:c65854d98061 489 /** \brief Enable FIQ
MartinJohnson 0:c65854d98061 490
MartinJohnson 0:c65854d98061 491 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
MartinJohnson 0:c65854d98061 492 Can only be executed in Privileged modes.
MartinJohnson 0:c65854d98061 493 */
MartinJohnson 0:c65854d98061 494 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
MartinJohnson 0:c65854d98061 495 {
MartinJohnson 0:c65854d98061 496 __ASM volatile ("cpsie f" : : : "memory");
MartinJohnson 0:c65854d98061 497 }
MartinJohnson 0:c65854d98061 498
MartinJohnson 0:c65854d98061 499
MartinJohnson 0:c65854d98061 500 /** \brief Disable FIQ
MartinJohnson 0:c65854d98061 501
MartinJohnson 0:c65854d98061 502 This function disables FIQ interrupts by setting the F-bit in the CPSR.
MartinJohnson 0:c65854d98061 503 Can only be executed in Privileged modes.
MartinJohnson 0:c65854d98061 504 */
MartinJohnson 0:c65854d98061 505 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
MartinJohnson 0:c65854d98061 506 {
MartinJohnson 0:c65854d98061 507 __ASM volatile ("cpsid f" : : : "memory");
MartinJohnson 0:c65854d98061 508 }
MartinJohnson 0:c65854d98061 509
MartinJohnson 0:c65854d98061 510
MartinJohnson 0:c65854d98061 511 /** \brief Get Base Priority
MartinJohnson 0:c65854d98061 512
MartinJohnson 0:c65854d98061 513 This function returns the current value of the Base Priority register.
MartinJohnson 0:c65854d98061 514
MartinJohnson 0:c65854d98061 515 \return Base Priority register value
MartinJohnson 0:c65854d98061 516 */
MartinJohnson 0:c65854d98061 517 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
MartinJohnson 0:c65854d98061 518 {
MartinJohnson 0:c65854d98061 519 uint32_t result;
MartinJohnson 0:c65854d98061 520
MartinJohnson 0:c65854d98061 521 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
MartinJohnson 0:c65854d98061 522 return(result);
MartinJohnson 0:c65854d98061 523 }
MartinJohnson 0:c65854d98061 524
MartinJohnson 0:c65854d98061 525
MartinJohnson 0:c65854d98061 526 /** \brief Set Base Priority
MartinJohnson 0:c65854d98061 527
MartinJohnson 0:c65854d98061 528 This function assigns the given value to the Base Priority register.
MartinJohnson 0:c65854d98061 529
MartinJohnson 0:c65854d98061 530 \param [in] basePri Base Priority value to set
MartinJohnson 0:c65854d98061 531 */
MartinJohnson 0:c65854d98061 532 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
MartinJohnson 0:c65854d98061 533 {
MartinJohnson 0:c65854d98061 534 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
MartinJohnson 0:c65854d98061 535 }
MartinJohnson 0:c65854d98061 536
MartinJohnson 0:c65854d98061 537
MartinJohnson 0:c65854d98061 538 /** \brief Get Fault Mask
MartinJohnson 0:c65854d98061 539
MartinJohnson 0:c65854d98061 540 This function returns the current value of the Fault Mask register.
MartinJohnson 0:c65854d98061 541
MartinJohnson 0:c65854d98061 542 \return Fault Mask register value
MartinJohnson 0:c65854d98061 543 */
MartinJohnson 0:c65854d98061 544 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
MartinJohnson 0:c65854d98061 545 {
MartinJohnson 0:c65854d98061 546 uint32_t result;
MartinJohnson 0:c65854d98061 547
MartinJohnson 0:c65854d98061 548 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
MartinJohnson 0:c65854d98061 549 return(result);
MartinJohnson 0:c65854d98061 550 }
MartinJohnson 0:c65854d98061 551
MartinJohnson 0:c65854d98061 552
MartinJohnson 0:c65854d98061 553 /** \brief Set Fault Mask
MartinJohnson 0:c65854d98061 554
MartinJohnson 0:c65854d98061 555 This function assigns the given value to the Fault Mask register.
MartinJohnson 0:c65854d98061 556
MartinJohnson 0:c65854d98061 557 \param [in] faultMask Fault Mask value to set
MartinJohnson 0:c65854d98061 558 */
MartinJohnson 0:c65854d98061 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
MartinJohnson 0:c65854d98061 560 {
MartinJohnson 0:c65854d98061 561 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
MartinJohnson 0:c65854d98061 562 }
MartinJohnson 0:c65854d98061 563
MartinJohnson 0:c65854d98061 564 #endif /* (__CORTEX_M >= 0x03) */
MartinJohnson 0:c65854d98061 565
MartinJohnson 0:c65854d98061 566
MartinJohnson 0:c65854d98061 567 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
MartinJohnson 0:c65854d98061 568
MartinJohnson 0:c65854d98061 569 /** \brief Get FPSCR
MartinJohnson 0:c65854d98061 570
MartinJohnson 0:c65854d98061 571 This function returns the current value of the Floating Point Status/Control register.
MartinJohnson 0:c65854d98061 572
MartinJohnson 0:c65854d98061 573 \return Floating Point Status/Control register value
MartinJohnson 0:c65854d98061 574 */
MartinJohnson 0:c65854d98061 575 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
MartinJohnson 0:c65854d98061 576 {
MartinJohnson 0:c65854d98061 577 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
MartinJohnson 0:c65854d98061 578 uint32_t result;
MartinJohnson 0:c65854d98061 579
MartinJohnson 0:c65854d98061 580 /* Empty asm statement works as a scheduling barrier */
MartinJohnson 0:c65854d98061 581 __ASM volatile ("");
MartinJohnson 0:c65854d98061 582 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
MartinJohnson 0:c65854d98061 583 __ASM volatile ("");
MartinJohnson 0:c65854d98061 584 return(result);
MartinJohnson 0:c65854d98061 585 #else
MartinJohnson 0:c65854d98061 586 return(0);
MartinJohnson 0:c65854d98061 587 #endif
MartinJohnson 0:c65854d98061 588 }
MartinJohnson 0:c65854d98061 589
MartinJohnson 0:c65854d98061 590
MartinJohnson 0:c65854d98061 591 /** \brief Set FPSCR
MartinJohnson 0:c65854d98061 592
MartinJohnson 0:c65854d98061 593 This function assigns the given value to the Floating Point Status/Control register.
MartinJohnson 0:c65854d98061 594
MartinJohnson 0:c65854d98061 595 \param [in] fpscr Floating Point Status/Control value to set
MartinJohnson 0:c65854d98061 596 */
MartinJohnson 0:c65854d98061 597 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
MartinJohnson 0:c65854d98061 598 {
MartinJohnson 0:c65854d98061 599 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
MartinJohnson 0:c65854d98061 600 /* Empty asm statement works as a scheduling barrier */
MartinJohnson 0:c65854d98061 601 __ASM volatile ("");
MartinJohnson 0:c65854d98061 602 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
MartinJohnson 0:c65854d98061 603 __ASM volatile ("");
MartinJohnson 0:c65854d98061 604 #endif
MartinJohnson 0:c65854d98061 605 }
MartinJohnson 0:c65854d98061 606
MartinJohnson 0:c65854d98061 607 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
MartinJohnson 0:c65854d98061 608
MartinJohnson 0:c65854d98061 609
MartinJohnson 0:c65854d98061 610 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
MartinJohnson 0:c65854d98061 611 /* IAR iccarm specific functions */
MartinJohnson 0:c65854d98061 612 #include <cmsis_iar.h>
MartinJohnson 0:c65854d98061 613
MartinJohnson 0:c65854d98061 614
MartinJohnson 0:c65854d98061 615 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
MartinJohnson 0:c65854d98061 616 /* TI CCS specific functions */
MartinJohnson 0:c65854d98061 617 #include <cmsis_ccs.h>
MartinJohnson 0:c65854d98061 618
MartinJohnson 0:c65854d98061 619
MartinJohnson 0:c65854d98061 620 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
MartinJohnson 0:c65854d98061 621 /* TASKING carm specific functions */
MartinJohnson 0:c65854d98061 622 /*
MartinJohnson 0:c65854d98061 623 * The CMSIS functions have been implemented as intrinsics in the compiler.
MartinJohnson 0:c65854d98061 624 * Please use "carm -?i" to get an up to date list of all intrinsics,
MartinJohnson 0:c65854d98061 625 * Including the CMSIS ones.
MartinJohnson 0:c65854d98061 626 */
MartinJohnson 0:c65854d98061 627
MartinJohnson 0:c65854d98061 628
MartinJohnson 0:c65854d98061 629 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
MartinJohnson 0:c65854d98061 630 /* Cosmic specific functions */
MartinJohnson 0:c65854d98061 631 #include <cmsis_csm.h>
MartinJohnson 0:c65854d98061 632
MartinJohnson 0:c65854d98061 633 #endif
MartinJohnson 0:c65854d98061 634
MartinJohnson 0:c65854d98061 635 /*@} end of CMSIS_Core_RegAccFunctions */
MartinJohnson 0:c65854d98061 636
MartinJohnson 0:c65854d98061 637 #endif /* __CORE_CMFUNC_H */