Demo of low res colour vga video for stm32f3 discovery board
Dependencies: STM32F3-Discovery-minimal
Fork of Space_Invaders_Demo by
video.c@9:654866da5da4, 2018-05-29 (annotated)
- Committer:
- MartinJohnson
- Date:
- Tue May 29 23:52:40 2018 +0000
- Revision:
- 9:654866da5da4
- Parent:
- 8:34fb94209517
- Child:
- 10:8ffcefda667a
196x160 vga
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
MartinJohnson | 0:404dae88af71 | 1 | /*************************************************************************** |
MartinJohnson | 0:404dae88af71 | 2 | * STM32 VGA demo |
MartinJohnson | 0:404dae88af71 | 3 | * Copyright (C) 2012 Artekit Italy |
MartinJohnson | 0:404dae88af71 | 4 | * http://www.artekit.eu |
MartinJohnson | 0:404dae88af71 | 5 | * Written by Ruben H. Meleca |
MartinJohnson | 0:404dae88af71 | 6 | |
MartinJohnson | 0:404dae88af71 | 7 | ### video.c |
MartinJohnson | 0:404dae88af71 | 8 | |
MartinJohnson | 0:404dae88af71 | 9 | # This program is free software; you can redistribute it and/or modify |
MartinJohnson | 0:404dae88af71 | 10 | # it under the terms of the GNU General Public License as published by |
MartinJohnson | 0:404dae88af71 | 11 | # the Free Software Foundation; either version 2 of the License, or |
MartinJohnson | 0:404dae88af71 | 12 | # (at your option) any later version. |
MartinJohnson | 0:404dae88af71 | 13 | # |
MartinJohnson | 0:404dae88af71 | 14 | # This program is distributed in the hope that it will be useful, |
MartinJohnson | 0:404dae88af71 | 15 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
MartinJohnson | 0:404dae88af71 | 16 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
MartinJohnson | 0:404dae88af71 | 17 | # GNU General Public License for more details. |
MartinJohnson | 0:404dae88af71 | 18 | # |
MartinJohnson | 0:404dae88af71 | 19 | # You should have received a copy of the GNU General Public License |
MartinJohnson | 0:404dae88af71 | 20 | # along with this program; if not, write to the Free Software |
MartinJohnson | 0:404dae88af71 | 21 | # Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
MartinJohnson | 0:404dae88af71 | 22 | |
MartinJohnson | 0:404dae88af71 | 23 | ***************************************************************************/ |
MartinJohnson | 0:404dae88af71 | 24 | |
MartinJohnson | 0:404dae88af71 | 25 | // VGA connector |
MartinJohnson | 0:404dae88af71 | 26 | // --------------------- |
MartinJohnson | 0:404dae88af71 | 27 | // \ Ro Go Bo o Xo / X=Gnd |
MartinJohnson | 4:de45d218ed3c | 28 | // \ o o o o Xo / H=HSync=PA8 R=Red=PD0 |
MartinJohnson | 4:de45d218ed3c | 29 | // \ o o Ho Vo o / V=Vsync=PA1 G=Green=PD1 |
MartinJohnson | 4:de45d218ed3c | 30 | // -------------- B=Blue=PD2 |
MartinJohnson | 0:404dae88af71 | 31 | // |
MartinJohnson | 4:de45d218ed3c | 32 | // R G B o o X X |
MartinJohnson | 1:1b37c4b989b4 | 33 | // o o o o o H V o |
MartinJohnson | 1:1b37c4b989b4 | 34 | // |
MartinJohnson | 0:404dae88af71 | 35 | #include "stm32f30x.h" |
MartinJohnson | 0:404dae88af71 | 36 | #include "video.h" |
MartinJohnson | 8:34fb94209517 | 37 | //#define HTOTAL (VID_HSIZE+3) /* Total bytes to send */ |
MartinJohnson | 0:404dae88af71 | 38 | |
MartinJohnson | 3:93e488fbb8a2 | 39 | __attribute__ ((aligned (4))) u8 volatile fba[VID_VSIZE*HTOTAL]; /* Frame buffer */ |
MartinJohnson | 0:404dae88af71 | 40 | |
MartinJohnson | 3:93e488fbb8a2 | 41 | __attribute__ ((section ("ccmram"))) u8 volatile *fb[VID_VSIZE]; |
MartinJohnson | 0:404dae88af71 | 42 | |
MartinJohnson | 0:404dae88af71 | 43 | int fboffset=0; |
MartinJohnson | 0:404dae88af71 | 44 | |
MartinJohnson | 5:594c9712697c | 45 | __attribute__ ((section ("ccmram"))) static volatile u16 vline = 0; /* The current line being drawn */ |
MartinJohnson | 5:594c9712697c | 46 | __attribute__ ((section ("ccmram"))) static volatile u32 vflag = 0; /* When 1, the DMA request can draw on the screen */ |
MartinJohnson | 5:594c9712697c | 47 | __attribute__ ((section ("ccmram"))) static volatile u32 vdraw = 0; /* Used to increment vline every 3 drawn lines */ |
MartinJohnson | 0:404dae88af71 | 48 | |
MartinJohnson | 3:93e488fbb8a2 | 49 | #define GPIO_MODE_INPUT 0 |
MartinJohnson | 3:93e488fbb8a2 | 50 | #define GPIO_MODE_OUTPUT 1 |
MartinJohnson | 3:93e488fbb8a2 | 51 | #define GPIO_MODE_AF 2 |
MartinJohnson | 3:93e488fbb8a2 | 52 | |
MartinJohnson | 3:93e488fbb8a2 | 53 | #define GPIO_NO_PULL 0 |
MartinJohnson | 3:93e488fbb8a2 | 54 | #define GPIO_PULL_UP 1 |
MartinJohnson | 3:93e488fbb8a2 | 55 | #define GPIO_PULL_DOWN 2 |
MartinJohnson | 3:93e488fbb8a2 | 56 | |
MartinJohnson | 3:93e488fbb8a2 | 57 | #define GPIO_OUTPUT_PUSH_PULL 0 |
MartinJohnson | 3:93e488fbb8a2 | 58 | |
MartinJohnson | 3:93e488fbb8a2 | 59 | |
MartinJohnson | 3:93e488fbb8a2 | 60 | #define GPIO_SPEED_MEDIUM 1 |
MartinJohnson | 3:93e488fbb8a2 | 61 | #define GPIO_SPEED_LOW 0 |
MartinJohnson | 3:93e488fbb8a2 | 62 | #define GPIO_SPEED_HIGH 3 |
MartinJohnson | 3:93e488fbb8a2 | 63 | |
MartinJohnson | 3:93e488fbb8a2 | 64 | |
MartinJohnson | 3:93e488fbb8a2 | 65 | void gpio_set_mode(GPIO_TypeDef *g,int n,int mode) { |
MartinJohnson | 3:93e488fbb8a2 | 66 | n=n<<1; |
MartinJohnson | 3:93e488fbb8a2 | 67 | g->MODER = (g->MODER & ~(3<<n)) | (mode<<n); |
MartinJohnson | 3:93e488fbb8a2 | 68 | } |
MartinJohnson | 3:93e488fbb8a2 | 69 | |
MartinJohnson | 3:93e488fbb8a2 | 70 | void gpio_set_af(GPIO_TypeDef *g,int n,int af, int otype, int pupd, int speed) { |
MartinJohnson | 3:93e488fbb8a2 | 71 | int reg=n>>3; |
MartinJohnson | 3:93e488fbb8a2 | 72 | int pos=(n&7)*4; |
MartinJohnson | 3:93e488fbb8a2 | 73 | g->AFR[reg] = (g->AFR[reg] & ~(0xf<<pos)) | (af<<pos); // alt func |
MartinJohnson | 3:93e488fbb8a2 | 74 | pos=(n<<1); |
MartinJohnson | 3:93e488fbb8a2 | 75 | g->OSPEEDR = (g->OSPEEDR & ~(3<<pos)) | (speed<<pos); |
MartinJohnson | 3:93e488fbb8a2 | 76 | g->OTYPER = (g->OTYPER & ~(1<<n)) | (otype<<n); |
MartinJohnson | 3:93e488fbb8a2 | 77 | gpio_set_mode(g,n,GPIO_MODE_AF); |
MartinJohnson | 3:93e488fbb8a2 | 78 | g->PUPDR = (g->PUPDR & ~(3<<pos)) | (pupd<<pos); |
MartinJohnson | 3:93e488fbb8a2 | 79 | } |
MartinJohnson | 3:93e488fbb8a2 | 80 | |
MartinJohnson | 3:93e488fbb8a2 | 81 | void TIMER_Configuration(void) { |
MartinJohnson | 0:404dae88af71 | 82 | u32 TimerPeriod = 0; |
MartinJohnson | 0:404dae88af71 | 83 | u16 Channel1Pulse = 0, Channel2Pulse = 0, Channel3Pulse = 0; |
MartinJohnson | 0:404dae88af71 | 84 | |
MartinJohnson | 3:93e488fbb8a2 | 85 | gpio_set_af(GPIOA,1,1,GPIO_OUTPUT_PUSH_PULL, GPIO_NO_PULL, GPIO_SPEED_LOW); |
MartinJohnson | 3:93e488fbb8a2 | 86 | gpio_set_af(GPIOA,8,6,GPIO_OUTPUT_PUSH_PULL, GPIO_NO_PULL, GPIO_SPEED_LOW); |
MartinJohnson | 0:404dae88af71 | 87 | |
MartinJohnson | 0:404dae88af71 | 88 | /* |
MartinJohnson | 8:34fb94209517 | 89 | VGA 640x480 @ 60 Hz |
MartinJohnson | 8:34fb94209517 | 90 | Vertical refresh 31.46875 kHz |
MartinJohnson | 0:404dae88af71 | 91 | Pixel freq. 36.0 MHz |
MartinJohnson | 0:404dae88af71 | 92 | |
MartinJohnson | 0:404dae88af71 | 93 | 1 system tick @ 72Mhz = 0,0138 us |
MartinJohnson | 0:404dae88af71 | 94 | */ |
MartinJohnson | 0:404dae88af71 | 95 | |
MartinJohnson | 0:404dae88af71 | 96 | /* |
MartinJohnson | 0:404dae88af71 | 97 | Horizontal timing |
MartinJohnson | 0:404dae88af71 | 98 | ----------------- |
MartinJohnson | 0:404dae88af71 | 99 | |
MartinJohnson | 9:654866da5da4 | 100 | Timer 1 period = 31468.53 Hz |
MartinJohnson | 0:404dae88af71 | 101 | |
MartinJohnson | 0:404dae88af71 | 102 | Horizontal timing info |
MartinJohnson | 0:404dae88af71 | 103 | ---------------------- |
MartinJohnson | 0:404dae88af71 | 104 | |
MartinJohnson | 8:34fb94209517 | 105 | Dots us ticks |
MartinJohnson | 8:34fb94209517 | 106 | ---------------------------------------------------- |
MartinJohnson | 8:34fb94209517 | 107 | Visible area 640 25.422045680238 1830 |
MartinJohnson | 8:34fb94209517 | 108 | Front porch 16 0.6355511420059 46 |
MartinJohnson | 8:34fb94209517 | 109 | Sync pulse 96 3.8133068520357 275 |
MartinJohnson | 8:34fb94209517 | 110 | Back porch 48 1.9066534260179 137 |
MartinJohnson | 8:34fb94209517 | 111 | Whole line 800 31.777557100298 2288 |
MartinJohnson | 9:654866da5da4 | 112 | Sync + bp 144 5.7199602780536 412 |
MartinJohnson | 0:404dae88af71 | 113 | |
MartinJohnson | 0:404dae88af71 | 114 | */ |
MartinJohnson | 0:404dae88af71 | 115 | |
MartinJohnson | 7:513afc954d6e | 116 | TimerPeriod = 2288;//2303; |
MartinJohnson | 8:34fb94209517 | 117 | Channel1Pulse = 275;//274;//274;//277; /* HSYNC */ |
MartinJohnson | 9:654866da5da4 | 118 | Channel3Pulse = 412;//412;//394; |
MartinJohnson | 0:404dae88af71 | 119 | |
MartinJohnson | 3:93e488fbb8a2 | 120 | TIM1->CR1 &= ~TIM_CR1_CEN; |
MartinJohnson | 8:34fb94209517 | 121 | |
MartinJohnson | 3:93e488fbb8a2 | 122 | TIM1->PSC=0; |
MartinJohnson | 3:93e488fbb8a2 | 123 | TIM1->ARR=TimerPeriod; |
MartinJohnson | 3:93e488fbb8a2 | 124 | TIM1->CNT=0; |
MartinJohnson | 0:404dae88af71 | 125 | |
MartinJohnson | 8:34fb94209517 | 126 | // disable Capture and Compare |
MartinJohnson | 8:34fb94209517 | 127 | TIM1->CCER &= ~(TIM_CCER_CC1E); |
MartinJohnson | 3:93e488fbb8a2 | 128 | // set output compare 1 to PWM mode with preload |
MartinJohnson | 3:93e488fbb8a2 | 129 | TIM1->CCMR1 = (TIM1->CCMR1 & ~(TIM_CCMR1_OC1M | TIM_CCMR1_CC1S)) | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1; |
MartinJohnson | 3:93e488fbb8a2 | 130 | TIM1->CCR1=Channel1Pulse; |
MartinJohnson | 3:93e488fbb8a2 | 131 | // enable Capture and Compare 1 |
MartinJohnson | 8:34fb94209517 | 132 | TIM1->CCER |= TIM_CCER_CC1E | TIM_CCER_CC1P ; // output polarity low |
MartinJohnson | 3:93e488fbb8a2 | 133 | // main output enable |
MartinJohnson | 3:93e488fbb8a2 | 134 | TIM1->BDTR |= TIM_BDTR_MOE; |
MartinJohnson | 3:93e488fbb8a2 | 135 | |
MartinJohnson | 8:34fb94209517 | 136 | //TIM1->SMCR |= TIM_SMCR_MSM; // master slave mode |
MartinJohnson | 3:93e488fbb8a2 | 137 | |
MartinJohnson | 7:513afc954d6e | 138 | TIM1->CR2 = (TIM1->CR2 & ~TIM_CR2_MMS) | (2<<4); ///*TIM_CR2_MMS_2 |*/ TIM_CR2_MMS_1 /*| TIM_CR2_MMS_0*/;// TIM_TRGOSource_Update mode |
MartinJohnson | 3:93e488fbb8a2 | 139 | |
MartinJohnson | 3:93e488fbb8a2 | 140 | TIM8->CR1 &= ~TIM_CR1_CEN; |
MartinJohnson | 8:34fb94209517 | 141 | TIM8->CR1 |= TIM_CR1_ARPE | TIM_CR1_URS; |
MartinJohnson | 5:594c9712697c | 142 | TIM8->PSC=0; |
MartinJohnson | 8:34fb94209517 | 143 | TIM8->ARR=8; |
MartinJohnson | 3:93e488fbb8a2 | 144 | TIM8->CNT=0; |
MartinJohnson | 3:93e488fbb8a2 | 145 | |
MartinJohnson | 3:93e488fbb8a2 | 146 | TIM8->DIER |= TIM_DIER_UDE; |
MartinJohnson | 7:513afc954d6e | 147 | |
MartinJohnson | 7:513afc954d6e | 148 | TIM8->SMCR=TIM8->SMCR & ~(TIM_SMCR_SMS | TIM_SMCR_TS) | 6 | (3<<4); // trigger mode from itr3 (tim3) |
MartinJohnson | 0:404dae88af71 | 149 | |
MartinJohnson | 7:513afc954d6e | 150 | TIM3->CR1 &= ~TIM_CR1_CEN; |
MartinJohnson | 7:513afc954d6e | 151 | TIM3->PSC=0; |
MartinJohnson | 8:34fb94209517 | 152 | TIM3->ARR=Channel3Pulse; |
MartinJohnson | 7:513afc954d6e | 153 | TIM3->CNT=0; |
MartinJohnson | 8:34fb94209517 | 154 | TIM3->CR1 |= TIM_CR1_ARPE | TIM_CR1_URS; |
MartinJohnson | 7:513afc954d6e | 155 | TIM3->CR1 |= TIM_CR1_OPM; |
MartinJohnson | 7:513afc954d6e | 156 | TIM3->SMCR=TIM3->SMCR & ~(TIM_SMCR_SMS | TIM_SMCR_TS) | 6 ; // trigger mode from itr0 (tim1) |
MartinJohnson | 7:513afc954d6e | 157 | TIM3->CR2 = (TIM3->CR2 & ~TIM_CR2_MMS) | (2<<4); ///*TIM_CR2_MMS_2 |*/ TIM_CR2_MMS_1 /*| TIM_CR2_MMS_0*/;// TIM_TRGOSource_Update mode |
MartinJohnson | 7:513afc954d6e | 158 | |
MartinJohnson | 0:404dae88af71 | 159 | /* |
MartinJohnson | 0:404dae88af71 | 160 | Vertical timing |
MartinJohnson | 0:404dae88af71 | 161 | --------------- |
MartinJohnson | 0:404dae88af71 | 162 | |
MartinJohnson | 0:404dae88af71 | 163 | Polarity of vertical sync pulse is positive. |
MartinJohnson | 0:404dae88af71 | 164 | |
MartinJohnson | 0:404dae88af71 | 165 | Lines |
MartinJohnson | 0:404dae88af71 | 166 | ------------------------------ |
MartinJohnson | 8:34fb94209517 | 167 | Visible area 480 |
MartinJohnson | 8:34fb94209517 | 168 | Front porch 10 |
MartinJohnson | 0:404dae88af71 | 169 | Sync pulse 2 |
MartinJohnson | 8:34fb94209517 | 170 | Back porch 33 |
MartinJohnson | 8:34fb94209517 | 171 | Whole frame 525 |
MartinJohnson | 0:404dae88af71 | 172 | |
MartinJohnson | 0:404dae88af71 | 173 | */ |
MartinJohnson | 0:404dae88af71 | 174 | |
MartinJohnson | 0:404dae88af71 | 175 | /* VSYNC (TIM2_CH2) and VSYNC_BACKPORCH (TIM2_CH3) */ |
MartinJohnson | 0:404dae88af71 | 176 | /* Channel 2 and 3 Configuration in PWM mode */ |
MartinJohnson | 8:34fb94209517 | 177 | TIM2->SMCR=TIM2->SMCR & ~(TIM_SMCR_SMS | TIM_SMCR_TS) | 5;//5 ;// gated slave mode trigger source 0 |
MartinJohnson | 3:93e488fbb8a2 | 178 | |
MartinJohnson | 0:404dae88af71 | 179 | |
MartinJohnson | 7:513afc954d6e | 180 | TimerPeriod = 525; /* Vertical lines */ |
MartinJohnson | 0:404dae88af71 | 181 | Channel2Pulse = 2; /* Sync pulse */ |
MartinJohnson | 7:513afc954d6e | 182 | Channel3Pulse = 35; /* Sync pulse + Back porch */ |
MartinJohnson | 0:404dae88af71 | 183 | |
MartinJohnson | 3:93e488fbb8a2 | 184 | TIM2->CR1 &= ~TIM_CR1_CEN; |
MartinJohnson | 3:93e488fbb8a2 | 185 | TIM2->PSC=0; |
MartinJohnson | 3:93e488fbb8a2 | 186 | TIM2->ARR=TimerPeriod; |
MartinJohnson | 3:93e488fbb8a2 | 187 | TIM2->CNT=0; |
MartinJohnson | 0:404dae88af71 | 188 | |
MartinJohnson | 3:93e488fbb8a2 | 189 | // disable Capture and Compare 2 and 3 |
MartinJohnson | 3:93e488fbb8a2 | 190 | TIM2->CCER &= ~(TIM_CCER_CC2E | TIM_CCER_CC3E); |
MartinJohnson | 3:93e488fbb8a2 | 191 | // set output compare 1 to PWM mode with preload |
MartinJohnson | 3:93e488fbb8a2 | 192 | TIM2->CCMR1 = (TIM2->CCMR1 & ~(TIM_CCMR1_OC2M | TIM_CCMR1_CC2S)) | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1; |
MartinJohnson | 3:93e488fbb8a2 | 193 | TIM2->CCR2=Channel2Pulse; |
MartinJohnson | 3:93e488fbb8a2 | 194 | TIM2->CCR3=Channel3Pulse; |
MartinJohnson | 3:93e488fbb8a2 | 195 | |
MartinJohnson | 8:34fb94209517 | 196 | //TIM2->CR1 |= TIM_CR1_ARPE | TIM_CR1_URS; |
MartinJohnson | 8:34fb94209517 | 197 | //TIM2->CR2 &= ~TIM_CR2_OIS1; // output idle state set |
MartinJohnson | 3:93e488fbb8a2 | 198 | // enable Capture and Compare 2 and 3 |
MartinJohnson | 3:93e488fbb8a2 | 199 | TIM2->CCER |= TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC1P | TIM_CCER_CC2P; // output polarity low |
MartinJohnson | 3:93e488fbb8a2 | 200 | |
MartinJohnson | 3:93e488fbb8a2 | 201 | // main output enable |
MartinJohnson | 3:93e488fbb8a2 | 202 | TIM2->BDTR |= TIM_BDTR_MOE; |
MartinJohnson | 0:404dae88af71 | 203 | |
MartinJohnson | 5:594c9712697c | 204 | NVIC->IP[TIM2_IRQn]=32; // Interrupt Priority, lower is higher priority |
MartinJohnson | 3:93e488fbb8a2 | 205 | NVIC->ISER[TIM2_IRQn >> 0x05] = 1 << (TIM2_IRQn & 0x1F); // Interrupt enable |
MartinJohnson | 3:93e488fbb8a2 | 206 | |
MartinJohnson | 3:93e488fbb8a2 | 207 | TIM2->DIER |= TIM_DIER_CC3IE; |
MartinJohnson | 3:93e488fbb8a2 | 208 | |
MartinJohnson | 5:594c9712697c | 209 | NVIC->IP[TIM1_CC_IRQn]=0; // Interrupt Priority, lower is higher priority |
MartinJohnson | 3:93e488fbb8a2 | 210 | NVIC->ISER[TIM1_CC_IRQn >> 0x05] = 1 << (TIM1_CC_IRQn & 0x1F); // Interrupt enable |
MartinJohnson | 0:404dae88af71 | 211 | |
MartinJohnson | 7:513afc954d6e | 212 | //TIM1->DIER |= TIM_DIER_CC2IE; |
MartinJohnson | 3:93e488fbb8a2 | 213 | |
MartinJohnson | 3:93e488fbb8a2 | 214 | TIM2->CR1 |= TIM_CR1_CEN; |
MartinJohnson | 3:93e488fbb8a2 | 215 | TIM1->CR1 |= TIM_CR1_CEN; |
MartinJohnson | 0:404dae88af71 | 216 | } |
MartinJohnson | 0:404dae88af71 | 217 | |
MartinJohnson | 3:93e488fbb8a2 | 218 | void DMA_Configuration(void) { |
MartinJohnson | 3:93e488fbb8a2 | 219 | //gpio_set_af(GPIOA,7,5,GPIO_OUTPUT_PUSH_PULL, GPIO_NO_PULL, GPIO_SPEED_HIGH); |
MartinJohnson | 3:93e488fbb8a2 | 220 | |
MartinJohnson | 7:513afc954d6e | 221 | GPIOD->PUPDR = (GPIOD->PUPDR & ~0xffff);//0xaaaa; // pull down (1010) |
MartinJohnson | 7:513afc954d6e | 222 | GPIOD->OSPEEDR = (GPIOD->OSPEEDR & ~0xffff) | 0xffff; |
MartinJohnson | 3:93e488fbb8a2 | 223 | |
MartinJohnson | 0:404dae88af71 | 224 | |
MartinJohnson | 3:93e488fbb8a2 | 225 | RCC->AHBENR |= RCC_AHBENR_DMA2EN; |
MartinJohnson | 3:93e488fbb8a2 | 226 | // direction = peripheral dest, memory inc, peripheral size=halfword, memory size=byte, priority level=high, transmission complete interrupt enabled |
MartinJohnson | 3:93e488fbb8a2 | 227 | DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE; |
MartinJohnson | 3:93e488fbb8a2 | 228 | // DMA1_Channel3->CCR = DMA_CCR_PINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_MEM2MEM; |
MartinJohnson | 3:93e488fbb8a2 | 229 | // bytes to transfer |
MartinJohnson | 7:513afc954d6e | 230 | DMA2_Channel1->CNDTR = HTOTAL; |
MartinJohnson | 3:93e488fbb8a2 | 231 | // peripheral address |
MartinJohnson | 3:93e488fbb8a2 | 232 | DMA2_Channel1->CPAR =(uint32_t) &GPIOD->ODR; |
MartinJohnson | 3:93e488fbb8a2 | 233 | // memory address |
MartinJohnson | 3:93e488fbb8a2 | 234 | DMA2_Channel1->CMAR =(u32) fba+fboffset; |
MartinJohnson | 3:93e488fbb8a2 | 235 | // enable CC DMA for TIM16 |
MartinJohnson | 3:93e488fbb8a2 | 236 | // TIM16->DIER |= TIM_DIER_CC1DE; |
MartinJohnson | 3:93e488fbb8a2 | 237 | // configure NVIC |
MartinJohnson | 3:93e488fbb8a2 | 238 | NVIC->IP[DMA2_Channel1_IRQn]=16; // Interrupt Priority, lower is higher priority |
MartinJohnson | 3:93e488fbb8a2 | 239 | NVIC->ISER[DMA2_Channel1_IRQn >> 0x05] = 1 << (DMA2_Channel1_IRQn & 0x1F); // Interrupt enable |
MartinJohnson | 0:404dae88af71 | 240 | |
MartinJohnson | 0:404dae88af71 | 241 | } |
MartinJohnson | 0:404dae88af71 | 242 | |
MartinJohnson | 0:404dae88af71 | 243 | //***************************************************************************** |
MartinJohnson | 0:404dae88af71 | 244 | // This irq is generated at the end of the horizontal back porch. |
MartinJohnson | 0:404dae88af71 | 245 | // Test if inside a valid vertical start frame (vflag variable), |
MartinJohnson | 3:93e488fbb8a2 | 246 | // and start the DMA to output a single frame buffer line through the GPIO device. |
MartinJohnson | 0:404dae88af71 | 247 | //***************************************************************************** |
MartinJohnson | 0:404dae88af71 | 248 | //__attribute__((interrupt)) |
MartinJohnson | 7:513afc954d6e | 249 | /* |
MartinJohnson | 3:93e488fbb8a2 | 250 | __attribute__ ((section ("ccmram"))) void TIM1_CC_IRQHandler(void) { |
MartinJohnson | 7:513afc954d6e | 251 | //GPIOD->MODER=0x5555; |
MartinJohnson | 7:513afc954d6e | 252 | GPIOD->MODER = (GPIOD->MODER&0xffff0000) | 0x5555; // output mode for PD0-7 |
MartinJohnson | 7:513afc954d6e | 253 | |
MartinJohnson | 3:93e488fbb8a2 | 254 | if (vflag) { |
MartinJohnson | 5:594c9712697c | 255 | DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_EN;// 0x3093; |
MartinJohnson | 3:93e488fbb8a2 | 256 | // TIM8->CNT=0;//TIM8->ARR; |
MartinJohnson | 5:594c9712697c | 257 | |
MartinJohnson | 3:93e488fbb8a2 | 258 | TIM8->CR1 |= TIM_CR1_CEN; |
MartinJohnson | 5:594c9712697c | 259 | //TIM8->CNT=7;//4-(TIM1->CNT&7); |
MartinJohnson | 0:404dae88af71 | 260 | } |
MartinJohnson | 0:404dae88af71 | 261 | TIM1->SR = 0xFFFB; //~TIM_IT_CC2; |
MartinJohnson | 7:513afc954d6e | 262 | |
MartinJohnson | 7:513afc954d6e | 263 | TIM1->SR = 0xFFFB; |
MartinJohnson | 0:404dae88af71 | 264 | } |
MartinJohnson | 7:513afc954d6e | 265 | */ |
MartinJohnson | 0:404dae88af71 | 266 | |
MartinJohnson | 0:404dae88af71 | 267 | //***************************************************************************** |
MartinJohnson | 0:404dae88af71 | 268 | // This irq is generated at the end of the vertical back porch. |
MartinJohnson | 0:404dae88af71 | 269 | // Sets the 'vflag' variable to 1 (valid vertical frame). |
MartinJohnson | 0:404dae88af71 | 270 | //***************************************************************************** |
MartinJohnson | 0:404dae88af71 | 271 | //__attribute__((interrupt)) |
MartinJohnson | 8:34fb94209517 | 272 | |
MartinJohnson | 8:34fb94209517 | 273 | int nlines=0; |
MartinJohnson | 3:93e488fbb8a2 | 274 | __attribute__ ((section ("ccmram"))) void TIM2_IRQHandler(void) { |
MartinJohnson | 0:404dae88af71 | 275 | vflag = 1; |
MartinJohnson | 0:404dae88af71 | 276 | TIM2->SR = 0xFFF7; //~TIM_IT_CC3; |
MartinJohnson | 7:513afc954d6e | 277 | TIM8->CR1 &= ~TIM_CR1_CEN; |
MartinJohnson | 8:34fb94209517 | 278 | DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE ; |
MartinJohnson | 8:34fb94209517 | 279 | DMA2_Channel1->CNDTR = HTOTAL; |
MartinJohnson | 8:34fb94209517 | 280 | // 0x3093; |
MartinJohnson | 7:513afc954d6e | 281 | //GPIOD->MODER=0; |
MartinJohnson | 7:513afc954d6e | 282 | //GPIOD->MODER = (GPIOD->MODER&0xffff0000); // input mode for PD0-7 |
MartinJohnson | 7:513afc954d6e | 283 | // GPIOD->ODR=0x00; |
MartinJohnson | 7:513afc954d6e | 284 | //GPIOD->MODER=0xaaaa; |
MartinJohnson | 7:513afc954d6e | 285 | TIM8->CNT=0; |
MartinJohnson | 8:34fb94209517 | 286 | DMA2_Channel1->CPAR=&nlines;//(uint32_t) &GPIOD->ODR+1; |
MartinJohnson | 7:513afc954d6e | 287 | GPIOD->ODR=0x00; |
MartinJohnson | 7:513afc954d6e | 288 | |
MartinJohnson | 8:34fb94209517 | 289 | //printf("l:%d\n",nlines); |
MartinJohnson | 8:34fb94209517 | 290 | nlines=0; |
MartinJohnson | 9:654866da5da4 | 291 | DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_EN;// | DMA_CCR_CIRC; |
MartinJohnson | 0:404dae88af71 | 292 | } |
MartinJohnson | 0:404dae88af71 | 293 | |
MartinJohnson | 0:404dae88af71 | 294 | //***************************************************************************** |
MartinJohnson | 0:404dae88af71 | 295 | // This interrupt is generated at the end of every line. |
MartinJohnson | 0:404dae88af71 | 296 | // It will increment the line number and set the corresponding line pointer |
MartinJohnson | 0:404dae88af71 | 297 | // in the DMA register. |
MartinJohnson | 0:404dae88af71 | 298 | //***************************************************************************** |
MartinJohnson | 0:404dae88af71 | 299 | //__attribute__((interrupt)) |
MartinJohnson | 8:34fb94209517 | 300 | |
MartinJohnson | 3:93e488fbb8a2 | 301 | __attribute__ ((section ("ccmram"))) void DMA2_Channel1_IRQHandler(void) { |
MartinJohnson | 3:93e488fbb8a2 | 302 | DMA2->IFCR = DMA_ISR_TCIF1; |
MartinJohnson | 5:594c9712697c | 303 | TIM8->CR1 &= ~TIM_CR1_CEN; |
MartinJohnson | 5:594c9712697c | 304 | TIM8->CNT=0; |
MartinJohnson | 7:513afc954d6e | 305 | //while(DMA2_Channel1->CNDTR); |
MartinJohnson | 8:34fb94209517 | 306 | DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE;// | DMA_CCR_CIRC;// | DMA_CCR_EN;// 0x3093; 0x92;// | (1<<10) | (1<<8); |
MartinJohnson | 3:93e488fbb8a2 | 307 | DMA2_Channel1->CNDTR = HTOTAL; |
MartinJohnson | 8:34fb94209517 | 308 | DMA2_Channel1->CPAR=(uint32_t) &GPIOD->ODR;; |
MartinJohnson | 8:34fb94209517 | 309 | nlines++; |
MartinJohnson | 0:404dae88af71 | 310 | vdraw++; |
MartinJohnson | 8:34fb94209517 | 311 | if (vdraw == 3) { |
MartinJohnson | 0:404dae88af71 | 312 | vdraw = 0; |
MartinJohnson | 0:404dae88af71 | 313 | vline++; |
MartinJohnson | 3:93e488fbb8a2 | 314 | if (vline == VID_VSIZE) { |
MartinJohnson | 0:404dae88af71 | 315 | vdraw = vline = vflag = 0; |
MartinJohnson | 9:654866da5da4 | 316 | DMA2_Channel1->CMAR = (u32)fba; |
MartinJohnson | 8:34fb94209517 | 317 | DMA2_Channel1->CPAR=&nlines; |
MartinJohnson | 8:34fb94209517 | 318 | GPIOD->ODR=0x00; |
MartinJohnson | 0:404dae88af71 | 319 | } else { |
MartinJohnson | 3:93e488fbb8a2 | 320 | DMA2_Channel1->CMAR += HTOTAL; |
MartinJohnson | 0:404dae88af71 | 321 | } |
MartinJohnson | 0:404dae88af71 | 322 | } |
MartinJohnson | 7:513afc954d6e | 323 | //GPIOD->ODR=0x00; |
MartinJohnson | 7:513afc954d6e | 324 | if(vflag) |
MartinJohnson | 9:654866da5da4 | 325 | DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_EN;// | DMA_CCR_CIRC; |
MartinJohnson | 7:513afc954d6e | 326 | |
MartinJohnson | 5:594c9712697c | 327 | |
MartinJohnson | 3:93e488fbb8a2 | 328 | } |
MartinJohnson | 0:404dae88af71 | 329 | |
MartinJohnson | 7:513afc954d6e | 330 | __attribute__ ((section ("ccmram"))) void vidNextBuffer(void) { |
MartinJohnson | 9:654866da5da4 | 331 | unsigned *fp=(unsigned *)fba; |
MartinJohnson | 7:513afc954d6e | 332 | for(int i=0;i<VID_VSIZE*HTOTAL/4;i++) |
MartinJohnson | 7:513afc954d6e | 333 | *fp++=(*fp>>4)&0xf0f0f0f; |
MartinJohnson | 7:513afc954d6e | 334 | } |
MartinJohnson | 7:513afc954d6e | 335 | |
MartinJohnson | 3:93e488fbb8a2 | 336 | __attribute__ ((section ("ccmram"))) void waitForRefresh(void) { |
MartinJohnson | 3:93e488fbb8a2 | 337 | while(vflag) __wfi(); |
MartinJohnson | 3:93e488fbb8a2 | 338 | } |
MartinJohnson | 9:654866da5da4 | 339 | |
MartinJohnson | 3:93e488fbb8a2 | 340 | void vidClearScreen(void) { |
MartinJohnson | 0:404dae88af71 | 341 | u16 x, y; |
MartinJohnson | 0:404dae88af71 | 342 | |
MartinJohnson | 3:93e488fbb8a2 | 343 | for (y = 0; y < VID_VSIZE; y++) { |
MartinJohnson | 3:93e488fbb8a2 | 344 | for (x = 0; x < HTOTAL; x++) { |
MartinJohnson | 0:404dae88af71 | 345 | fba[y*HTOTAL+x] = 0; |
MartinJohnson | 0:404dae88af71 | 346 | } |
MartinJohnson | 0:404dae88af71 | 347 | } |
MartinJohnson | 0:404dae88af71 | 348 | } |
MartinJohnson | 0:404dae88af71 | 349 | |
MartinJohnson | 3:93e488fbb8a2 | 350 | void vidDot(int x, int y, int col) { |
MartinJohnson | 3:93e488fbb8a2 | 351 | fb[y][x]=col; |
MartinJohnson | 3:93e488fbb8a2 | 352 | } |
MartinJohnson | 3:93e488fbb8a2 | 353 | |
MartinJohnson | 3:93e488fbb8a2 | 354 | void vidLine(int x, int y, int col) { |
MartinJohnson | 3:93e488fbb8a2 | 355 | fb[y][x]=col; |
MartinJohnson | 3:93e488fbb8a2 | 356 | } |
MartinJohnson | 3:93e488fbb8a2 | 357 | |
MartinJohnson | 3:93e488fbb8a2 | 358 | void vidInit(void) { |
MartinJohnson | 0:404dae88af71 | 359 | int i; |
MartinJohnson | 3:93e488fbb8a2 | 360 | DMA_Configuration(); |
MartinJohnson | 0:404dae88af71 | 361 | TIMER_Configuration(); |
MartinJohnson | 3:93e488fbb8a2 | 362 | for(i=0;i<VID_VSIZE;i++) |
MartinJohnson | 9:654866da5da4 | 363 | fb[i]=fba+i*HTOTAL+2; |
MartinJohnson | 0:404dae88af71 | 364 | vidClearScreen(); |
MartinJohnson | 0:404dae88af71 | 365 | } |
MartinJohnson | 0:404dae88af71 | 366 |