Martin Johnson / Colour_Video_Demo

Demo of low res colour vga video for stm32f3 discovery board

Dependencies:   STM32F3-Discovery-minimal

Fork of Space_Invaders_Demo by Martin Johnson

video.c@8:34fb94209517, 2018-05-29 (annotated)

Committer:
MartinJohnson
Date:
Tue May 29 23:16:35 2018 +0000
Revision:
8:34fb94209517
Parent:
7:513afc954d6e
Child:
9:654866da5da4
204x160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MartinJohnson 0:404dae88af71 1 /***************************************************************************
MartinJohnson 0:404dae88af71 2 * STM32 VGA demo
MartinJohnson 0:404dae88af71 3 * Copyright (C) 2012 Artekit Italy
MartinJohnson 0:404dae88af71 4 * http://www.artekit.eu
MartinJohnson 0:404dae88af71 5 * Written by Ruben H. Meleca
MartinJohnson 0:404dae88af71 6
MartinJohnson 0:404dae88af71 7 ### video.c
MartinJohnson 0:404dae88af71 8
MartinJohnson 0:404dae88af71 9 # This program is free software; you can redistribute it and/or modify
MartinJohnson 0:404dae88af71 10 # it under the terms of the GNU General Public License as published by
MartinJohnson 0:404dae88af71 11 # the Free Software Foundation; either version 2 of the License, or
MartinJohnson 0:404dae88af71 12 # (at your option) any later version.
MartinJohnson 0:404dae88af71 13 #
MartinJohnson 0:404dae88af71 14 # This program is distributed in the hope that it will be useful,
MartinJohnson 0:404dae88af71 15 # but WITHOUT ANY WARRANTY; without even the implied warranty of
MartinJohnson 0:404dae88af71 16 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
MartinJohnson 0:404dae88af71 17 # GNU General Public License for more details.
MartinJohnson 0:404dae88af71 18 #
MartinJohnson 0:404dae88af71 19 # You should have received a copy of the GNU General Public License
MartinJohnson 0:404dae88af71 20 # along with this program; if not, write to the Free Software
MartinJohnson 0:404dae88af71 21 # Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
MartinJohnson 0:404dae88af71 22
MartinJohnson 0:404dae88af71 23 ***************************************************************************/
MartinJohnson 0:404dae88af71 24
MartinJohnson 0:404dae88af71 25 // VGA connector
MartinJohnson 0:404dae88af71 26 // ---------------------
MartinJohnson 0:404dae88af71 27 // \ Ro Go Bo o Xo / X=Gnd
MartinJohnson 4:de45d218ed3c 28 // \ o o o o Xo / H=HSync=PA8 R=Red=PD0
MartinJohnson 4:de45d218ed3c 29 // \ o o Ho Vo o / V=Vsync=PA1 G=Green=PD1
MartinJohnson 4:de45d218ed3c 30 // -------------- B=Blue=PD2
MartinJohnson 0:404dae88af71 31 //
MartinJohnson 4:de45d218ed3c 32 // R G B o o X X
MartinJohnson 1:1b37c4b989b4 33 // o o o o o H V o
MartinJohnson 1:1b37c4b989b4 34 //
MartinJohnson 0:404dae88af71 35 #include "stm32f30x.h"
MartinJohnson 0:404dae88af71 36 #include "video.h"
MartinJohnson 8:34fb94209517 37 //#define HTOTAL (VID_HSIZE+3) /* Total bytes to send */
MartinJohnson 0:404dae88af71 38
MartinJohnson 3:93e488fbb8a2 39 __attribute__ ((aligned (4))) u8 volatile fba[VID_VSIZE*HTOTAL]; /* Frame buffer */
MartinJohnson 0:404dae88af71 40
MartinJohnson 3:93e488fbb8a2 41 __attribute__ ((section ("ccmram"))) u8 volatile *fb[VID_VSIZE];
MartinJohnson 0:404dae88af71 42
MartinJohnson 0:404dae88af71 43 int fboffset=0;
MartinJohnson 0:404dae88af71 44
MartinJohnson 5:594c9712697c 45 __attribute__ ((section ("ccmram"))) static volatile u16 vline = 0; /* The current line being drawn */
MartinJohnson 5:594c9712697c 46 __attribute__ ((section ("ccmram"))) static volatile u32 vflag = 0; /* When 1, the DMA request can draw on the screen */
MartinJohnson 5:594c9712697c 47 __attribute__ ((section ("ccmram"))) static volatile u32 vdraw = 0; /* Used to increment vline every 3 drawn lines */
MartinJohnson 0:404dae88af71 48
MartinJohnson 3:93e488fbb8a2 49 #define GPIO_MODE_INPUT 0
MartinJohnson 3:93e488fbb8a2 50 #define GPIO_MODE_OUTPUT 1
MartinJohnson 3:93e488fbb8a2 51 #define GPIO_MODE_AF 2
MartinJohnson 3:93e488fbb8a2 52
MartinJohnson 3:93e488fbb8a2 53 #define GPIO_NO_PULL 0
MartinJohnson 3:93e488fbb8a2 54 #define GPIO_PULL_UP 1
MartinJohnson 3:93e488fbb8a2 55 #define GPIO_PULL_DOWN 2
MartinJohnson 3:93e488fbb8a2 56
MartinJohnson 3:93e488fbb8a2 57 #define GPIO_OUTPUT_PUSH_PULL 0
MartinJohnson 3:93e488fbb8a2 58
MartinJohnson 3:93e488fbb8a2 59
MartinJohnson 3:93e488fbb8a2 60 #define GPIO_SPEED_MEDIUM 1
MartinJohnson 3:93e488fbb8a2 61 #define GPIO_SPEED_LOW 0
MartinJohnson 3:93e488fbb8a2 62 #define GPIO_SPEED_HIGH 3
MartinJohnson 3:93e488fbb8a2 63
MartinJohnson 3:93e488fbb8a2 64
MartinJohnson 3:93e488fbb8a2 65 void gpio_set_mode(GPIO_TypeDef *g,int n,int mode) {
MartinJohnson 3:93e488fbb8a2 66 n=n<<1;
MartinJohnson 3:93e488fbb8a2 67 g->MODER = (g->MODER & ~(3<<n)) | (mode<<n);
MartinJohnson 3:93e488fbb8a2 68 }
MartinJohnson 3:93e488fbb8a2 69
MartinJohnson 3:93e488fbb8a2 70 void gpio_set_af(GPIO_TypeDef *g,int n,int af, int otype, int pupd, int speed) {
MartinJohnson 3:93e488fbb8a2 71 int reg=n>>3;
MartinJohnson 3:93e488fbb8a2 72 int pos=(n&7)*4;
MartinJohnson 3:93e488fbb8a2 73 g->AFR[reg] = (g->AFR[reg] & ~(0xf<<pos)) | (af<<pos); // alt func
MartinJohnson 3:93e488fbb8a2 74 pos=(n<<1);
MartinJohnson 3:93e488fbb8a2 75 g->OSPEEDR = (g->OSPEEDR & ~(3<<pos)) | (speed<<pos);
MartinJohnson 3:93e488fbb8a2 76 g->OTYPER = (g->OTYPER & ~(1<<n)) | (otype<<n);
MartinJohnson 3:93e488fbb8a2 77 gpio_set_mode(g,n,GPIO_MODE_AF);
MartinJohnson 3:93e488fbb8a2 78 g->PUPDR = (g->PUPDR & ~(3<<pos)) | (pupd<<pos);
MartinJohnson 3:93e488fbb8a2 79 }
MartinJohnson 3:93e488fbb8a2 80
MartinJohnson 3:93e488fbb8a2 81 void TIMER_Configuration(void) {
MartinJohnson 0:404dae88af71 82 u32 TimerPeriod = 0;
MartinJohnson 0:404dae88af71 83 u16 Channel1Pulse = 0, Channel2Pulse = 0, Channel3Pulse = 0;
MartinJohnson 0:404dae88af71 84
MartinJohnson 3:93e488fbb8a2 85 gpio_set_af(GPIOA,1,1,GPIO_OUTPUT_PUSH_PULL, GPIO_NO_PULL, GPIO_SPEED_LOW);
MartinJohnson 3:93e488fbb8a2 86 gpio_set_af(GPIOA,8,6,GPIO_OUTPUT_PUSH_PULL, GPIO_NO_PULL, GPIO_SPEED_LOW);
MartinJohnson 0:404dae88af71 87
MartinJohnson 0:404dae88af71 88 /*
MartinJohnson 8:34fb94209517 89 VGA 640x480 @ 60 Hz
MartinJohnson 8:34fb94209517 90 Vertical refresh 31.46875 kHz
MartinJohnson 0:404dae88af71 91 Pixel freq. 36.0 MHz
MartinJohnson 0:404dae88af71 92
MartinJohnson 0:404dae88af71 93 1 system tick @ 72Mhz = 0,0138 us
MartinJohnson 0:404dae88af71 94 */
MartinJohnson 0:404dae88af71 95
MartinJohnson 0:404dae88af71 96 /*
MartinJohnson 0:404dae88af71 97 Horizontal timing
MartinJohnson 0:404dae88af71 98 -----------------
MartinJohnson 0:404dae88af71 99
MartinJohnson 8:34fb94209517 100 Timer 1 period = 31468.53 Hz
MartinJohnson 0:404dae88af71 101
MartinJohnson 8:34fb94209517 102 Since firing the DMA takes more or less 400ns, we'll start it 28 ticks early.
MartinJohnson 0:404dae88af71 103
MartinJohnson 0:404dae88af71 104
MartinJohnson 0:404dae88af71 105 Horizontal timing info
MartinJohnson 0:404dae88af71 106 ----------------------
MartinJohnson 0:404dae88af71 107
MartinJohnson 8:34fb94209517 108 Dots us ticks
MartinJohnson 8:34fb94209517 109 ----------------------------------------------------
MartinJohnson 8:34fb94209517 110 Visible area 640 25.422045680238 1830
MartinJohnson 8:34fb94209517 111 Front porch 16 0.6355511420059 46
MartinJohnson 8:34fb94209517 112 Sync pulse 96 3.8133068520357 275
MartinJohnson 8:34fb94209517 113 Back porch 48 1.9066534260179 137
MartinJohnson 8:34fb94209517 114 Whole line 800 31.777557100298 2288
MartinJohnson 0:404dae88af71 115
MartinJohnson 0:404dae88af71 116 */
MartinJohnson 0:404dae88af71 117
MartinJohnson 7:513afc954d6e 118 TimerPeriod = 2288;//2303;
MartinJohnson 8:34fb94209517 119 Channel1Pulse = 275;//274;//274;//277; /* HSYNC */
MartinJohnson 8:34fb94209517 120 Channel3Pulse = 382;//412;//394;
MartinJohnson 0:404dae88af71 121
MartinJohnson 3:93e488fbb8a2 122 TIM1->CR1 &= ~TIM_CR1_CEN;
MartinJohnson 8:34fb94209517 123
MartinJohnson 3:93e488fbb8a2 124 TIM1->PSC=0;
MartinJohnson 3:93e488fbb8a2 125 TIM1->ARR=TimerPeriod;
MartinJohnson 3:93e488fbb8a2 126 TIM1->CNT=0;
MartinJohnson 0:404dae88af71 127
MartinJohnson 8:34fb94209517 128 // disable Capture and Compare
MartinJohnson 8:34fb94209517 129 TIM1->CCER &= ~(TIM_CCER_CC1E);
MartinJohnson 3:93e488fbb8a2 130 // set output compare 1 to PWM mode with preload
MartinJohnson 3:93e488fbb8a2 131 TIM1->CCMR1 = (TIM1->CCMR1 & ~(TIM_CCMR1_OC1M | TIM_CCMR1_CC1S)) | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1;
MartinJohnson 3:93e488fbb8a2 132 TIM1->CCR1=Channel1Pulse;
MartinJohnson 3:93e488fbb8a2 133 // enable Capture and Compare 1
MartinJohnson 8:34fb94209517 134 TIM1->CCER |= TIM_CCER_CC1E | TIM_CCER_CC1P ; // output polarity low
MartinJohnson 3:93e488fbb8a2 135 // main output enable
MartinJohnson 3:93e488fbb8a2 136 TIM1->BDTR |= TIM_BDTR_MOE;
MartinJohnson 3:93e488fbb8a2 137
MartinJohnson 8:34fb94209517 138 //TIM1->SMCR |= TIM_SMCR_MSM; // master slave mode
MartinJohnson 3:93e488fbb8a2 139
MartinJohnson 7:513afc954d6e 140 TIM1->CR2 = (TIM1->CR2 & ~TIM_CR2_MMS) | (2<<4); ///*TIM_CR2_MMS_2 |*/ TIM_CR2_MMS_1 /*| TIM_CR2_MMS_0*/;// TIM_TRGOSource_Update mode
MartinJohnson 3:93e488fbb8a2 141
MartinJohnson 3:93e488fbb8a2 142 TIM8->CR1 &= ~TIM_CR1_CEN;
MartinJohnson 8:34fb94209517 143 TIM8->CR1 |= TIM_CR1_ARPE | TIM_CR1_URS;
MartinJohnson 5:594c9712697c 144 TIM8->PSC=0;
MartinJohnson 8:34fb94209517 145 TIM8->ARR=8;
MartinJohnson 3:93e488fbb8a2 146 TIM8->CNT=0;
MartinJohnson 3:93e488fbb8a2 147
MartinJohnson 3:93e488fbb8a2 148 TIM8->DIER |= TIM_DIER_UDE;
MartinJohnson 7:513afc954d6e 149
MartinJohnson 7:513afc954d6e 150 TIM8->SMCR=TIM8->SMCR & ~(TIM_SMCR_SMS | TIM_SMCR_TS) | 6 | (3<<4); // trigger mode from itr3 (tim3)
MartinJohnson 0:404dae88af71 151
MartinJohnson 7:513afc954d6e 152 TIM3->CR1 &= ~TIM_CR1_CEN;
MartinJohnson 7:513afc954d6e 153 TIM3->PSC=0;
MartinJohnson 8:34fb94209517 154 TIM3->ARR=Channel3Pulse;
MartinJohnson 7:513afc954d6e 155 TIM3->CNT=0;
MartinJohnson 8:34fb94209517 156 TIM3->CR1 |= TIM_CR1_ARPE | TIM_CR1_URS;
MartinJohnson 7:513afc954d6e 157 TIM3->CR1 |= TIM_CR1_OPM;
MartinJohnson 7:513afc954d6e 158 TIM3->SMCR=TIM3->SMCR & ~(TIM_SMCR_SMS | TIM_SMCR_TS) | 6 ; // trigger mode from itr0 (tim1)
MartinJohnson 7:513afc954d6e 159 TIM3->CR2 = (TIM3->CR2 & ~TIM_CR2_MMS) | (2<<4); ///*TIM_CR2_MMS_2 |*/ TIM_CR2_MMS_1 /*| TIM_CR2_MMS_0*/;// TIM_TRGOSource_Update mode
MartinJohnson 7:513afc954d6e 160
MartinJohnson 0:404dae88af71 161 /*
MartinJohnson 0:404dae88af71 162 Vertical timing
MartinJohnson 0:404dae88af71 163 ---------------
MartinJohnson 0:404dae88af71 164
MartinJohnson 0:404dae88af71 165 Polarity of vertical sync pulse is positive.
MartinJohnson 0:404dae88af71 166
MartinJohnson 0:404dae88af71 167 Lines
MartinJohnson 0:404dae88af71 168 ------------------------------
MartinJohnson 8:34fb94209517 169 Visible area 480
MartinJohnson 8:34fb94209517 170 Front porch 10
MartinJohnson 0:404dae88af71 171 Sync pulse 2
MartinJohnson 8:34fb94209517 172 Back porch 33
MartinJohnson 8:34fb94209517 173 Whole frame 525
MartinJohnson 0:404dae88af71 174
MartinJohnson 0:404dae88af71 175 */
MartinJohnson 0:404dae88af71 176
MartinJohnson 0:404dae88af71 177 /* VSYNC (TIM2_CH2) and VSYNC_BACKPORCH (TIM2_CH3) */
MartinJohnson 0:404dae88af71 178 /* Channel 2 and 3 Configuration in PWM mode */
MartinJohnson 8:34fb94209517 179 TIM2->SMCR=TIM2->SMCR & ~(TIM_SMCR_SMS | TIM_SMCR_TS) | 5;//5 ;// gated slave mode trigger source 0
MartinJohnson 3:93e488fbb8a2 180
MartinJohnson 0:404dae88af71 181
MartinJohnson 7:513afc954d6e 182 TimerPeriod = 525; /* Vertical lines */
MartinJohnson 0:404dae88af71 183 Channel2Pulse = 2; /* Sync pulse */
MartinJohnson 7:513afc954d6e 184 Channel3Pulse = 35; /* Sync pulse + Back porch */
MartinJohnson 0:404dae88af71 185
MartinJohnson 3:93e488fbb8a2 186 TIM2->CR1 &= ~TIM_CR1_CEN;
MartinJohnson 3:93e488fbb8a2 187 TIM2->PSC=0;
MartinJohnson 3:93e488fbb8a2 188 TIM2->ARR=TimerPeriod;
MartinJohnson 3:93e488fbb8a2 189 TIM2->CNT=0;
MartinJohnson 0:404dae88af71 190
MartinJohnson 3:93e488fbb8a2 191 // disable Capture and Compare 2 and 3
MartinJohnson 3:93e488fbb8a2 192 TIM2->CCER &= ~(TIM_CCER_CC2E | TIM_CCER_CC3E);
MartinJohnson 3:93e488fbb8a2 193 // set output compare 1 to PWM mode with preload
MartinJohnson 3:93e488fbb8a2 194 TIM2->CCMR1 = (TIM2->CCMR1 & ~(TIM_CCMR1_OC2M | TIM_CCMR1_CC2S)) | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1;
MartinJohnson 3:93e488fbb8a2 195 TIM2->CCR2=Channel2Pulse;
MartinJohnson 3:93e488fbb8a2 196 TIM2->CCR3=Channel3Pulse;
MartinJohnson 3:93e488fbb8a2 197
MartinJohnson 8:34fb94209517 198 //TIM2->CR1 |= TIM_CR1_ARPE | TIM_CR1_URS;
MartinJohnson 8:34fb94209517 199 //TIM2->CR2 &= ~TIM_CR2_OIS1; // output idle state set
MartinJohnson 3:93e488fbb8a2 200 // enable Capture and Compare 2 and 3
MartinJohnson 3:93e488fbb8a2 201 TIM2->CCER |= TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC1P | TIM_CCER_CC2P; // output polarity low
MartinJohnson 3:93e488fbb8a2 202
MartinJohnson 3:93e488fbb8a2 203 // main output enable
MartinJohnson 3:93e488fbb8a2 204 TIM2->BDTR |= TIM_BDTR_MOE;
MartinJohnson 0:404dae88af71 205
MartinJohnson 5:594c9712697c 206 NVIC->IP[TIM2_IRQn]=32; // Interrupt Priority, lower is higher priority
MartinJohnson 3:93e488fbb8a2 207 NVIC->ISER[TIM2_IRQn >> 0x05] = 1 << (TIM2_IRQn & 0x1F); // Interrupt enable
MartinJohnson 3:93e488fbb8a2 208
MartinJohnson 3:93e488fbb8a2 209 TIM2->DIER |= TIM_DIER_CC3IE;
MartinJohnson 3:93e488fbb8a2 210
MartinJohnson 5:594c9712697c 211 NVIC->IP[TIM1_CC_IRQn]=0; // Interrupt Priority, lower is higher priority
MartinJohnson 3:93e488fbb8a2 212 NVIC->ISER[TIM1_CC_IRQn >> 0x05] = 1 << (TIM1_CC_IRQn & 0x1F); // Interrupt enable
MartinJohnson 0:404dae88af71 213
MartinJohnson 7:513afc954d6e 214 //TIM1->DIER |= TIM_DIER_CC2IE;
MartinJohnson 3:93e488fbb8a2 215
MartinJohnson 3:93e488fbb8a2 216 TIM2->CR1 |= TIM_CR1_CEN;
MartinJohnson 3:93e488fbb8a2 217 TIM1->CR1 |= TIM_CR1_CEN;
MartinJohnson 0:404dae88af71 218 }
MartinJohnson 0:404dae88af71 219
MartinJohnson 3:93e488fbb8a2 220 void DMA_Configuration(void) {
MartinJohnson 3:93e488fbb8a2 221 //gpio_set_af(GPIOA,7,5,GPIO_OUTPUT_PUSH_PULL, GPIO_NO_PULL, GPIO_SPEED_HIGH);
MartinJohnson 3:93e488fbb8a2 222
MartinJohnson 7:513afc954d6e 223 GPIOD->PUPDR = (GPIOD->PUPDR & ~0xffff);//0xaaaa; // pull down (1010)
MartinJohnson 7:513afc954d6e 224 GPIOD->OSPEEDR = (GPIOD->OSPEEDR & ~0xffff) | 0xffff;
MartinJohnson 3:93e488fbb8a2 225
MartinJohnson 0:404dae88af71 226
MartinJohnson 3:93e488fbb8a2 227 RCC->AHBENR |= RCC_AHBENR_DMA2EN;
MartinJohnson 3:93e488fbb8a2 228 // direction = peripheral dest, memory inc, peripheral size=halfword, memory size=byte, priority level=high, transmission complete interrupt enabled
MartinJohnson 3:93e488fbb8a2 229 DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE;
MartinJohnson 3:93e488fbb8a2 230 // DMA1_Channel3->CCR = DMA_CCR_PINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_MEM2MEM;
MartinJohnson 3:93e488fbb8a2 231 // bytes to transfer
MartinJohnson 7:513afc954d6e 232 DMA2_Channel1->CNDTR = HTOTAL;
MartinJohnson 3:93e488fbb8a2 233 // peripheral address
MartinJohnson 3:93e488fbb8a2 234 DMA2_Channel1->CPAR =(uint32_t) &GPIOD->ODR;
MartinJohnson 3:93e488fbb8a2 235 // memory address
MartinJohnson 3:93e488fbb8a2 236 DMA2_Channel1->CMAR =(u32) fba+fboffset;
MartinJohnson 3:93e488fbb8a2 237 // enable CC DMA for TIM16
MartinJohnson 3:93e488fbb8a2 238 // TIM16->DIER |= TIM_DIER_CC1DE;
MartinJohnson 3:93e488fbb8a2 239 // configure NVIC
MartinJohnson 3:93e488fbb8a2 240 NVIC->IP[DMA2_Channel1_IRQn]=16; // Interrupt Priority, lower is higher priority
MartinJohnson 3:93e488fbb8a2 241 NVIC->ISER[DMA2_Channel1_IRQn >> 0x05] = 1 << (DMA2_Channel1_IRQn & 0x1F); // Interrupt enable
MartinJohnson 0:404dae88af71 242
MartinJohnson 0:404dae88af71 243 }
MartinJohnson 0:404dae88af71 244
MartinJohnson 0:404dae88af71 245 //*****************************************************************************
MartinJohnson 0:404dae88af71 246 // This irq is generated at the end of the horizontal back porch.
MartinJohnson 0:404dae88af71 247 // Test if inside a valid vertical start frame (vflag variable),
MartinJohnson 3:93e488fbb8a2 248 // and start the DMA to output a single frame buffer line through the GPIO device.
MartinJohnson 0:404dae88af71 249 //*****************************************************************************
MartinJohnson 0:404dae88af71 250 //__attribute__((interrupt))
MartinJohnson 7:513afc954d6e 251 /*
MartinJohnson 3:93e488fbb8a2 252 __attribute__ ((section ("ccmram"))) void TIM1_CC_IRQHandler(void) {
MartinJohnson 7:513afc954d6e 253 //GPIOD->MODER=0x5555;
MartinJohnson 7:513afc954d6e 254 GPIOD->MODER = (GPIOD->MODER&0xffff0000) | 0x5555; // output mode for PD0-7
MartinJohnson 7:513afc954d6e 255
MartinJohnson 3:93e488fbb8a2 256 if (vflag) {
MartinJohnson 5:594c9712697c 257 DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_EN;// 0x3093;
MartinJohnson 3:93e488fbb8a2 258 // TIM8->CNT=0;//TIM8->ARR;
MartinJohnson 5:594c9712697c 259
MartinJohnson 3:93e488fbb8a2 260 TIM8->CR1 |= TIM_CR1_CEN;
MartinJohnson 5:594c9712697c 261 //TIM8->CNT=7;//4-(TIM1->CNT&7);
MartinJohnson 0:404dae88af71 262 }
MartinJohnson 0:404dae88af71 263 TIM1->SR = 0xFFFB; //~TIM_IT_CC2;
MartinJohnson 7:513afc954d6e 264
MartinJohnson 7:513afc954d6e 265 TIM1->SR = 0xFFFB;
MartinJohnson 0:404dae88af71 266 }
MartinJohnson 7:513afc954d6e 267 */
MartinJohnson 0:404dae88af71 268
MartinJohnson 0:404dae88af71 269 //*****************************************************************************
MartinJohnson 0:404dae88af71 270 // This irq is generated at the end of the vertical back porch.
MartinJohnson 0:404dae88af71 271 // Sets the 'vflag' variable to 1 (valid vertical frame).
MartinJohnson 0:404dae88af71 272 //*****************************************************************************
MartinJohnson 0:404dae88af71 273 //__attribute__((interrupt))
MartinJohnson 8:34fb94209517 274
MartinJohnson 8:34fb94209517 275 int nlines=0;
MartinJohnson 3:93e488fbb8a2 276 __attribute__ ((section ("ccmram"))) void TIM2_IRQHandler(void) {
MartinJohnson 0:404dae88af71 277 vflag = 1;
MartinJohnson 0:404dae88af71 278 TIM2->SR = 0xFFF7; //~TIM_IT_CC3;
MartinJohnson 7:513afc954d6e 279 TIM8->CR1 &= ~TIM_CR1_CEN;
MartinJohnson 8:34fb94209517 280 DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE ;
MartinJohnson 8:34fb94209517 281 DMA2_Channel1->CNDTR = HTOTAL;
MartinJohnson 8:34fb94209517 282 // 0x3093;
MartinJohnson 7:513afc954d6e 283 //GPIOD->MODER=0;
MartinJohnson 7:513afc954d6e 284 //GPIOD->MODER = (GPIOD->MODER&0xffff0000); // input mode for PD0-7
MartinJohnson 7:513afc954d6e 285 // GPIOD->ODR=0x00;
MartinJohnson 7:513afc954d6e 286 //GPIOD->MODER=0xaaaa;
MartinJohnson 7:513afc954d6e 287 TIM8->CNT=0;
MartinJohnson 8:34fb94209517 288 DMA2_Channel1->CPAR=&nlines;//(uint32_t) &GPIOD->ODR+1;
MartinJohnson 7:513afc954d6e 289 GPIOD->ODR=0x00;
MartinJohnson 7:513afc954d6e 290
MartinJohnson 8:34fb94209517 291 //printf("l:%d\n",nlines);
MartinJohnson 8:34fb94209517 292 nlines=0;
MartinJohnson 8:34fb94209517 293 DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_EN | DMA_CCR_CIRC;
MartinJohnson 0:404dae88af71 294 }
MartinJohnson 0:404dae88af71 295
MartinJohnson 0:404dae88af71 296 //*****************************************************************************
MartinJohnson 0:404dae88af71 297 // This interrupt is generated at the end of every line.
MartinJohnson 0:404dae88af71 298 // It will increment the line number and set the corresponding line pointer
MartinJohnson 0:404dae88af71 299 // in the DMA register.
MartinJohnson 0:404dae88af71 300 //*****************************************************************************
MartinJohnson 0:404dae88af71 301 //__attribute__((interrupt))
MartinJohnson 8:34fb94209517 302
MartinJohnson 3:93e488fbb8a2 303 __attribute__ ((section ("ccmram"))) void DMA2_Channel1_IRQHandler(void) {
MartinJohnson 3:93e488fbb8a2 304 DMA2->IFCR = DMA_ISR_TCIF1;
MartinJohnson 5:594c9712697c 305 TIM8->CR1 &= ~TIM_CR1_CEN;
MartinJohnson 5:594c9712697c 306 TIM8->CNT=0;
MartinJohnson 7:513afc954d6e 307 //while(DMA2_Channel1->CNDTR);
MartinJohnson 8:34fb94209517 308 DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE;// | DMA_CCR_CIRC;// | DMA_CCR_EN;// 0x3093; 0x92;// | (1<<10) | (1<<8);
MartinJohnson 3:93e488fbb8a2 309 DMA2_Channel1->CNDTR = HTOTAL;
MartinJohnson 8:34fb94209517 310 DMA2_Channel1->CPAR=(uint32_t) &GPIOD->ODR;;
MartinJohnson 8:34fb94209517 311 nlines++;
MartinJohnson 0:404dae88af71 312 vdraw++;
MartinJohnson 8:34fb94209517 313 if (vdraw == 3) {
MartinJohnson 0:404dae88af71 314 vdraw = 0;
MartinJohnson 0:404dae88af71 315 vline++;
MartinJohnson 3:93e488fbb8a2 316 if (vline == VID_VSIZE) {
MartinJohnson 0:404dae88af71 317 vdraw = vline = vflag = 0;
MartinJohnson 3:93e488fbb8a2 318 DMA2_Channel1->CMAR = (u32) fba+fboffset;
MartinJohnson 8:34fb94209517 319 DMA2_Channel1->CPAR=&nlines;
MartinJohnson 8:34fb94209517 320 GPIOD->ODR=0x00;
MartinJohnson 0:404dae88af71 321 } else {
MartinJohnson 3:93e488fbb8a2 322 DMA2_Channel1->CMAR += HTOTAL;
MartinJohnson 0:404dae88af71 323 }
MartinJohnson 0:404dae88af71 324 }
MartinJohnson 7:513afc954d6e 325 //GPIOD->ODR=0x00;
MartinJohnson 7:513afc954d6e 326 if(vflag)
MartinJohnson 8:34fb94209517 327 DMA2_Channel1->CCR = DMA_CCR_DIR | DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_PL_0 | DMA_CCR_TCIE | DMA_CCR_EN | DMA_CCR_CIRC;
MartinJohnson 7:513afc954d6e 328
MartinJohnson 5:594c9712697c 329
MartinJohnson 3:93e488fbb8a2 330 }
MartinJohnson 7:513afc954d6e 331 __attribute__ ((section ("ccmram"))) void vidNextBuffer1(void) {
MartinJohnson 3:93e488fbb8a2 332 char *fp=(unsigned *)fb[0];
MartinJohnson 3:93e488fbb8a2 333 for(int i=0;i<VID_VSIZE*HTOTAL;i++)
MartinJohnson 3:93e488fbb8a2 334 *fp++=(*fp>>4);//&0xf0f0f0f;
MartinJohnson 0:404dae88af71 335 }
MartinJohnson 0:404dae88af71 336
MartinJohnson 7:513afc954d6e 337 __attribute__ ((section ("ccmram"))) void vidNextBuffer(void) {
MartinJohnson 7:513afc954d6e 338 unsigned *fp=(unsigned *)fb[0];
MartinJohnson 7:513afc954d6e 339 for(int i=0;i<VID_VSIZE*HTOTAL/4;i++)
MartinJohnson 7:513afc954d6e 340 *fp++=(*fp>>4)&0xf0f0f0f;
MartinJohnson 7:513afc954d6e 341 }
MartinJohnson 7:513afc954d6e 342
MartinJohnson 3:93e488fbb8a2 343 __attribute__ ((section ("ccmram"))) void waitForRefresh(void) {
MartinJohnson 3:93e488fbb8a2 344 while(vflag) __wfi();
MartinJohnson 3:93e488fbb8a2 345 }
MartinJohnson 3:93e488fbb8a2 346 void vidClearScreen(void) {
MartinJohnson 0:404dae88af71 347 u16 x, y;
MartinJohnson 0:404dae88af71 348
MartinJohnson 3:93e488fbb8a2 349 for (y = 0; y < VID_VSIZE; y++) {
MartinJohnson 3:93e488fbb8a2 350 for (x = 0; x < HTOTAL; x++) {
MartinJohnson 0:404dae88af71 351 fba[y*HTOTAL+x] = 0;
MartinJohnson 0:404dae88af71 352 }
MartinJohnson 0:404dae88af71 353 }
MartinJohnson 0:404dae88af71 354 }
MartinJohnson 0:404dae88af71 355
MartinJohnson 3:93e488fbb8a2 356 void vidDot(int x, int y, int col) {
MartinJohnson 3:93e488fbb8a2 357 fb[y][x]=col;
MartinJohnson 3:93e488fbb8a2 358 }
MartinJohnson 3:93e488fbb8a2 359
MartinJohnson 3:93e488fbb8a2 360 void vidLine(int x, int y, int col) {
MartinJohnson 3:93e488fbb8a2 361 fb[y][x]=col;
MartinJohnson 3:93e488fbb8a2 362 }
MartinJohnson 3:93e488fbb8a2 363
MartinJohnson 3:93e488fbb8a2 364 void vidInit(void) {
MartinJohnson 0:404dae88af71 365 int i;
MartinJohnson 3:93e488fbb8a2 366 DMA_Configuration();
MartinJohnson 0:404dae88af71 367 TIMER_Configuration();
MartinJohnson 3:93e488fbb8a2 368 for(i=0;i<VID_VSIZE;i++)
MartinJohnson 0:404dae88af71 369 fb[i]=fba+i*HTOTAL;
MartinJohnson 0:404dae88af71 370 vidClearScreen();
MartinJohnson 0:404dae88af71 371 }
MartinJohnson 0:404dae88af71 372