Natthakorn Meechai / VS1053

2

vs10xx.cpp@7:fc66dbd1ce99, 2018-12-16 (annotated)

Committer:
Marknaja
Date:
Sun Dec 16 01:58:19 2018 +0000
Revision:
7:fc66dbd1ce99
Parent:
0:58524d569dfd 
555;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cha45689 0:58524d569dfd 1 /** \file vs10xx.c
cha45689 0:58524d569dfd 2 * Functions for interfacing with the mp3 player chip.
cha45689 0:58524d569dfd 3 * \todo safe rewind
cha45689 0:58524d569dfd 4 * \todo VS1003 WMA "wma-bytes-left" variable adjustment at ff/rew
cha45689 0:58524d569dfd 5 */
cha45689 0:58524d569dfd 6 #include "vs10xx.h"
cha45689 0:58524d569dfd 7
cha45689 0:58524d569dfd 8 /** Constructor of class VS1053. */
cha45689 0:58524d569dfd 9 vs10xx::vs10xx(PinName MOSI, PinName MISO, PinName SCLK, PinName XCS,
cha45689 0:58524d569dfd 10 PinName XDCS,PinName DREQ, PinName XRESET)
cha45689 0:58524d569dfd 11 :
cha45689 0:58524d569dfd 12 _spi(MOSI,MISO,SCLK),
cha45689 0:58524d569dfd 13 _XCS(XCS),
cha45689 0:58524d569dfd 14 _XDCS(XDCS),
cha45689 0:58524d569dfd 15 _DREQ(DREQ),
cha45689 0:58524d569dfd 16 _XRESET(XRESET)
cha45689 0:58524d569dfd 17 {
cha45689 0:58524d569dfd 18 _XCS = 1;
cha45689 0:58524d569dfd 19 _XDCS = 1;
cha45689 0:58524d569dfd 20 _XRESET = 1;
cha45689 0:58524d569dfd 21 }
cha45689 0:58524d569dfd 22
cha45689 0:58524d569dfd 23 /** Write the 16-bit value to VS10xx register*/
cha45689 0:58524d569dfd 24 void vs10xx::writeRegister(unsigned char addressbyte,unsigned int value)
cha45689 0:58524d569dfd 25 {
cha45689 0:58524d569dfd 26 _XCS = 1;
cha45689 0:58524d569dfd 27 while (!_DREQ);
cha45689 0:58524d569dfd 28 _XCS = 0;
cha45689 0:58524d569dfd 29 _spi.write(VS_WRITE_COMMAND);
cha45689 0:58524d569dfd 30 _spi.write(addressbyte);
cha45689 0:58524d569dfd 31 _spi.write(value >> 8);
cha45689 0:58524d569dfd 32 _spi.write(value & 0xFF);
cha45689 0:58524d569dfd 33 _XCS = 1;
cha45689 0:58524d569dfd 34 }
cha45689 0:58524d569dfd 35
cha45689 0:58524d569dfd 36 /** Read the 16-bit value of a VS10xx register */
cha45689 0:58524d569dfd 37 unsigned int vs10xx::readRegister (unsigned char addressbyte)
cha45689 0:58524d569dfd 38 {
cha45689 0:58524d569dfd 39 unsigned int resultvalue = 0;
cha45689 0:58524d569dfd 40
cha45689 0:58524d569dfd 41 _XCS = 1;
cha45689 0:58524d569dfd 42 while (!_DREQ);
cha45689 0:58524d569dfd 43 _XCS = 0;
cha45689 0:58524d569dfd 44 _spi.write(VS_READ_COMMAND);
cha45689 0:58524d569dfd 45 _spi.write((addressbyte));
cha45689 0:58524d569dfd 46 resultvalue = _spi.write(0XFF) << 8;
cha45689 0:58524d569dfd 47 resultvalue |= _spi.write(0XFF);
cha45689 0:58524d569dfd 48 _XCS = 1;
cha45689 0:58524d569dfd 49 return resultvalue;
cha45689 0:58524d569dfd 50 }
cha45689 0:58524d569dfd 51
cha45689 0:58524d569dfd 52 /** write data to VS10xx */
cha45689 0:58524d569dfd 53 void vs10xx::writeData(unsigned char *databuf,unsigned char n)
cha45689 0:58524d569dfd 54 {
cha45689 0:58524d569dfd 55 _XDCS = 1;
cha45689 0:58524d569dfd 56 _XDCS = 0;
cha45689 0:58524d569dfd 57 while (!_DREQ);
cha45689 0:58524d569dfd 58 while (n--)
cha45689 0:58524d569dfd 59 {
cha45689 0:58524d569dfd 60 _spi.write(*databuf++);
cha45689 0:58524d569dfd 61 }
cha45689 0:58524d569dfd 62 _XDCS = 1;
cha45689 0:58524d569dfd 63 }
cha45689 0:58524d569dfd 64
cha45689 0:58524d569dfd 65 void vs10xx::setFreq(int freq)
cha45689 0:58524d569dfd 66 {
cha45689 0:58524d569dfd 67 _spi.frequency(freq); //set freq for speed
cha45689 0:58524d569dfd 68 }
cha45689 0:58524d569dfd 69
cha45689 0:58524d569dfd 70 void vs10xx::setVolume(unsigned char vol)
cha45689 0:58524d569dfd 71 {
cha45689 0:58524d569dfd 72 writeRegister(SPI_VOL, vol*0x101); //Set volume level
cha45689 0:58524d569dfd 73 }
cha45689 0:58524d569dfd 74
cha45689 0:58524d569dfd 75 /** Soft Reset of VS10xx (Between songs) */
cha45689 0:58524d569dfd 76 void vs10xx::softReset()
cha45689 0:58524d569dfd 77 {
cha45689 0:58524d569dfd 78 _spi.frequency(1000000); //low speed
cha45689 0:58524d569dfd 79
cha45689 0:58524d569dfd 80 /* Soft Reset of VS10xx */
cha45689 0:58524d569dfd 81 writeRegister(SPI_MODE, 0x0804); /* Newmode, Reset, No L1-2 */
cha45689 0:58524d569dfd 82
cha45689 0:58524d569dfd 83 wait_ms(2); //delay
cha45689 0:58524d569dfd 84 while(!_DREQ);
cha45689 0:58524d569dfd 85
cha45689 0:58524d569dfd 86 /* A quick sanity check: write to two registers, then test if we
cha45689 0:58524d569dfd 87 get the same results. Note that if you use a too high SPI
cha45689 0:58524d569dfd 88 speed, the MSB is the most likely to fail when read again. */
cha45689 0:58524d569dfd 89 writeRegister(SPI_HDAT0, 0xABAD);
cha45689 0:58524d569dfd 90 writeRegister(SPI_HDAT1, 0x1DEA);
cha45689 0:58524d569dfd 91 if (readRegister(SPI_HDAT0) != 0xABAD || readRegister(SPI_HDAT1) != 0x1DEA) {
cha45689 0:58524d569dfd 92 printf("There is something wrong with VS10xx\n");
cha45689 0:58524d569dfd 93 }
cha45689 0:58524d569dfd 94
cha45689 0:58524d569dfd 95 writeRegister(SPI_CLOCKF,0XC000); //Set the clock
cha45689 0:58524d569dfd 96 writeRegister(SPI_AUDATA,0xbb81); //samplerate 48k,stereo
cha45689 0:58524d569dfd 97 writeRegister(SPI_BASS, 0x0055); //set accent
cha45689 0:58524d569dfd 98 writeRegister(SPI_VOL, 0x4040); //Set volume level
cha45689 0:58524d569dfd 99
cha45689 0:58524d569dfd 100 while (!_DREQ);
cha45689 0:58524d569dfd 101
cha45689 0:58524d569dfd 102 }
cha45689 0:58524d569dfd 103
cha45689 0:58524d569dfd 104 /** Reset VS10xx */
cha45689 0:58524d569dfd 105 void vs10xx::reset(){
cha45689 0:58524d569dfd 106
cha45689 0:58524d569dfd 107 _XRESET = 0;
cha45689 0:58524d569dfd 108 wait_ms(2); //it is a must
cha45689 0:58524d569dfd 109
cha45689 0:58524d569dfd 110 /* Send dummy SPI byte to initialize SPI */
cha45689 0:58524d569dfd 111 _spi.write(0xFF);
cha45689 0:58524d569dfd 112
cha45689 0:58524d569dfd 113 /* Un-reset VS10XX chip */
cha45689 0:58524d569dfd 114 _XCS = 1;
cha45689 0:58524d569dfd 115 _XDCS = 1;
cha45689 0:58524d569dfd 116 _XRESET = 1;
cha45689 0:58524d569dfd 117
cha45689 0:58524d569dfd 118 softReset(); //vs10xx soft reset.
cha45689 0:58524d569dfd 119
cha45689 0:58524d569dfd 120 // printf("\r\nVS10xx Init\r\n");
cha45689 0:58524d569dfd 121 }
cha45689 0:58524d569dfd 122
cha45689 0:58524d569dfd 123 /* Loads a plugin. */
cha45689 0:58524d569dfd 124 void vs10xx::loadPlugin(const unsigned short *plugin,int length) {
cha45689 0:58524d569dfd 125 int i = 0;
cha45689 0:58524d569dfd 126 while (i<length) {
cha45689 0:58524d569dfd 127 unsigned short addr, n, val;
cha45689 0:58524d569dfd 128 addr = plugin[i++];
cha45689 0:58524d569dfd 129 n = plugin[i++];
cha45689 0:58524d569dfd 130 if (n & 0x8000U) { /* RLE run, replicate n samples */
cha45689 0:58524d569dfd 131 n &= 0x7FFF;
cha45689 0:58524d569dfd 132 val = plugin[i++];
cha45689 0:58524d569dfd 133 while (n--) {
cha45689 0:58524d569dfd 134 writeRegister(addr, val);
cha45689 0:58524d569dfd 135 }
cha45689 0:58524d569dfd 136 } else { /* Copy run, copy n samples */
cha45689 0:58524d569dfd 137 while (n--) {
cha45689 0:58524d569dfd 138 val = plugin[i++];
cha45689 0:58524d569dfd 139 writeRegister(addr, val);
cha45689 0:58524d569dfd 140 }
cha45689 0:58524d569dfd 141 }
cha45689 0:58524d569dfd 142 }
cha45689 0:58524d569dfd 143 }
cha45689 0:58524d569dfd 144
cha45689 0:58524d569dfd 145
cha45689 0:58524d569dfd 146
cha45689 0:58524d569dfd 147
cha45689 0:58524d569dfd 148