Marco Hsu / WIFI_API

WIFI_API_20150524e

WIFI_Driver/nmc/nmi_wlan.h@0:a2de37bf5f3d, 2015-06-09 (annotated)

Committer:
Marcomissyou
Date:
Tue Jun 09 06:04:13 2015 +0000
Revision:
0:a2de37bf5f3d
update to WIFI_API_20150524e

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Marcomissyou 0:a2de37bf5f3d 1 #ifndef NMI_WLAN_H
Marcomissyou 0:a2de37bf5f3d 2 #define NMI_WLAN_H
Marcomissyou 0:a2de37bf5f3d 3
Marcomissyou 0:a2de37bf5f3d 4 #include "nmi_type.h"
Marcomissyou 0:a2de37bf5f3d 5
Marcomissyou 0:a2de37bf5f3d 6 /********************************************
Marcomissyou 0:a2de37bf5f3d 7
Marcomissyou 0:a2de37bf5f3d 8 Endian Conversion
Marcomissyou 0:a2de37bf5f3d 9
Marcomissyou 0:a2de37bf5f3d 10 ********************************************/
Marcomissyou 0:a2de37bf5f3d 11
Marcomissyou 0:a2de37bf5f3d 12 #define BYTE_SWAP(val) ((((val) & 0x000000FF) << 24) + \
Marcomissyou 0:a2de37bf5f3d 13 (((val) & 0x0000FF00) << 8) + \
Marcomissyou 0:a2de37bf5f3d 14 (((val) & 0x00FF0000) >> 8) + \
Marcomissyou 0:a2de37bf5f3d 15 (((val) & 0xFF000000) >> 24))
Marcomissyou 0:a2de37bf5f3d 16
Marcomissyou 0:a2de37bf5f3d 17
Marcomissyou 0:a2de37bf5f3d 18 /********************************************
Marcomissyou 0:a2de37bf5f3d 19
Marcomissyou 0:a2de37bf5f3d 20 Macro Defines
Marcomissyou 0:a2de37bf5f3d 21
Marcomissyou 0:a2de37bf5f3d 22 ********************************************/
Marcomissyou 0:a2de37bf5f3d 23 #define SINGLE_TX_QUEUE
Marcomissyou 0:a2de37bf5f3d 24 #define HOST_PS
Marcomissyou 0:a2de37bf5f3d 25 #define STATIC_TX_BUFFER
Marcomissyou 0:a2de37bf5f3d 26
Marcomissyou 0:a2de37bf5f3d 27 /********************************************
Marcomissyou 0:a2de37bf5f3d 28
Marcomissyou 0:a2de37bf5f3d 29 Register Defines
Marcomissyou 0:a2de37bf5f3d 30
Marcomissyou 0:a2de37bf5f3d 31 ********************************************/
Marcomissyou 0:a2de37bf5f3d 32 #define NMI_PERIPH_REG_BASE 0x1000
Marcomissyou 0:a2de37bf5f3d 33 #define NMI_CHIPID (NMI_PERIPH_REG_BASE)
Marcomissyou 0:a2de37bf5f3d 34 #define NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400)
Marcomissyou 0:a2de37bf5f3d 35 #define NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408)
Marcomissyou 0:a2de37bf5f3d 36 #define NMI_MISC (NMI_PERIPH_REG_BASE+0x428)
Marcomissyou 0:a2de37bf5f3d 37 #define NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE+0xa00)
Marcomissyou 0:a2de37bf5f3d 38 #define NMI_INTR_ENABLE (NMI_INTR_REG_BASE)
Marcomissyou 0:a2de37bf5f3d 39 #define NMI_INTR_POLARITY (NMI_INTR_REG_BASE+0x10)
Marcomissyou 0:a2de37bf5f3d 40 #define NMI_INTR_TYPE (NMI_INTR_REG_BASE+0x20)
Marcomissyou 0:a2de37bf5f3d 41 #define NMI_INTR_CLEAR (NMI_INTR_REG_BASE+0x30)
Marcomissyou 0:a2de37bf5f3d 42 #define NMI_INTR_STATUS (NMI_INTR_REG_BASE+0x40)
Marcomissyou 0:a2de37bf5f3d 43
Marcomissyou 0:a2de37bf5f3d 44 #define NMI_VMM_TBL_SIZE 64
Marcomissyou 0:a2de37bf5f3d 45 #define NMI_VMM_TX_TBL_BASE (0x150400)
Marcomissyou 0:a2de37bf5f3d 46 #define NMI_VMM_RX_TBL_BASE (0x150500)
Marcomissyou 0:a2de37bf5f3d 47
Marcomissyou 0:a2de37bf5f3d 48 #define NMI_VMM_BASE 0x150000
Marcomissyou 0:a2de37bf5f3d 49 #define NMI_VMM_CORE_CTL (NMI_VMM_BASE)
Marcomissyou 0:a2de37bf5f3d 50 #define NMI_VMM_TBL_CTL (NMI_VMM_BASE+0x4)
Marcomissyou 0:a2de37bf5f3d 51 #define NMI_VMM_TBL_ENTRY (NMI_VMM_BASE+0x8)
Marcomissyou 0:a2de37bf5f3d 52 #define NMI_VMM_TBL0_SIZE (NMI_VMM_BASE+0xc)
Marcomissyou 0:a2de37bf5f3d 53 #define NMI_VMM_TO_HOST_SIZE (NMI_VMM_BASE+0x10)
Marcomissyou 0:a2de37bf5f3d 54 #define NMI_VMM_CORE_CFG (NMI_VMM_BASE+0x14)
Marcomissyou 0:a2de37bf5f3d 55 #define NMI_VMM_TBL_ACTIVE (NMI_VMM_BASE+040)
Marcomissyou 0:a2de37bf5f3d 56 #define NMI_VMM_TBL_STATUS (NMI_VMM_BASE+0x44)
Marcomissyou 0:a2de37bf5f3d 57
Marcomissyou 0:a2de37bf5f3d 58 #define NMI_SPI_REG_BASE 0xe800
Marcomissyou 0:a2de37bf5f3d 59 #define NMI_SPI_CTL (NMI_SPI_REG_BASE)
Marcomissyou 0:a2de37bf5f3d 60 #define NMI_SPI_MASTER_DMA_ADDR (NMI_SPI_REG_BASE+0x4)
Marcomissyou 0:a2de37bf5f3d 61 #define NMI_SPI_MASTER_DMA_COUNT (NMI_SPI_REG_BASE+0x8)
Marcomissyou 0:a2de37bf5f3d 62 #define NMI_SPI_SLAVE_DMA_ADDR (NMI_SPI_REG_BASE+0xc)
Marcomissyou 0:a2de37bf5f3d 63 #define NMI_SPI_SLAVE_DMA_COUNT (NMI_SPI_REG_BASE+0x10)
Marcomissyou 0:a2de37bf5f3d 64 #define NMI_SPI_TX_MODE (NMI_SPI_REG_BASE+0x20)
Marcomissyou 0:a2de37bf5f3d 65 #define NMI_SPI_PROTOCOL_CONFIG (NMI_SPI_REG_BASE+0x24)
Marcomissyou 0:a2de37bf5f3d 66 #define NMI_SPI_INTR_CTL (NMI_SPI_REG_BASE+0x2c)
Marcomissyou 0:a2de37bf5f3d 67
Marcomissyou 0:a2de37bf5f3d 68 #define NMI_SPI_PROTOCOL_OFFSET (NMI_SPI_PROTOCOL_CONFIG-NMI_SPI_REG_BASE)
Marcomissyou 0:a2de37bf5f3d 69
Marcomissyou 0:a2de37bf5f3d 70 #define NMI_AHB_DATA_MEM_BASE 0x30000
Marcomissyou 0:a2de37bf5f3d 71 #define NMI_AHB_SHARE_MEM_BASE 0xd0000
Marcomissyou 0:a2de37bf5f3d 72 #define NMI_AHB_DMA_ADDR (NMI_AHB_DATA_MEM_BASE + 0xe000)
Marcomissyou 0:a2de37bf5f3d 73
Marcomissyou 0:a2de37bf5f3d 74 #define NMI_CLR_RX_INTR_REG (NMI_PERIPH_REG_BASE+0xc8)
Marcomissyou 0:a2de37bf5f3d 75 #define NMI_TX_SET_INTR_REG (NMI_PERIPH_REG_BASE+0x78) /*0xa8*/
Marcomissyou 0:a2de37bf5f3d 76
Marcomissyou 0:a2de37bf5f3d 77 #define NMI_SDIO_INTR_TYPE_REG (NMI_PERIPH_REG_BASE+0x8c)
Marcomissyou 0:a2de37bf5f3d 78
Marcomissyou 0:a2de37bf5f3d 79 /********************************************
Marcomissyou 0:a2de37bf5f3d 80
Marcomissyou 0:a2de37bf5f3d 81 FW State Defines
Marcomissyou 0:a2de37bf5f3d 82
Marcomissyou 0:a2de37bf5f3d 83 ********************************************/
Marcomissyou 0:a2de37bf5f3d 84
Marcomissyou 0:a2de37bf5f3d 85 #define FW_TX_OK 0x1
Marcomissyou 0:a2de37bf5f3d 86 #define FW_SYNC 0x2
Marcomissyou 0:a2de37bf5f3d 87 #define FW_SLEEP 0x4
Marcomissyou 0:a2de37bf5f3d 88 /********************************************
Marcomissyou 0:a2de37bf5f3d 89
Marcomissyou 0:a2de37bf5f3d 90 Size
Marcomissyou 0:a2de37bf5f3d 91
Marcomissyou 0:a2de37bf5f3d 92 ********************************************/
Marcomissyou 0:a2de37bf5f3d 93
Marcomissyou 0:a2de37bf5f3d 94 #define CFG_MSG_HDR_LEN 4
Marcomissyou 0:a2de37bf5f3d 95 #define N_MAX_TX_SIZE (2*1024)//(8*1024)
Marcomissyou 0:a2de37bf5f3d 96 #define N_HDR_SIZE 4
Marcomissyou 0:a2de37bf5f3d 97 #define N_ALIGN_SIZE 4
Marcomissyou 0:a2de37bf5f3d 98 #define N_GRP_HDR_SIZE 4
Marcomissyou 0:a2de37bf5f3d 99
Marcomissyou 0:a2de37bf5f3d 100 /********************************************
Marcomissyou 0:a2de37bf5f3d 101
Marcomissyou 0:a2de37bf5f3d 102 List Helper
Marcomissyou 0:a2de37bf5f3d 103
Marcomissyou 0:a2de37bf5f3d 104 ********************************************/
Marcomissyou 0:a2de37bf5f3d 105
Marcomissyou 0:a2de37bf5f3d 106 struct wl_list {
Marcomissyou 0:a2de37bf5f3d 107 struct wl_list *prev;
Marcomissyou 0:a2de37bf5f3d 108 struct wl_list *next;
Marcomissyou 0:a2de37bf5f3d 109 };
Marcomissyou 0:a2de37bf5f3d 110
Marcomissyou 0:a2de37bf5f3d 111 #define wl_get_list_entry(ptr, type, member) \
Marcomissyou 0:a2de37bf5f3d 112 ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
Marcomissyou 0:a2de37bf5f3d 113
Marcomissyou 0:a2de37bf5f3d 114 #define wl_list_for_each(pos, head) \
Marcomissyou 0:a2de37bf5f3d 115 for (pos = (head)->next; pos != (head); pos = pos->next)
Marcomissyou 0:a2de37bf5f3d 116
Marcomissyou 0:a2de37bf5f3d 117 #define wl_list_for_each_prev(pos, head) \
Marcomissyou 0:a2de37bf5f3d 118 for (pos = (head)->prev; pos != (head); pos = pos->prev)
Marcomissyou 0:a2de37bf5f3d 119
Marcomissyou 0:a2de37bf5f3d 120 #define wl_list_for_each_safe(pos, n, head) \
Marcomissyou 0:a2de37bf5f3d 121 for (pos = (head)->next, n = pos->next; pos != (head); pos = n, n = pos->next)
Marcomissyou 0:a2de37bf5f3d 122
Marcomissyou 0:a2de37bf5f3d 123 #if defined(_LINUX_)
Marcomissyou 0:a2de37bf5f3d 124 static inline void wl_init_list_head(struct wl_list *list)
Marcomissyou 0:a2de37bf5f3d 125 {
Marcomissyou 0:a2de37bf5f3d 126 list->next = list;
Marcomissyou 0:a2de37bf5f3d 127 list->prev = list;
Marcomissyou 0:a2de37bf5f3d 128 }
Marcomissyou 0:a2de37bf5f3d 129
Marcomissyou 0:a2de37bf5f3d 130 static inline void wl_list_add(struct wl_list *ne, struct wl_list *prev, struct wl_list *next)
Marcomissyou 0:a2de37bf5f3d 131 {
Marcomissyou 0:a2de37bf5f3d 132 next->prev = ne;
Marcomissyou 0:a2de37bf5f3d 133 ne->next = next;
Marcomissyou 0:a2de37bf5f3d 134 ne->prev = prev;
Marcomissyou 0:a2de37bf5f3d 135 prev->next = ne;
Marcomissyou 0:a2de37bf5f3d 136 }
Marcomissyou 0:a2de37bf5f3d 137
Marcomissyou 0:a2de37bf5f3d 138 static inline void wl_list_add_head(struct wl_list *ne, struct wl_list *head)
Marcomissyou 0:a2de37bf5f3d 139 {
Marcomissyou 0:a2de37bf5f3d 140 wl_list_add(ne, head, head->next);
Marcomissyou 0:a2de37bf5f3d 141 }
Marcomissyou 0:a2de37bf5f3d 142
Marcomissyou 0:a2de37bf5f3d 143 static inline void wl_list_add_tail(struct wl_list *ne, struct wl_list *head)
Marcomissyou 0:a2de37bf5f3d 144 {
Marcomissyou 0:a2de37bf5f3d 145 wl_list_add(ne, head->prev, head);
Marcomissyou 0:a2de37bf5f3d 146 }
Marcomissyou 0:a2de37bf5f3d 147
Marcomissyou 0:a2de37bf5f3d 148 static inline void wl_list_del(struct wl_list *entry)
Marcomissyou 0:a2de37bf5f3d 149 {
Marcomissyou 0:a2de37bf5f3d 150 struct wl_list *prev = entry->prev;
Marcomissyou 0:a2de37bf5f3d 151 struct wl_list *next = entry->next;
Marcomissyou 0:a2de37bf5f3d 152
Marcomissyou 0:a2de37bf5f3d 153 next->prev = prev;
Marcomissyou 0:a2de37bf5f3d 154 prev->next = next;
Marcomissyou 0:a2de37bf5f3d 155 }
Marcomissyou 0:a2de37bf5f3d 156
Marcomissyou 0:a2de37bf5f3d 157 static inline int wl_list_empty(const struct wl_list *head)
Marcomissyou 0:a2de37bf5f3d 158 {
Marcomissyou 0:a2de37bf5f3d 159 return head->next == head;
Marcomissyou 0:a2de37bf5f3d 160 }
Marcomissyou 0:a2de37bf5f3d 161
Marcomissyou 0:a2de37bf5f3d 162 #else
Marcomissyou 0:a2de37bf5f3d 163 static void wl_init_list_head(struct wl_list *list);
Marcomissyou 0:a2de37bf5f3d 164 static void wl_list_add(struct wl_list *ne, struct wl_list *prev, struct wl_list *next);
Marcomissyou 0:a2de37bf5f3d 165 static void wl_list_add_head(struct wl_list *ne, struct wl_list *head);
Marcomissyou 0:a2de37bf5f3d 166 static void wl_list_add_tail(struct wl_list *ne, struct wl_list *head);
Marcomissyou 0:a2de37bf5f3d 167 static void wl_list_del(struct wl_list *entry);
Marcomissyou 0:a2de37bf5f3d 168 static int wl_list_empty(const struct wl_list *head);
Marcomissyou 0:a2de37bf5f3d 169
Marcomissyou 0:a2de37bf5f3d 170
Marcomissyou 0:a2de37bf5f3d 171 #endif
Marcomissyou 0:a2de37bf5f3d 172 /********************************************
Marcomissyou 0:a2de37bf5f3d 173
Marcomissyou 0:a2de37bf5f3d 174 Mac State Defines
Marcomissyou 0:a2de37bf5f3d 175
Marcomissyou 0:a2de37bf5f3d 176 ********************************************/
Marcomissyou 0:a2de37bf5f3d 177
Marcomissyou 0:a2de37bf5f3d 178 typedef enum {
Marcomissyou 0:a2de37bf5f3d 179 MAC_DISCONNECTED = 1, //0, /* ksong 2013.5.9 */
Marcomissyou 0:a2de37bf5f3d 180 MAC_CONNECTED,
Marcomissyou 0:a2de37bf5f3d 181 MAC_ALIVE, //MAC_UPDATE_PLL,
Marcomissyou 0:a2de37bf5f3d 182 MAC_UPDATE_PLL_DONE,
Marcomissyou 0:a2de37bf5f3d 183 MAC_SLEEP,
Marcomissyou 0:a2de37bf5f3d 184 MAC_WAKE,
Marcomissyou 0:a2de37bf5f3d 185 MAC_READY,
Marcomissyou 0:a2de37bf5f3d 186 MAC_TX_DONE,
Marcomissyou 0:a2de37bf5f3d 187 MAC_TX_STOP,
Marcomissyou 0:a2de37bf5f3d 188 } MAC_STATUS_T;
Marcomissyou 0:a2de37bf5f3d 189
Marcomissyou 0:a2de37bf5f3d 190 typedef enum {
Marcomissyou 0:a2de37bf5f3d 191 MLME_SCAN_RSP = 0,
Marcomissyou 0:a2de37bf5f3d 192 MLME_START_RSP = 1,
Marcomissyou 0:a2de37bf5f3d 193 MLME_JOIN_RSP = 2,
Marcomissyou 0:a2de37bf5f3d 194 MLME_AUTH_RSP = 3,
Marcomissyou 0:a2de37bf5f3d 195 MLME_ASOC_RSP = 4,
Marcomissyou 0:a2de37bf5f3d 196 MLME_EAPOL_RSP = 5, /* Atmel: 1-15-2015 */
Marcomissyou 0:a2de37bf5f3d 197 MLME_UNEXPECT_RSP = 6, /* ksong 2013-8-9 */
Marcomissyou 0:a2de37bf5f3d 198 } MLME_RSP_TYPE_T;
Marcomissyou 0:a2de37bf5f3d 199
Marcomissyou 0:a2de37bf5f3d 200 /********************************************
Marcomissyou 0:a2de37bf5f3d 201
Marcomissyou 0:a2de37bf5f3d 202 Comamnd Parameters
Marcomissyou 0:a2de37bf5f3d 203
Marcomissyou 0:a2de37bf5f3d 204 ********************************************/
Marcomissyou 0:a2de37bf5f3d 205
Marcomissyou 0:a2de37bf5f3d 206 typedef enum {
Marcomissyou 0:a2de37bf5f3d 207 B_ONLY_MODE = 0, /* basic rate: 1, 2 Mbps, otherwise: 5, 11 Mbps */
Marcomissyou 0:a2de37bf5f3d 208 G_ONLY_MODE, /* basic rate: 6, 12, 24 Mbps, otherwise: 9, 18, 36, 48, 54 Mbps */
Marcomissyou 0:a2de37bf5f3d 209 G_MIXED_11B_1_MODE, /* basic rate: 1, 2, 5.5, 11 Mbps, otherwise: all on */
Marcomissyou 0:a2de37bf5f3d 210 G_MIXED_11B_2_MODE, /* basic rate: 1, 2, 5, 11, 6, 12, 24 Mbps, otherwise: all on */
Marcomissyou 0:a2de37bf5f3d 211 } G_OPERATING_MODE_T;
Marcomissyou 0:a2de37bf5f3d 212
Marcomissyou 0:a2de37bf5f3d 213 typedef enum{
Marcomissyou 0:a2de37bf5f3d 214 RATE_AUTO = 0,
Marcomissyou 0:a2de37bf5f3d 215 RATE_1MB = 1,
Marcomissyou 0:a2de37bf5f3d 216 RATE_2MB = 2,
Marcomissyou 0:a2de37bf5f3d 217 RATE_5MB = 5,
Marcomissyou 0:a2de37bf5f3d 218 RATE_6MB = 6,
Marcomissyou 0:a2de37bf5f3d 219 RATE_9MB = 9,
Marcomissyou 0:a2de37bf5f3d 220 RATE_11MB = 11,
Marcomissyou 0:a2de37bf5f3d 221 RATE_12MB = 12,
Marcomissyou 0:a2de37bf5f3d 222 RATE_18MB = 18,
Marcomissyou 0:a2de37bf5f3d 223 RATE_24MB = 24,
Marcomissyou 0:a2de37bf5f3d 224 RATE_26MB = 36,
Marcomissyou 0:a2de37bf5f3d 225 RATE_48MB = 48,
Marcomissyou 0:a2de37bf5f3d 226 RATE_54MB = 54
Marcomissyou 0:a2de37bf5f3d 227 } TX_RATE_T;
Marcomissyou 0:a2de37bf5f3d 228
Marcomissyou 0:a2de37bf5f3d 229 typedef enum {
Marcomissyou 0:a2de37bf5f3d 230 G_SHORT_PREAMBLE = 0, /* Short Preamble */
Marcomissyou 0:a2de37bf5f3d 231 G_LONG_PREAMBLE = 1, /* Long Preamble */
Marcomissyou 0:a2de37bf5f3d 232 G_AUTO_PREAMBLE = 2, /* Auto Preamble Selection */
Marcomissyou 0:a2de37bf5f3d 233 } G_PREAMBLE_T;
Marcomissyou 0:a2de37bf5f3d 234
Marcomissyou 0:a2de37bf5f3d 235 typedef enum {
Marcomissyou 0:a2de37bf5f3d 236 AUTO_PROT = 0, /* Auto */
Marcomissyou 0:a2de37bf5f3d 237 NO_PROT, /* Do not use any protection */
Marcomissyou 0:a2de37bf5f3d 238 ERP_PROT, /* Protect all ERP frame exchanges */
Marcomissyou 0:a2de37bf5f3d 239 HT_PROT, /* Protect all HT frame exchanges */
Marcomissyou 0:a2de37bf5f3d 240 GF_PROT, /* Protect all GF frame exchanges */
Marcomissyou 0:a2de37bf5f3d 241 } N_PROTECTION_MODE_T;
Marcomissyou 0:a2de37bf5f3d 242
Marcomissyou 0:a2de37bf5f3d 243 typedef enum {
Marcomissyou 0:a2de37bf5f3d 244 SITE_SURVEY_1CH = 0,
Marcomissyou 0:a2de37bf5f3d 245 SITE_SURVEY_ALL_CH = 1,
Marcomissyou 0:a2de37bf5f3d 246 SITE_SURVEY_OFF = 2
Marcomissyou 0:a2de37bf5f3d 247 } SITE_SURVEY_T;
Marcomissyou 0:a2de37bf5f3d 248
Marcomissyou 0:a2de37bf5f3d 249 typedef enum {
Marcomissyou 0:a2de37bf5f3d 250 NORMAL_ACK = 0,
Marcomissyou 0:a2de37bf5f3d 251 NO_ACK,
Marcomissyou 0:a2de37bf5f3d 252 } ACK_POLICY_T;
Marcomissyou 0:a2de37bf5f3d 253
Marcomissyou 0:a2de37bf5f3d 254 typedef enum {
Marcomissyou 0:a2de37bf5f3d 255 G_SELF_CTS_PROT,
Marcomissyou 0:a2de37bf5f3d 256 G_RTS_CTS_PROT,
Marcomissyou 0:a2de37bf5f3d 257 } G_PROTECTION_MODE_T;
Marcomissyou 0:a2de37bf5f3d 258
Marcomissyou 0:a2de37bf5f3d 259 typedef enum {
Marcomissyou 0:a2de37bf5f3d 260 HT_MIXED_MODE = 1,
Marcomissyou 0:a2de37bf5f3d 261 HT_ONLY_20MHZ_MODE,
Marcomissyou 0:a2de37bf5f3d 262 HT_ONLY_20_40MHZ_MODE,
Marcomissyou 0:a2de37bf5f3d 263 } N_OPERATING_MODE_T;
Marcomissyou 0:a2de37bf5f3d 264
Marcomissyou 0:a2de37bf5f3d 265 /********************************************
Marcomissyou 0:a2de37bf5f3d 266
Marcomissyou 0:a2de37bf5f3d 267 Command ID Defines
Marcomissyou 0:a2de37bf5f3d 268
Marcomissyou 0:a2de37bf5f3d 269 ********************************************/
Marcomissyou 0:a2de37bf5f3d 270
Marcomissyou 0:a2de37bf5f3d 271 typedef enum {
Marcomissyou 0:a2de37bf5f3d 272 WID_CHAR = 0,
Marcomissyou 0:a2de37bf5f3d 273 WID_SHORT = 1,
Marcomissyou 0:a2de37bf5f3d 274 WID_INT = 2,
Marcomissyou 0:a2de37bf5f3d 275 WID_STR = 3,
Marcomissyou 0:a2de37bf5f3d 276 WID_BIN = 4
Marcomissyou 0:a2de37bf5f3d 277 } WID_TYPE_T;
Marcomissyou 0:a2de37bf5f3d 278
Marcomissyou 0:a2de37bf5f3d 279 typedef enum {
Marcomissyou 0:a2de37bf5f3d 280 WID_NIL = -1,
Marcomissyou 0:a2de37bf5f3d 281
Marcomissyou 0:a2de37bf5f3d 282 /* Character WID list */
Marcomissyou 0:a2de37bf5f3d 283 WID_BSS_TYPE = 0x0000,
Marcomissyou 0:a2de37bf5f3d 284 WID_CURRENT_TX_RATE = 0x0001,
Marcomissyou 0:a2de37bf5f3d 285 WID_CURRENT_CHANNEL = 0x0002,
Marcomissyou 0:a2de37bf5f3d 286 WID_PREAMBLE = 0x0003,
Marcomissyou 0:a2de37bf5f3d 287 WID_11G_OPERATING_MODE = 0x0004,
Marcomissyou 0:a2de37bf5f3d 288 WID_STATUS = 0x0005,
Marcomissyou 0:a2de37bf5f3d 289 WID_SCAN_TYPE = 0x0007,
Marcomissyou 0:a2de37bf5f3d 290 WID_PRIVACY_INVOKED = 0x0008,
Marcomissyou 0:a2de37bf5f3d 291 WID_KEY_ID = 0x0009,
Marcomissyou 0:a2de37bf5f3d 292 WID_QOS_ENABLE = 0x000A,
Marcomissyou 0:a2de37bf5f3d 293 WID_POWER_MANAGEMENT = 0x000B,
Marcomissyou 0:a2de37bf5f3d 294 WID_11I_MODE = 0x000C,
Marcomissyou 0:a2de37bf5f3d 295 WID_AUTH_TYPE = 0x000D,
Marcomissyou 0:a2de37bf5f3d 296 WID_SITE_SURVEY = 0x000E,
Marcomissyou 0:a2de37bf5f3d 297 WID_LISTEN_INTERVAL = 0x000F,
Marcomissyou 0:a2de37bf5f3d 298 WID_DTIM_PERIOD = 0x0010,
Marcomissyou 0:a2de37bf5f3d 299 WID_ACK_POLICY = 0x0011,
Marcomissyou 0:a2de37bf5f3d 300 WID_RESET = 0x0012,
Marcomissyou 0:a2de37bf5f3d 301 WID_BCAST_SSID = 0x0015,
Marcomissyou 0:a2de37bf5f3d 302 WID_DISCONNECT = 0x0016,
Marcomissyou 0:a2de37bf5f3d 303 WID_READ_ADDR_SDRAM = 0x0017,
Marcomissyou 0:a2de37bf5f3d 304 WID_TX_POWER_LEVEL_11A = 0x0018,
Marcomissyou 0:a2de37bf5f3d 305 WID_REKEY_POLICY = 0x0019,
Marcomissyou 0:a2de37bf5f3d 306 WID_SHORT_SLOT_ALLOWED = 0x001A,
Marcomissyou 0:a2de37bf5f3d 307 WID_PHY_ACTIVE_REG = 0x001B,
Marcomissyou 0:a2de37bf5f3d 308 WID_TX_POWER_LEVEL_11B = 0x001D,
Marcomissyou 0:a2de37bf5f3d 309 WID_START_SCAN_REQ = 0x001E,
Marcomissyou 0:a2de37bf5f3d 310 WID_RSSI = 0x001F,
Marcomissyou 0:a2de37bf5f3d 311 WID_JOIN_REQ = 0x0020,
Marcomissyou 0:a2de37bf5f3d 312 #ifdef MAC_ANTENNA_DIVERSITY_FEATURE
Marcomissyou 0:a2de37bf5f3d 313 WID_ANTENNA_SELECTION = 0x0021,
Marcomissyou 0:a2de37bf5f3d 314 #endif /* MAC_ANTENNA_DIVERSITY_FEATURE */
Marcomissyou 0:a2de37bf5f3d 315 WID_USER_CONTROL_ON_TX_POWER = 0x0027,
Marcomissyou 0:a2de37bf5f3d 316 WID_MEMORY_ACCESS_8BIT = 0x0029,
Marcomissyou 0:a2de37bf5f3d 317 WID_UAPSD_SUPPORT_AP = 0x002A,
Marcomissyou 0:a2de37bf5f3d 318 WID_CURRENT_MAC_STATUS = 0x0031,
Marcomissyou 0:a2de37bf5f3d 319 WID_AUTO_RX_SENSITIVITY = 0x0032,
Marcomissyou 0:a2de37bf5f3d 320 WID_DATAFLOW_CONTROL = 0x0033,
Marcomissyou 0:a2de37bf5f3d 321 WID_SCAN_FILTER = 0x0036,
Marcomissyou 0:a2de37bf5f3d 322 WID_LINK_LOSS_THRESHOLD = 0x0037,
Marcomissyou 0:a2de37bf5f3d 323 WID_AUTORATE_TYPE = 0x0038,
Marcomissyou 0:a2de37bf5f3d 324 WID_802_11H_DFS_MODE = 0x003B,
Marcomissyou 0:a2de37bf5f3d 325 WID_802_11H_TPC_MODE = 0x003C,
Marcomissyou 0:a2de37bf5f3d 326
Marcomissyou 0:a2de37bf5f3d 327 /* Character WID list */
Marcomissyou 0:a2de37bf5f3d 328 WID_11N_PROT_MECH = 0x0080,
Marcomissyou 0:a2de37bf5f3d 329 WID_11N_ERP_PROT_TYPE = 0x0081,
Marcomissyou 0:a2de37bf5f3d 330 WID_11N_ENABLE = 0x0082,
Marcomissyou 0:a2de37bf5f3d 331 WID_11N_OPERATING_MODE = 0x0083,
Marcomissyou 0:a2de37bf5f3d 332 WID_11N_OBSS_NONHT_DETECTION = 0x0084,
Marcomissyou 0:a2de37bf5f3d 333 WID_11N_HT_PROT_TYPE = 0x0085,
Marcomissyou 0:a2de37bf5f3d 334 WID_11N_RIFS_PROT_ENABLE = 0x0086,
Marcomissyou 0:a2de37bf5f3d 335 WID_11N_SMPS_MODE = 0x0087,
Marcomissyou 0:a2de37bf5f3d 336 WID_11N_CURRENT_TX_MCS = 0x0088,
Marcomissyou 0:a2de37bf5f3d 337 WID_11N_PRINT_STATS = 0x0089,
Marcomissyou 0:a2de37bf5f3d 338 WID_HUT_FCS_CORRUPT_MODE = 0x008A,
Marcomissyou 0:a2de37bf5f3d 339 WID_HUT_RESTART = 0x008B,
Marcomissyou 0:a2de37bf5f3d 340 WID_HUT_TX_FORMAT = 0x008C,
Marcomissyou 0:a2de37bf5f3d 341 WID_11N_SHORT_GI_ENABLE = 0x008D,
Marcomissyou 0:a2de37bf5f3d 342 WID_HUT_BANDWIDTH = 0x008E,
Marcomissyou 0:a2de37bf5f3d 343 WID_HUT_OP_BAND = 0x008F,
Marcomissyou 0:a2de37bf5f3d 344 WID_HUT_STBC = 0x0090,
Marcomissyou 0:a2de37bf5f3d 345 WID_HUT_ESS = 0x0091,
Marcomissyou 0:a2de37bf5f3d 346 WID_HUT_ANTSET = 0x0092,
Marcomissyou 0:a2de37bf5f3d 347 WID_HUT_HT_OP_MODE = 0x0093,
Marcomissyou 0:a2de37bf5f3d 348 WID_RIFS_MODE = 0x0094,
Marcomissyou 0:a2de37bf5f3d 349 WID_HUT_SMOOTHING_REC = 0x0095,
Marcomissyou 0:a2de37bf5f3d 350 WID_HUT_SOUNDING_PKT = 0x0096,
Marcomissyou 0:a2de37bf5f3d 351 WID_HUT_HT_CODING = 0x0097,
Marcomissyou 0:a2de37bf5f3d 352 WID_HUT_TEST_DIR = 0x0098,
Marcomissyou 0:a2de37bf5f3d 353 WID_HUT_PHY_TEST_MODE = 0x009A,
Marcomissyou 0:a2de37bf5f3d 354 WID_HUT_PHY_TEST_RATE_HI = 0x009B,
Marcomissyou 0:a2de37bf5f3d 355 WID_HUT_PHY_TEST_RATE_LO = 0x009C,
Marcomissyou 0:a2de37bf5f3d 356 WID_HUT_DISABLE_RXQ_REPLENISH = 0x009D,
Marcomissyou 0:a2de37bf5f3d 357 WID_HUT_KEY_ORIGIN = 0x009E,
Marcomissyou 0:a2de37bf5f3d 358 WID_HUT_BCST_PERCENT = 0x009F,
Marcomissyou 0:a2de37bf5f3d 359 WID_HUT_GROUP_CIPHER_TYPE = 0x00A0,
Marcomissyou 0:a2de37bf5f3d 360 WID_TX_ABORT_CONFIG = 0x00A1,
Marcomissyou 0:a2de37bf5f3d 361 WID_HOST_DATA_IF_TYPE = 0x00A2,
Marcomissyou 0:a2de37bf5f3d 362 WID_HOST_CONFIG_IF_TYPE = 0x00A3,
Marcomissyou 0:a2de37bf5f3d 363 WID_HUT_TSF_TEST_MODE = 0x00A4,
Marcomissyou 0:a2de37bf5f3d 364 WID_HUT_PKT_TSSI_VALUE = 0x00A5,
Marcomissyou 0:a2de37bf5f3d 365 WID_REG_TSSI_11B_VALUE = 0x00A6,
Marcomissyou 0:a2de37bf5f3d 366 WID_REG_TSSI_11G_VALUE = 0x00A7,
Marcomissyou 0:a2de37bf5f3d 367 WID_REG_TSSI_11N_VALUE = 0x00A8,
Marcomissyou 0:a2de37bf5f3d 368 WID_TX_CALIBRATION = 0x00A9,
Marcomissyou 0:a2de37bf5f3d 369 WID_DSCR_TSSI_11B_VALUE = 0x00AA,
Marcomissyou 0:a2de37bf5f3d 370 WID_DSCR_TSSI_11G_VALUE = 0x00AB,
Marcomissyou 0:a2de37bf5f3d 371 WID_DSCR_TSSI_11N_VALUE = 0x00AC,
Marcomissyou 0:a2de37bf5f3d 372 WID_HUT_RSSI_EX = 0x00AD,
Marcomissyou 0:a2de37bf5f3d 373 WID_HUT_ADJ_RSSI_EX = 0x00AE,
Marcomissyou 0:a2de37bf5f3d 374 WID_11N_IMMEDIATE_BA_ENABLED = 0x00AF,
Marcomissyou 0:a2de37bf5f3d 375 WID_11N_TXOP_PROT_DISABLE = 0x00B0,
Marcomissyou 0:a2de37bf5f3d 376 WID_TX_POWER_LEVEL_11N = 0x00B1,
Marcomissyou 0:a2de37bf5f3d 377 WID_USER_SEC_CHANNEL_OFFSET = 0x00C0,
Marcomissyou 0:a2de37bf5f3d 378 WID_2040_COEXISTENCE = 0x00C1,
Marcomissyou 0:a2de37bf5f3d 379 WID_HUT_FC_TXOP_MOD = 0x00C2,
Marcomissyou 0:a2de37bf5f3d 380 WID_HUT_FC_PROT_TYPE = 0x00C3,
Marcomissyou 0:a2de37bf5f3d 381 WID_HUT_SEC_CCA_ASSERT = 0x00C4,
Marcomissyou 0:a2de37bf5f3d 382 WID_2040_ENABLE = 0x00C5,
Marcomissyou 0:a2de37bf5f3d 383 WID_2040_CURR_CHANNEL_OFFSET = 0x00C6,
Marcomissyou 0:a2de37bf5f3d 384 WID_2040_40MHZ_INTOLERANT = 0x00C7,
Marcomissyou 0:a2de37bf5f3d 385 WID_HOST_PLATFORM = 0x00C8, /* ykk */
Marcomissyou 0:a2de37bf5f3d 386 WID_MLME_RSP = 0x00C9, /* ykk */
Marcomissyou 0:a2de37bf5f3d 387 WID_RX_TEST = 0x00CA, /* ksong 2013-7-16 */
Marcomissyou 0:a2de37bf5f3d 388 WID_DOZE_TIME = 0x00CB, /* ksong 2013-7-22 */
Marcomissyou 0:a2de37bf5f3d 389 /* Character WID list */
Marcomissyou 0:a2de37bf5f3d 390
Marcomissyou 0:a2de37bf5f3d 391 /* Short WID list */
Marcomissyou 0:a2de37bf5f3d 392 WID_RTS_THRESHOLD = 0x1000,
Marcomissyou 0:a2de37bf5f3d 393 WID_FRAG_THRESHOLD = 0x1001,
Marcomissyou 0:a2de37bf5f3d 394 WID_SHORT_RETRY_LIMIT = 0x1002,
Marcomissyou 0:a2de37bf5f3d 395 WID_LONG_RETRY_LIMIT = 0x1003,
Marcomissyou 0:a2de37bf5f3d 396 WID_BEACON_INTERVAL = 0x1006,
Marcomissyou 0:a2de37bf5f3d 397 WID_MEMORY_ACCESS_16BIT = 0x1008,
Marcomissyou 0:a2de37bf5f3d 398 WID_RX_SENSE = 0x100B,
Marcomissyou 0:a2de37bf5f3d 399 WID_ACTIVE_SCAN_TIME = 0x100C,
Marcomissyou 0:a2de37bf5f3d 400 WID_PASSIVE_SCAN_TIME = 0x100D,
Marcomissyou 0:a2de37bf5f3d 401 WID_SITE_SURVEY_SCAN_TIME = 0x100E,
Marcomissyou 0:a2de37bf5f3d 402 WID_JOIN_START_TIMEOUT = 0x100F,
Marcomissyou 0:a2de37bf5f3d 403 WID_AUTH_TIMEOUT = 0x1010,
Marcomissyou 0:a2de37bf5f3d 404 WID_ASOC_TIMEOUT = 0x1011,
Marcomissyou 0:a2de37bf5f3d 405 WID_11I_PROTOCOL_TIMEOUT = 0x1012,
Marcomissyou 0:a2de37bf5f3d 406 WID_EAPOL_RESPONSE_TIMEOUT = 0x1013,
Marcomissyou 0:a2de37bf5f3d 407
Marcomissyou 0:a2de37bf5f3d 408 /* Short WID list */
Marcomissyou 0:a2de37bf5f3d 409 WID_11N_RF_REG_VAL = 0x1080,
Marcomissyou 0:a2de37bf5f3d 410 WID_HUT_FRAME_LEN = 0x1081,
Marcomissyou 0:a2de37bf5f3d 411 WID_HUT_TXOP_LIMIT = 0x1082,
Marcomissyou 0:a2de37bf5f3d 412 WID_HUT_SIG_QUAL_AVG = 0x1083,
Marcomissyou 0:a2de37bf5f3d 413 WID_HUT_SIG_QUAL_AVG_CNT = 0x1084,
Marcomissyou 0:a2de37bf5f3d 414 WID_11N_SIG_QUAL_VAL = 0x1085,
Marcomissyou 0:a2de37bf5f3d 415 WID_HUT_RSSI_EX_COUNT = 0x1086,
Marcomissyou 0:a2de37bf5f3d 416 WID_CCA_THRESHOLD = 0x1087,
Marcomissyou 0:a2de37bf5f3d 417 WID_CLK_26M_SETTLE_TIME = 0x1088, /* ksong */
Marcomissyou 0:a2de37bf5f3d 418
Marcomissyou 0:a2de37bf5f3d 419 /* Short WID list */
Marcomissyou 0:a2de37bf5f3d 420
Marcomissyou 0:a2de37bf5f3d 421 /* Integer WID list */
Marcomissyou 0:a2de37bf5f3d 422 WID_FAILED_COUNT = 0x2000,
Marcomissyou 0:a2de37bf5f3d 423 WID_RETRY_COUNT = 0x2001,
Marcomissyou 0:a2de37bf5f3d 424 WID_MULTIPLE_RETRY_COUNT = 0x2002,
Marcomissyou 0:a2de37bf5f3d 425 WID_FRAME_DUPLICATE_COUNT = 0x2003,
Marcomissyou 0:a2de37bf5f3d 426 WID_ACK_FAILURE_COUNT = 0x2004,
Marcomissyou 0:a2de37bf5f3d 427 WID_RECEIVED_FRAGMENT_COUNT = 0x2005,
Marcomissyou 0:a2de37bf5f3d 428 WID_MCAST_RECEIVED_FRAME_COUNT = 0x2006,
Marcomissyou 0:a2de37bf5f3d 429 WID_FCS_ERROR_COUNT = 0x2007,
Marcomissyou 0:a2de37bf5f3d 430 WID_SUCCESS_FRAME_COUNT = 0x2008,
Marcomissyou 0:a2de37bf5f3d 431 WID_HUT_TX_COUNT = 0x200A,
Marcomissyou 0:a2de37bf5f3d 432 WID_TX_FRAGMENT_COUNT = 0x200B,
Marcomissyou 0:a2de37bf5f3d 433 WID_TX_MULTICAST_FRAME_COUNT = 0x200C,
Marcomissyou 0:a2de37bf5f3d 434 WID_RTS_SUCCESS_COUNT = 0x200D,
Marcomissyou 0:a2de37bf5f3d 435 WID_RTS_FAILURE_COUNT = 0x200E,
Marcomissyou 0:a2de37bf5f3d 436 WID_WEP_UNDECRYPTABLE_COUNT = 0x200F,
Marcomissyou 0:a2de37bf5f3d 437 WID_REKEY_PERIOD = 0x2010,
Marcomissyou 0:a2de37bf5f3d 438 WID_REKEY_PACKET_COUNT = 0x2011,
Marcomissyou 0:a2de37bf5f3d 439 WID_1X_SERV_ADDR = 0x2012,
Marcomissyou 0:a2de37bf5f3d 440 WID_STACK_IP_ADDR = 0x2013,
Marcomissyou 0:a2de37bf5f3d 441 WID_STACK_NETMASK_ADDR = 0x2014,
Marcomissyou 0:a2de37bf5f3d 442 WID_HW_RX_COUNT = 0x2015,
Marcomissyou 0:a2de37bf5f3d 443 WID_MEMORY_ADDRESS = 0x201E,
Marcomissyou 0:a2de37bf5f3d 444 WID_MEMORY_ACCESS_32BIT = 0x201F,
Marcomissyou 0:a2de37bf5f3d 445 WID_RF_REG_VAL = 0x2021,
Marcomissyou 0:a2de37bf5f3d 446
Marcomissyou 0:a2de37bf5f3d 447 /* Integer WID list */
Marcomissyou 0:a2de37bf5f3d 448 WID_11N_PHY_ACTIVE_REG_VAL = 0x2080,
Marcomissyou 0:a2de37bf5f3d 449 WID_HUT_NUM_TX_PKTS = 0x2081,
Marcomissyou 0:a2de37bf5f3d 450 WID_HUT_TX_TIME_TAKEN = 0x2082,
Marcomissyou 0:a2de37bf5f3d 451 WID_HUT_TX_TEST_TIME = 0x2083,
Marcomissyou 0:a2de37bf5f3d 452
Marcomissyou 0:a2de37bf5f3d 453 /* Integer WID list */
Marcomissyou 0:a2de37bf5f3d 454 WID_FW_DEBUG_FLAG = 0x2084,
Marcomissyou 0:a2de37bf5f3d 455
Marcomissyou 0:a2de37bf5f3d 456 /* String WID list */
Marcomissyou 0:a2de37bf5f3d 457 WID_SSID = 0x3000,
Marcomissyou 0:a2de37bf5f3d 458 WID_FIRMWARE_VERSION = 0x3001,
Marcomissyou 0:a2de37bf5f3d 459 WID_OPERATIONAL_RATE_SET = 0x3002,
Marcomissyou 0:a2de37bf5f3d 460 WID_BSSID = 0x3003,
Marcomissyou 0:a2de37bf5f3d 461 WID_WEP_KEY_VALUE = 0x3004,
Marcomissyou 0:a2de37bf5f3d 462 WID_11I_PSK = 0x3008,
Marcomissyou 0:a2de37bf5f3d 463 WID_11E_P_ACTION_REQ = 0x3009,
Marcomissyou 0:a2de37bf5f3d 464 WID_1X_KEY = 0x300A,
Marcomissyou 0:a2de37bf5f3d 465 WID_HARDWARE_VERSION = 0x300B,
Marcomissyou 0:a2de37bf5f3d 466 WID_MAC_ADDR = 0x300C,
Marcomissyou 0:a2de37bf5f3d 467 WID_HUT_DEST_ADDR = 0x300D,
Marcomissyou 0:a2de37bf5f3d 468 WID_MISC_TEST_MODES = 0x300E,
Marcomissyou 0:a2de37bf5f3d 469 WID_PHY_VERSION = 0x300F,
Marcomissyou 0:a2de37bf5f3d 470 WID_SUPP_USERNAME = 0x3010,
Marcomissyou 0:a2de37bf5f3d 471 WID_SUPP_PASSWORD = 0x3011,
Marcomissyou 0:a2de37bf5f3d 472 WID_SITE_SURVEY_RESULTS = 0x3012,
Marcomissyou 0:a2de37bf5f3d 473 WID_RX_POWER_LEVEL = 0x3013,
Marcomissyou 0:a2de37bf5f3d 474 WID_ADD_WEP_KEY = 0x3019,
Marcomissyou 0:a2de37bf5f3d 475 WID_REMOVE_WEP_KEY = 0x301A,
Marcomissyou 0:a2de37bf5f3d 476 WID_ADD_PTK = 0x301B,
Marcomissyou 0:a2de37bf5f3d 477 WID_ADD_RX_GTK = 0x301C,
Marcomissyou 0:a2de37bf5f3d 478 WID_ADD_TX_GTK = 0x301D,
Marcomissyou 0:a2de37bf5f3d 479 WID_REMOVE_KEY = 0x301E,
Marcomissyou 0:a2de37bf5f3d 480 WID_ASSOC_REQ_INFO = 0x301F,
Marcomissyou 0:a2de37bf5f3d 481 WID_ASSOC_RES_INFO = 0x3020,
Marcomissyou 0:a2de37bf5f3d 482 WID_UPDATE_RF_SUPPORTED_INFO = 0x3021,
Marcomissyou 0:a2de37bf5f3d 483
Marcomissyou 0:a2de37bf5f3d 484 /* String WID list */
Marcomissyou 0:a2de37bf5f3d 485 WID_11N_P_ACTION_REQ = 0x3080,
Marcomissyou 0:a2de37bf5f3d 486 WID_HUT_TEST_ID = 0x3081,
Marcomissyou 0:a2de37bf5f3d 487 WID_PMKID_INFO = 0x3082,
Marcomissyou 0:a2de37bf5f3d 488 WID_FIRMWARE_INFO = 0x3083,
Marcomissyou 0:a2de37bf5f3d 489 WID_HOST_SCAN_SSID = 0x3084,
Marcomissyou 0:a2de37bf5f3d 490
Marcomissyou 0:a2de37bf5f3d 491 /* String WID list */
Marcomissyou 0:a2de37bf5f3d 492 WID_FIXED_IP_ADDR = 0x3090,//Ryan
Marcomissyou 0:a2de37bf5f3d 493
Marcomissyou 0:a2de37bf5f3d 494 /* Binary WID list */
Marcomissyou 0:a2de37bf5f3d 495 WID_UAPSD_CONFIG = 0x4001,
Marcomissyou 0:a2de37bf5f3d 496 WID_UAPSD_STATUS = 0x4002,
Marcomissyou 0:a2de37bf5f3d 497 WID_WMM_AP_AC_PARAMS = 0x4003,
Marcomissyou 0:a2de37bf5f3d 498 WID_WMM_STA_AC_PARAMS = 0x4004,
Marcomissyou 0:a2de37bf5f3d 499 WID_NETWORK_INFO = 0x4005,
Marcomissyou 0:a2de37bf5f3d 500 WID_STA_JOIN_INFO = 0x4006,
Marcomissyou 0:a2de37bf5f3d 501 WID_CONNECTED_STA_LIST = 0x4007,
Marcomissyou 0:a2de37bf5f3d 502 WID_SCAN_BSS_INFO = 0x4008,
Marcomissyou 0:a2de37bf5f3d 503
Marcomissyou 0:a2de37bf5f3d 504 /* Binary WID list */
Marcomissyou 0:a2de37bf5f3d 505 WID_11N_AUTORATE_TABLE = 0x4080,
Marcomissyou 0:a2de37bf5f3d 506 WID_HUT_TX_PATTERN = 0x4081,
Marcomissyou 0:a2de37bf5f3d 507 WID_HUT_STATS = 0x4082,
Marcomissyou 0:a2de37bf5f3d 508 WID_HUT_LOG_STATS = 0x4083,
Marcomissyou 0:a2de37bf5f3d 509
Marcomissyou 0:a2de37bf5f3d 510 WID_HOST_PROBE_IE = 0x4084,
Marcomissyou 0:a2de37bf5f3d 511 WID_HOST_SCAN_CHANNEL = 0x4085,
Marcomissyou 0:a2de37bf5f3d 512
Marcomissyou 0:a2de37bf5f3d 513 /* Atmel, 1-15-2015*/
Marcomissyou 0:a2de37bf5f3d 514 WID_PMK_CACHE_INFO = 0x4088,
Marcomissyou 0:a2de37bf5f3d 515
Marcomissyou 0:a2de37bf5f3d 516
Marcomissyou 0:a2de37bf5f3d 517 /* Miscellaneous WIDs */
Marcomissyou 0:a2de37bf5f3d 518 WID_ALL = 0x7FFE,
Marcomissyou 0:a2de37bf5f3d 519 WID_MAX = 0xFFFF
Marcomissyou 0:a2de37bf5f3d 520 } WID_T;
Marcomissyou 0:a2de37bf5f3d 521
Marcomissyou 0:a2de37bf5f3d 522 /********************************************
Marcomissyou 0:a2de37bf5f3d 523
Marcomissyou 0:a2de37bf5f3d 524 Tx/Rx Queue Structure
Marcomissyou 0:a2de37bf5f3d 525
Marcomissyou 0:a2de37bf5f3d 526 ********************************************/
Marcomissyou 0:a2de37bf5f3d 527
Marcomissyou 0:a2de37bf5f3d 528 #ifdef SINGLE_TX_QUEUE
Marcomissyou 0:a2de37bf5f3d 529 typedef enum {
Marcomissyou 0:a2de37bf5f3d 530 CFG_W = 1,
Marcomissyou 0:a2de37bf5f3d 531 CFG_Q,
Marcomissyou 0:a2de37bf5f3d 532 NET_D,
Marcomissyou 0:a2de37bf5f3d 533 } TX_PACKET_ID_T;
Marcomissyou 0:a2de37bf5f3d 534 #endif
Marcomissyou 0:a2de37bf5f3d 535
Marcomissyou 0:a2de37bf5f3d 536 typedef struct que_h {
Marcomissyou 0:a2de37bf5f3d 537 int bytes_in_queue;
Marcomissyou 0:a2de37bf5f3d 538 int count;
Marcomissyou 0:a2de37bf5f3d 539 LOCK_ID_T lock_id;
Marcomissyou 0:a2de37bf5f3d 540 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 541 } que_hdr_t;
Marcomissyou 0:a2de37bf5f3d 542
Marcomissyou 0:a2de37bf5f3d 543 typedef struct que_e {
Marcomissyou 0:a2de37bf5f3d 544 u8 *buffer;
Marcomissyou 0:a2de37bf5f3d 545 u32 buffer_size;
Marcomissyou 0:a2de37bf5f3d 546 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 547 } que_e_common_t;
Marcomissyou 0:a2de37bf5f3d 548
Marcomissyou 0:a2de37bf5f3d 549 #ifdef SINGLE_TX_QUEUE
Marcomissyou 0:a2de37bf5f3d 550 typedef struct tx_que_common {
Marcomissyou 0:a2de37bf5f3d 551 u8 *buffer;
Marcomissyou 0:a2de37bf5f3d 552 u32 buffer_size;
Marcomissyou 0:a2de37bf5f3d 553 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 554 TX_PACKET_ID_T id;
Marcomissyou 0:a2de37bf5f3d 555 } tx_que_common_t;
Marcomissyou 0:a2de37bf5f3d 556 #endif
Marcomissyou 0:a2de37bf5f3d 557
Marcomissyou 0:a2de37bf5f3d 558 typedef struct txq_e {
Marcomissyou 0:a2de37bf5f3d 559 u8 *buffer;
Marcomissyou 0:a2de37bf5f3d 560 u32 buffer_size;
Marcomissyou 0:a2de37bf5f3d 561 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 562 #ifdef SINGLE_TX_QUEUE
Marcomissyou 0:a2de37bf5f3d 563 TX_PACKET_ID_T id;
Marcomissyou 0:a2de37bf5f3d 564 #endif
Marcomissyou 0:a2de37bf5f3d 565 void *priv;
Marcomissyou 0:a2de37bf5f3d 566 free_txb_cb_fun_t free_txb_cb;
Marcomissyou 0:a2de37bf5f3d 567 } txq_e_t;
Marcomissyou 0:a2de37bf5f3d 568
Marcomissyou 0:a2de37bf5f3d 569 typedef struct rxq_e {
Marcomissyou 0:a2de37bf5f3d 570 u8 *buffer;
Marcomissyou 0:a2de37bf5f3d 571 u32 buffer_size;
Marcomissyou 0:a2de37bf5f3d 572 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 573 } rxq_e_t;
Marcomissyou 0:a2de37bf5f3d 574
Marcomissyou 0:a2de37bf5f3d 575 typedef struct set_cfg_e {
Marcomissyou 0:a2de37bf5f3d 576 u8 *buffer;
Marcomissyou 0:a2de37bf5f3d 577 u32 buffer_size;
Marcomissyou 0:a2de37bf5f3d 578 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 579 #ifdef SINGLE_TX_QUEUE
Marcomissyou 0:a2de37bf5f3d 580 TX_PACKET_ID_T id;
Marcomissyou 0:a2de37bf5f3d 581 #endif
Marcomissyou 0:a2de37bf5f3d 582 } cfg_w_e_t;
Marcomissyou 0:a2de37bf5f3d 583
Marcomissyou 0:a2de37bf5f3d 584 typedef struct query_cfg_e {
Marcomissyou 0:a2de37bf5f3d 585 u8 *buffer;
Marcomissyou 0:a2de37bf5f3d 586 u32 buffer_size;
Marcomissyou 0:a2de37bf5f3d 587 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 588 #ifdef SINGLE_TX_QUEUE
Marcomissyou 0:a2de37bf5f3d 589 TX_PACKET_ID_T id;
Marcomissyou 0:a2de37bf5f3d 590 #endif
Marcomissyou 0:a2de37bf5f3d 591 } cfg_q_e_t;
Marcomissyou 0:a2de37bf5f3d 592
Marcomissyou 0:a2de37bf5f3d 593 /* Atmel: 1-15-2015
Marcomissyou 0:a2de37bf5f3d 594 Move to nmi_wlan_if.h
Marcomissyou 0:a2de37bf5f3d 595 */
Marcomissyou 0:a2de37bf5f3d 596 //typedef void (*query_cb_fun_t)(u32, u32);
Marcomissyou 0:a2de37bf5f3d 597
Marcomissyou 0:a2de37bf5f3d 598 typedef struct query_rsp_e {
Marcomissyou 0:a2de37bf5f3d 599 u16 wid;
Marcomissyou 0:a2de37bf5f3d 600 query_cb_fun_t query_cb;
Marcomissyou 0:a2de37bf5f3d 601 struct wl_list list;
Marcomissyou 0:a2de37bf5f3d 602 } cfg_q_rsp_e_t;
Marcomissyou 0:a2de37bf5f3d 603
Marcomissyou 0:a2de37bf5f3d 604 typedef struct {
Marcomissyou 0:a2de37bf5f3d 605 u8 type;
Marcomissyou 0:a2de37bf5f3d 606 u8 id;
Marcomissyou 0:a2de37bf5f3d 607 u16 len;
Marcomissyou 0:a2de37bf5f3d 608 } cfg_msg_hdr_t;
Marcomissyou 0:a2de37bf5f3d 609
Marcomissyou 0:a2de37bf5f3d 610
Marcomissyou 0:a2de37bf5f3d 611 typedef struct {
Marcomissyou 0:a2de37bf5f3d 612 int (*read_reg)(u32, u32 *);
Marcomissyou 0:a2de37bf5f3d 613 int (*write_reg)(u32, u32);
Marcomissyou 0:a2de37bf5f3d 614 int (*block_rx)(u32, u8 *, u32);
Marcomissyou 0:a2de37bf5f3d 615 int (*block_tx)(u32, u8 *, u32);
Marcomissyou 0:a2de37bf5f3d 616 int (*hw_cfg)(void);
Marcomissyou 0:a2de37bf5f3d 617 int (*clear_intr)(void);
Marcomissyou 0:a2de37bf5f3d 618 } nmi_wl_if_t;
Marcomissyou 0:a2de37bf5f3d 619
Marcomissyou 0:a2de37bf5f3d 620 #ifdef __cplusplus
Marcomissyou 0:a2de37bf5f3d 621 extern "C" {
Marcomissyou 0:a2de37bf5f3d 622 #endif
Marcomissyou 0:a2de37bf5f3d 623 extern int nmi_hif_init(nmi_wl_io_t *, nmi_wl_if_t *);
Marcomissyou 0:a2de37bf5f3d 624 extern void DPRINT(u32, char *fmt, ...);
Marcomissyou 0:a2de37bf5f3d 625 extern void DPRINT_HEX(u32 grp, char *title, u8 *buf, u32 len);
Marcomissyou 0:a2de37bf5f3d 626 void set_FW_TX_OK(void);//Tsungta
Marcomissyou 0:a2de37bf5f3d 627 void get_FW_TX_OK(void);//Tsungta
Marcomissyou 0:a2de37bf5f3d 628 u32 FW_TX_is_OK(void);
Marcomissyou 0:a2de37bf5f3d 629 #ifdef __cplusplus
Marcomissyou 0:a2de37bf5f3d 630 }
Marcomissyou 0:a2de37bf5f3d 631 #endif
Marcomissyou 0:a2de37bf5f3d 632
Marcomissyou 0:a2de37bf5f3d 633 #endif
Marcomissyou 0:a2de37bf5f3d 634
Marcomissyou 0:a2de37bf5f3d 635