Marco Hsu / WIFI_API

WIFI_API_20150524e

WIFI_Driver/nordic/spi_master.h@0:a2de37bf5f3d, 2015-06-09 (annotated)

Committer:
Marcomissyou
Date:
Tue Jun 09 06:04:13 2015 +0000
Revision:
0:a2de37bf5f3d
update to WIFI_API_20150524e

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Marcomissyou 0:a2de37bf5f3d 1 /* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
Marcomissyou 0:a2de37bf5f3d 2 *
Marcomissyou 0:a2de37bf5f3d 3 * The information contained herein is property of Nordic Semiconductor ASA.
Marcomissyou 0:a2de37bf5f3d 4 * Terms and conditions of usage are described in detail in NORDIC
Marcomissyou 0:a2de37bf5f3d 5 * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
Marcomissyou 0:a2de37bf5f3d 6 *
Marcomissyou 0:a2de37bf5f3d 7 * Licensees are granted free, non-transferable use of the information. NO
Marcomissyou 0:a2de37bf5f3d 8 * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
Marcomissyou 0:a2de37bf5f3d 9 * the file.
Marcomissyou 0:a2de37bf5f3d 10 *
Marcomissyou 0:a2de37bf5f3d 11 */
Marcomissyou 0:a2de37bf5f3d 12
Marcomissyou 0:a2de37bf5f3d 13 #ifndef SPI_MASTER_H
Marcomissyou 0:a2de37bf5f3d 14 #define SPI_MASTER_H
Marcomissyou 0:a2de37bf5f3d 15
Marcomissyou 0:a2de37bf5f3d 16 #include <stdbool.h>
Marcomissyou 0:a2de37bf5f3d 17 #include <stdint.h>
Marcomissyou 0:a2de37bf5f3d 18
Marcomissyou 0:a2de37bf5f3d 19 /* @file
Marcomissyou 0:a2de37bf5f3d 20 * @brief Software controlled SPI Master driver.
Marcomissyou 0:a2de37bf5f3d 21 *
Marcomissyou 0:a2de37bf5f3d 22 *
Marcomissyou 0:a2de37bf5f3d 23 * @defgroup lib_driver_spi_master Software controlled SPI Master driver
Marcomissyou 0:a2de37bf5f3d 24 * @{
Marcomissyou 0:a2de37bf5f3d 25 * @ingroup nrf_drivers
Marcomissyou 0:a2de37bf5f3d 26 * @brief Software controlled SPI Master driver.
Marcomissyou 0:a2de37bf5f3d 27 *
Marcomissyou 0:a2de37bf5f3d 28 * Supported features:
Marcomissyou 0:a2de37bf5f3d 29 * - Operate two SPI masters independently or in parallel.
Marcomissyou 0:a2de37bf5f3d 30 * - Transmit and Receive given size of data through SPI.
Marcomissyou 0:a2de37bf5f3d 31 * - configure each SPI module separately through @ref spi_master_init.
Marcomissyou 0:a2de37bf5f3d 32 */
Marcomissyou 0:a2de37bf5f3d 33
Marcomissyou 0:a2de37bf5f3d 34 /**
Marcomissyou 0:a2de37bf5f3d 35 * SPI master operating frequency
Marcomissyou 0:a2de37bf5f3d 36 */
Marcomissyou 0:a2de37bf5f3d 37 typedef enum
Marcomissyou 0:a2de37bf5f3d 38 {
Marcomissyou 0:a2de37bf5f3d 39 Freq_125Kbps = 0, /*!< drive SClk with frequency 125Kbps */
Marcomissyou 0:a2de37bf5f3d 40 Freq_250Kbps, /*!< drive SClk with frequency 250Kbps */
Marcomissyou 0:a2de37bf5f3d 41 Freq_500Kbps, /*!< drive SClk with frequency 500Kbps */
Marcomissyou 0:a2de37bf5f3d 42 Freq_1Mbps, /*!< drive SClk with frequency 1Mbps */
Marcomissyou 0:a2de37bf5f3d 43 Freq_2Mbps, /*!< drive SClk with frequency 2Mbps */
Marcomissyou 0:a2de37bf5f3d 44 Freq_4Mbps, /*!< drive SClk with frequency 4Mbps */
Marcomissyou 0:a2de37bf5f3d 45 Freq_8Mbps /*!< drive SClk with frequency 8Mbps */
Marcomissyou 0:a2de37bf5f3d 46 } SPIFrequency_t;
Marcomissyou 0:a2de37bf5f3d 47
Marcomissyou 0:a2de37bf5f3d 48 /**
Marcomissyou 0:a2de37bf5f3d 49 * SPI master module number
Marcomissyou 0:a2de37bf5f3d 50 */
Marcomissyou 0:a2de37bf5f3d 51 typedef enum
Marcomissyou 0:a2de37bf5f3d 52 {
Marcomissyou 0:a2de37bf5f3d 53 SPI0 = 0, /*!< SPI module 0 */
Marcomissyou 0:a2de37bf5f3d 54 SPI1 /*!< SPI module 1 */
Marcomissyou 0:a2de37bf5f3d 55 } SPIModuleNumber;
Marcomissyou 0:a2de37bf5f3d 56
Marcomissyou 0:a2de37bf5f3d 57 /**
Marcomissyou 0:a2de37bf5f3d 58 * SPI mode
Marcomissyou 0:a2de37bf5f3d 59 */
Marcomissyou 0:a2de37bf5f3d 60 typedef enum
Marcomissyou 0:a2de37bf5f3d 61 {
Marcomissyou 0:a2de37bf5f3d 62 //------------------------Clock polarity 0, Clock starts with level 0-------------------------------------------
Marcomissyou 0:a2de37bf5f3d 63 SPI_MODE0 = 0, /*!< Sample data at rising edge of clock and shift serial data at falling edge */
Marcomissyou 0:a2de37bf5f3d 64 SPI_MODE1, /*!< sample data at falling edge of clock and shift serial data at rising edge */
Marcomissyou 0:a2de37bf5f3d 65 //------------------------Clock polarity 1, Clock starts with level 1-------------------------------------------
Marcomissyou 0:a2de37bf5f3d 66 SPI_MODE2, /*!< sample data at falling edge of clock and shift serial data at rising edge */
Marcomissyou 0:a2de37bf5f3d 67 SPI_MODE3 /*!< Sample data at rising edge of clock and shift serial data at falling edge */
Marcomissyou 0:a2de37bf5f3d 68 } SPIMode;
Marcomissyou 0:a2de37bf5f3d 69
Marcomissyou 0:a2de37bf5f3d 70
Marcomissyou 0:a2de37bf5f3d 71 /**
Marcomissyou 0:a2de37bf5f3d 72 * @brief Function for initializing given SPI master with given configuration.
Marcomissyou 0:a2de37bf5f3d 73 *
Marcomissyou 0:a2de37bf5f3d 74 * After initializing the given SPI master with given configuration, this function also test if the
Marcomissyou 0:a2de37bf5f3d 75 * SPI slave is responding with the configurations by transmitting few test bytes. If the slave did not
Marcomissyou 0:a2de37bf5f3d 76 * respond then error is returned and contents of the rx_data are invalid.
Marcomissyou 0:a2de37bf5f3d 77 *
Marcomissyou 0:a2de37bf5f3d 78 * @param module_number SPI master number (SPIModuleNumber) to initialize.
Marcomissyou 0:a2de37bf5f3d 79 * @param mode SPI master mode (mode 0, 1, 2 or 3 from SPIMode)
Marcomissyou 0:a2de37bf5f3d 80 * @param lsb_first true if lsb is first bit to shift in/out as serial data on MISO/MOSI pins.
Marcomissyou 0:a2de37bf5f3d 81 * @return
Marcomissyou 0:a2de37bf5f3d 82 * @retval pointer to direct physical address of the requested SPI module if init was successful
Marcomissyou 0:a2de37bf5f3d 83 * @retval 0, if either init failed or slave did not respond to the test transfer
Marcomissyou 0:a2de37bf5f3d 84 */
Marcomissyou 0:a2de37bf5f3d 85 uint32_t* spi_master_init(SPIModuleNumber module_number, SPIMode mode, bool lsb_first);
Marcomissyou 0:a2de37bf5f3d 86
Marcomissyou 0:a2de37bf5f3d 87 /**
Marcomissyou 0:a2de37bf5f3d 88 * @brief Function for transferring/receiving data over SPI bus.
Marcomissyou 0:a2de37bf5f3d 89 *
Marcomissyou 0:a2de37bf5f3d 90 * If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued
Marcomissyou 0:a2de37bf5f3d 91 * and the function returns false.
Marcomissyou 0:a2de37bf5f3d 92 *
Marcomissyou 0:a2de37bf5f3d 93 * @note Make sure at least transfer_size number of bytes is allocated in tx_data/rx_data.
Marcomissyou 0:a2de37bf5f3d 94 *
Marcomissyou 0:a2de37bf5f3d 95 * @param spi_base_address register base address of the selected SPI master module
Marcomissyou 0:a2de37bf5f3d 96 * @param transfer_size number of bytes to transmit/receive over SPI master
Marcomissyou 0:a2de37bf5f3d 97 * @param tx_data pointer to the data that needs to be transmitted
Marcomissyou 0:a2de37bf5f3d 98 * @param rx_data pointer to the data that needs to be received
Marcomissyou 0:a2de37bf5f3d 99 * @return
Marcomissyou 0:a2de37bf5f3d 100 * @retval true if transmit/reveive of transfer_size were completed.
Marcomissyou 0:a2de37bf5f3d 101 * @retval false if transmit/reveive of transfer_size were not complete and tx_data/rx_data points to invalid data.
Marcomissyou 0:a2de37bf5f3d 102 */
Marcomissyou 0:a2de37bf5f3d 103 //bool spi_master_tx_rx(uint32_t *spi_base_address, uint16_t transfer_size, const uint8_t *tx_data, uint8_t *rx_data);
Marcomissyou 0:a2de37bf5f3d 104 bool spi_master_tx_rx(SPIModuleNumber module_number, uint16_t transfer_size, const uint8_t *tx_data, uint8_t *rx_data);
Marcomissyou 0:a2de37bf5f3d 105
Marcomissyou 0:a2de37bf5f3d 106 /**
Marcomissyou 0:a2de37bf5f3d 107 *@}
Marcomissyou 0:a2de37bf5f3d 108 **/
Marcomissyou 0:a2de37bf5f3d 109
Marcomissyou 0:a2de37bf5f3d 110 #endif /* SPI_MASTER_H */