Manon Roussey / SDFileSystem

Library for SD card

Dependencies:   FATFileSystem

Dependents:   JARVIS_Ticker_final frdm_gpio frdm_gpio_2_2 HABSensor_2

Fork of SDFileSystem by Alex Vancoillie

SDFileSystem.cpp@0:3bdfc1556537, 2017-03-29 (annotated)

Committer:
AlexVC97
Date:
Wed Mar 29 07:00:22 2017 +0000
Revision:
0:3bdfc1556537
Child:
1:c9bccfde79c1
SDFileSystem Library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AlexVC97 0:3bdfc1556537 1 /* mbed Microcontroller Library
AlexVC97 0:3bdfc1556537 2 * Copyright (c) 2006-2012 ARM Limited
AlexVC97 0:3bdfc1556537 3 *
AlexVC97 0:3bdfc1556537 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
AlexVC97 0:3bdfc1556537 5 * of this software and associated documentation files (the "Software"), to deal
AlexVC97 0:3bdfc1556537 6 * in the Software without restriction, including without limitation the rights
AlexVC97 0:3bdfc1556537 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
AlexVC97 0:3bdfc1556537 8 * copies of the Software, and to permit persons to whom the Software is
AlexVC97 0:3bdfc1556537 9 * furnished to do so, subject to the following conditions:
AlexVC97 0:3bdfc1556537 10 *
AlexVC97 0:3bdfc1556537 11 * The above copyright notice and this permission notice shall be included in
AlexVC97 0:3bdfc1556537 12 * all copies or substantial portions of the Software.
AlexVC97 0:3bdfc1556537 13 *
AlexVC97 0:3bdfc1556537 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
AlexVC97 0:3bdfc1556537 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
AlexVC97 0:3bdfc1556537 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AlexVC97 0:3bdfc1556537 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
AlexVC97 0:3bdfc1556537 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
AlexVC97 0:3bdfc1556537 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
AlexVC97 0:3bdfc1556537 20 * SOFTWARE.
AlexVC97 0:3bdfc1556537 21 */
AlexVC97 0:3bdfc1556537 22 /* Introduction
AlexVC97 0:3bdfc1556537 23 * ------------
AlexVC97 0:3bdfc1556537 24 * SD and MMC cards support a number of interfaces, but common to them all
AlexVC97 0:3bdfc1556537 25 * is one based on SPI. This is the one I'm implmenting because it means
AlexVC97 0:3bdfc1556537 26 * it is much more portable even though not so performant, and we already
AlexVC97 0:3bdfc1556537 27 * have the mbed SPI Interface!
AlexVC97 0:3bdfc1556537 28 *
AlexVC97 0:3bdfc1556537 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
AlexVC97 0:3bdfc1556537 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
AlexVC97 0:3bdfc1556537 31 *
AlexVC97 0:3bdfc1556537 32 * SPI Startup
AlexVC97 0:3bdfc1556537 33 * -----------
AlexVC97 0:3bdfc1556537 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
AlexVC97 0:3bdfc1556537 35 * asserting CS low and sending the reset command (CMD0). The card will
AlexVC97 0:3bdfc1556537 36 * respond with a (R1) response.
AlexVC97 0:3bdfc1556537 37 *
AlexVC97 0:3bdfc1556537 38 * CMD8 is optionally sent to determine the voltage range supported, and
AlexVC97 0:3bdfc1556537 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
AlexVC97 0:3bdfc1556537 40 * version 2.x. I'll just ignore this for now.
AlexVC97 0:3bdfc1556537 41 *
AlexVC97 0:3bdfc1556537 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
AlexVC97 0:3bdfc1556537 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
AlexVC97 0:3bdfc1556537 44 *
AlexVC97 0:3bdfc1556537 45 * You should also indicate whether the host supports High Capicity cards,
AlexVC97 0:3bdfc1556537 46 * and check whether the card is high capacity - i'll also ignore this
AlexVC97 0:3bdfc1556537 47 *
AlexVC97 0:3bdfc1556537 48 * SPI Protocol
AlexVC97 0:3bdfc1556537 49 * ------------
AlexVC97 0:3bdfc1556537 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
AlexVC97 0:3bdfc1556537 51 * the host starting every bus transaction by asserting the CS signal low. The
AlexVC97 0:3bdfc1556537 52 * card always responds to commands, data blocks and errors.
AlexVC97 0:3bdfc1556537 53 *
AlexVC97 0:3bdfc1556537 54 * The protocol supports a CRC, but by default it is off (except for the
AlexVC97 0:3bdfc1556537 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
AlexVC97 0:3bdfc1556537 56 * I'll leave the CRC off I think!
AlexVC97 0:3bdfc1556537 57 *
AlexVC97 0:3bdfc1556537 58 * Standard capacity cards have variable data block sizes, whereas High
AlexVC97 0:3bdfc1556537 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
AlexVC97 0:3bdfc1556537 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
AlexVC97 0:3bdfc1556537 61 * This is set with CMD16.
AlexVC97 0:3bdfc1556537 62 *
AlexVC97 0:3bdfc1556537 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
AlexVC97 0:3bdfc1556537 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
AlexVC97 0:3bdfc1556537 65 * the card gets a read command, it responds with a response token, and then
AlexVC97 0:3bdfc1556537 66 * a data token or an error.
AlexVC97 0:3bdfc1556537 67 *
AlexVC97 0:3bdfc1556537 68 * SPI Command Format
AlexVC97 0:3bdfc1556537 69 * ------------------
AlexVC97 0:3bdfc1556537 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
AlexVC97 0:3bdfc1556537 71 *
AlexVC97 0:3bdfc1556537 72 * +---------------+------------+------------+-----------+----------+--------------+
AlexVC97 0:3bdfc1556537 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
AlexVC97 0:3bdfc1556537 74 * +---------------+------------+------------+-----------+----------+--------------+
AlexVC97 0:3bdfc1556537 75 *
AlexVC97 0:3bdfc1556537 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
AlexVC97 0:3bdfc1556537 77 *
AlexVC97 0:3bdfc1556537 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
AlexVC97 0:3bdfc1556537 79 *
AlexVC97 0:3bdfc1556537 80 * SPI Response Format
AlexVC97 0:3bdfc1556537 81 * -------------------
AlexVC97 0:3bdfc1556537 82 * The main response format (R1) is a status byte (normally zero). Key flags:
AlexVC97 0:3bdfc1556537 83 * idle - 1 if the card is in an idle state/initialising
AlexVC97 0:3bdfc1556537 84 * cmd - 1 if an illegal command code was detected
AlexVC97 0:3bdfc1556537 85 *
AlexVC97 0:3bdfc1556537 86 * +-------------------------------------------------+
AlexVC97 0:3bdfc1556537 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
AlexVC97 0:3bdfc1556537 88 * +-------------------------------------------------+
AlexVC97 0:3bdfc1556537 89 *
AlexVC97 0:3bdfc1556537 90 * R1b is the same, except it is followed by a busy signal (zeros) until
AlexVC97 0:3bdfc1556537 91 * the first non-zero byte when it is ready again.
AlexVC97 0:3bdfc1556537 92 *
AlexVC97 0:3bdfc1556537 93 * Data Response Token
AlexVC97 0:3bdfc1556537 94 * -------------------
AlexVC97 0:3bdfc1556537 95 * Every data block written to the card is acknowledged by a byte
AlexVC97 0:3bdfc1556537 96 * response token
AlexVC97 0:3bdfc1556537 97 *
AlexVC97 0:3bdfc1556537 98 * +----------------------+
AlexVC97 0:3bdfc1556537 99 * | xxx | 0 | status | 1 |
AlexVC97 0:3bdfc1556537 100 * +----------------------+
AlexVC97 0:3bdfc1556537 101 * 010 - OK!
AlexVC97 0:3bdfc1556537 102 * 101 - CRC Error
AlexVC97 0:3bdfc1556537 103 * 110 - Write Error
AlexVC97 0:3bdfc1556537 104 *
AlexVC97 0:3bdfc1556537 105 * Single Block Read and Write
AlexVC97 0:3bdfc1556537 106 * ---------------------------
AlexVC97 0:3bdfc1556537 107 *
AlexVC97 0:3bdfc1556537 108 * Block transfers have a byte header, followed by the data, followed
AlexVC97 0:3bdfc1556537 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
AlexVC97 0:3bdfc1556537 110 *
AlexVC97 0:3bdfc1556537 111 * +------+---------+---------+- - - -+---------+-----------+----------+
AlexVC97 0:3bdfc1556537 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
AlexVC97 0:3bdfc1556537 113 * +------+---------+---------+- - - -+---------+-----------+----------+
AlexVC97 0:3bdfc1556537 114 */
AlexVC97 0:3bdfc1556537 115 #include "SDFileSystem.h"
AlexVC97 0:3bdfc1556537 116 #include "mbed_debug.h"
AlexVC97 0:3bdfc1556537 117
AlexVC97 0:3bdfc1556537 118 #define SD_COMMAND_TIMEOUT 5000
AlexVC97 0:3bdfc1556537 119
AlexVC97 0:3bdfc1556537 120 #define SD_DBG 0
AlexVC97 0:3bdfc1556537 121
AlexVC97 0:3bdfc1556537 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
AlexVC97 0:3bdfc1556537 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
AlexVC97 0:3bdfc1556537 124 _cs = 1;
AlexVC97 0:3bdfc1556537 125
AlexVC97 0:3bdfc1556537 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
AlexVC97 0:3bdfc1556537 127 _init_sck = 100000;
AlexVC97 0:3bdfc1556537 128 _transfer_sck = 1000000;
AlexVC97 0:3bdfc1556537 129 }
AlexVC97 0:3bdfc1556537 130
AlexVC97 0:3bdfc1556537 131 #define R1_IDLE_STATE (1 << 0)
AlexVC97 0:3bdfc1556537 132 #define R1_ERASE_RESET (1 << 1)
AlexVC97 0:3bdfc1556537 133 #define R1_ILLEGAL_COMMAND (1 << 2)
AlexVC97 0:3bdfc1556537 134 #define R1_COM_CRC_ERROR (1 << 3)
AlexVC97 0:3bdfc1556537 135 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
AlexVC97 0:3bdfc1556537 136 #define R1_ADDRESS_ERROR (1 << 5)
AlexVC97 0:3bdfc1556537 137 #define R1_PARAMETER_ERROR (1 << 6)
AlexVC97 0:3bdfc1556537 138
AlexVC97 0:3bdfc1556537 139 // Types
AlexVC97 0:3bdfc1556537 140 // - v1.x Standard Capacity
AlexVC97 0:3bdfc1556537 141 // - v2.x Standard Capacity
AlexVC97 0:3bdfc1556537 142 // - v2.x High Capacity
AlexVC97 0:3bdfc1556537 143 // - Not recognised as an SD Card
AlexVC97 0:3bdfc1556537 144 #define SDCARD_FAIL 0
AlexVC97 0:3bdfc1556537 145 #define SDCARD_V1 1
AlexVC97 0:3bdfc1556537 146 #define SDCARD_V2 2
AlexVC97 0:3bdfc1556537 147 #define SDCARD_V2HC 3
AlexVC97 0:3bdfc1556537 148
AlexVC97 0:3bdfc1556537 149 int SDFileSystem::initialise_card() {
AlexVC97 0:3bdfc1556537 150 // Set to SCK for initialisation, and clock card with cs = 1
AlexVC97 0:3bdfc1556537 151 _spi.frequency(_init_sck);
AlexVC97 0:3bdfc1556537 152 _cs = 1;
AlexVC97 0:3bdfc1556537 153 for (int i = 0; i < 16; i++) {
AlexVC97 0:3bdfc1556537 154 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 155 }
AlexVC97 0:3bdfc1556537 156
AlexVC97 0:3bdfc1556537 157 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
AlexVC97 0:3bdfc1556537 158 if (_cmd(0, 0) != R1_IDLE_STATE) {
AlexVC97 0:3bdfc1556537 159 debug("No disk, or could not put SD card in to SPI idle state\n");
AlexVC97 0:3bdfc1556537 160 return SDCARD_FAIL;
AlexVC97 0:3bdfc1556537 161 }
AlexVC97 0:3bdfc1556537 162
AlexVC97 0:3bdfc1556537 163 // send CMD8 to determine whther it is ver 2.x
AlexVC97 0:3bdfc1556537 164 int r = _cmd8();
AlexVC97 0:3bdfc1556537 165 if (r == R1_IDLE_STATE) {
AlexVC97 0:3bdfc1556537 166 return initialise_card_v2();
AlexVC97 0:3bdfc1556537 167 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
AlexVC97 0:3bdfc1556537 168 return initialise_card_v1();
AlexVC97 0:3bdfc1556537 169 } else {
AlexVC97 0:3bdfc1556537 170 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
AlexVC97 0:3bdfc1556537 171 return SDCARD_FAIL;
AlexVC97 0:3bdfc1556537 172 }
AlexVC97 0:3bdfc1556537 173 }
AlexVC97 0:3bdfc1556537 174
AlexVC97 0:3bdfc1556537 175 int SDFileSystem::initialise_card_v1() {
AlexVC97 0:3bdfc1556537 176 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
AlexVC97 0:3bdfc1556537 177 _cmd(55, 0);
AlexVC97 0:3bdfc1556537 178 if (_cmd(41, 0) == 0) {
AlexVC97 0:3bdfc1556537 179 cdv = 512;
AlexVC97 0:3bdfc1556537 180 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
AlexVC97 0:3bdfc1556537 181 return SDCARD_V1;
AlexVC97 0:3bdfc1556537 182 }
AlexVC97 0:3bdfc1556537 183 }
AlexVC97 0:3bdfc1556537 184
AlexVC97 0:3bdfc1556537 185 debug("Timeout waiting for v1.x card\n");
AlexVC97 0:3bdfc1556537 186 return SDCARD_FAIL;
AlexVC97 0:3bdfc1556537 187 }
AlexVC97 0:3bdfc1556537 188
AlexVC97 0:3bdfc1556537 189 int SDFileSystem::initialise_card_v2() {
AlexVC97 0:3bdfc1556537 190 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
AlexVC97 0:3bdfc1556537 191 wait_ms(50);
AlexVC97 0:3bdfc1556537 192 _cmd58();
AlexVC97 0:3bdfc1556537 193 _cmd(55, 0);
AlexVC97 0:3bdfc1556537 194 if (_cmd(41, 0x40000000) == 0) {
AlexVC97 0:3bdfc1556537 195 _cmd58();
AlexVC97 0:3bdfc1556537 196 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
AlexVC97 0:3bdfc1556537 197 cdv = 1;
AlexVC97 0:3bdfc1556537 198 return SDCARD_V2;
AlexVC97 0:3bdfc1556537 199 }
AlexVC97 0:3bdfc1556537 200 }
AlexVC97 0:3bdfc1556537 201
AlexVC97 0:3bdfc1556537 202 debug("Timeout waiting for v2.x card\n");
AlexVC97 0:3bdfc1556537 203 return SDCARD_FAIL;
AlexVC97 0:3bdfc1556537 204 }
AlexVC97 0:3bdfc1556537 205
AlexVC97 0:3bdfc1556537 206 int SDFileSystem::disk_initialize() {
AlexVC97 0:3bdfc1556537 207 _is_initialized = initialise_card();
AlexVC97 0:3bdfc1556537 208 if (_is_initialized == 0) {
AlexVC97 0:3bdfc1556537 209 debug("Fail to initialize card\n");
AlexVC97 0:3bdfc1556537 210 return 1;
AlexVC97 0:3bdfc1556537 211 }
AlexVC97 0:3bdfc1556537 212 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
AlexVC97 0:3bdfc1556537 213 _sectors = _sd_sectors();
AlexVC97 0:3bdfc1556537 214
AlexVC97 0:3bdfc1556537 215 // Set block length to 512 (CMD16)
AlexVC97 0:3bdfc1556537 216 if (_cmd(16, 512) != 0) {
AlexVC97 0:3bdfc1556537 217 debug("Set 512-byte block timed out\n");
AlexVC97 0:3bdfc1556537 218 return 1;
AlexVC97 0:3bdfc1556537 219 }
AlexVC97 0:3bdfc1556537 220
AlexVC97 0:3bdfc1556537 221 // Set SCK for data transfer
AlexVC97 0:3bdfc1556537 222 _spi.frequency(_transfer_sck);
AlexVC97 0:3bdfc1556537 223 return 0;
AlexVC97 0:3bdfc1556537 224 }
AlexVC97 0:3bdfc1556537 225
AlexVC97 0:3bdfc1556537 226 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
AlexVC97 0:3bdfc1556537 227 if (!_is_initialized) {
AlexVC97 0:3bdfc1556537 228 return -1;
AlexVC97 0:3bdfc1556537 229 }
AlexVC97 0:3bdfc1556537 230
AlexVC97 0:3bdfc1556537 231 for (uint32_t b = block_number; b < block_number + count; b++) {
AlexVC97 0:3bdfc1556537 232 // set write address for single block (CMD24)
AlexVC97 0:3bdfc1556537 233 if (_cmd(24, b * cdv) != 0) {
AlexVC97 0:3bdfc1556537 234 return 1;
AlexVC97 0:3bdfc1556537 235 }
AlexVC97 0:3bdfc1556537 236
AlexVC97 0:3bdfc1556537 237 // send the data block
AlexVC97 0:3bdfc1556537 238 _write(buffer, 512);
AlexVC97 0:3bdfc1556537 239 buffer += 512;
AlexVC97 0:3bdfc1556537 240 }
AlexVC97 0:3bdfc1556537 241
AlexVC97 0:3bdfc1556537 242 return 0;
AlexVC97 0:3bdfc1556537 243 }
AlexVC97 0:3bdfc1556537 244
AlexVC97 0:3bdfc1556537 245 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
AlexVC97 0:3bdfc1556537 246 if (!_is_initialized) {
AlexVC97 0:3bdfc1556537 247 return -1;
AlexVC97 0:3bdfc1556537 248 }
AlexVC97 0:3bdfc1556537 249
AlexVC97 0:3bdfc1556537 250 for (uint32_t b = block_number; b < block_number + count; b++) {
AlexVC97 0:3bdfc1556537 251 // set read address for single block (CMD17)
AlexVC97 0:3bdfc1556537 252 if (_cmd(17, b * cdv) != 0) {
AlexVC97 0:3bdfc1556537 253 return 1;
AlexVC97 0:3bdfc1556537 254 }
AlexVC97 0:3bdfc1556537 255
AlexVC97 0:3bdfc1556537 256 // receive the data
AlexVC97 0:3bdfc1556537 257 _read(buffer, 512);
AlexVC97 0:3bdfc1556537 258 buffer += 512;
AlexVC97 0:3bdfc1556537 259 }
AlexVC97 0:3bdfc1556537 260
AlexVC97 0:3bdfc1556537 261 return 0;
AlexVC97 0:3bdfc1556537 262 }
AlexVC97 0:3bdfc1556537 263
AlexVC97 0:3bdfc1556537 264 int SDFileSystem::disk_status() {
AlexVC97 0:3bdfc1556537 265 // FATFileSystem::disk_status() returns 0 when initialized
AlexVC97 0:3bdfc1556537 266 if (_is_initialized) {
AlexVC97 0:3bdfc1556537 267 return 0;
AlexVC97 0:3bdfc1556537 268 } else {
AlexVC97 0:3bdfc1556537 269 return 1;
AlexVC97 0:3bdfc1556537 270 }
AlexVC97 0:3bdfc1556537 271 }
AlexVC97 0:3bdfc1556537 272
AlexVC97 0:3bdfc1556537 273 int SDFileSystem::disk_sync() { return 0; }
AlexVC97 0:3bdfc1556537 274 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
AlexVC97 0:3bdfc1556537 275
AlexVC97 0:3bdfc1556537 276
AlexVC97 0:3bdfc1556537 277 // PRIVATE FUNCTIONS
AlexVC97 0:3bdfc1556537 278 int SDFileSystem::_cmd(int cmd, int arg) {
AlexVC97 0:3bdfc1556537 279 _cs = 0;
AlexVC97 0:3bdfc1556537 280
AlexVC97 0:3bdfc1556537 281 // send a command
AlexVC97 0:3bdfc1556537 282 _spi.write(0x40 | cmd);
AlexVC97 0:3bdfc1556537 283 _spi.write(arg >> 24);
AlexVC97 0:3bdfc1556537 284 _spi.write(arg >> 16);
AlexVC97 0:3bdfc1556537 285 _spi.write(arg >> 8);
AlexVC97 0:3bdfc1556537 286 _spi.write(arg >> 0);
AlexVC97 0:3bdfc1556537 287 _spi.write(0x95);
AlexVC97 0:3bdfc1556537 288
AlexVC97 0:3bdfc1556537 289 // wait for the repsonse (response[7] == 0)
AlexVC97 0:3bdfc1556537 290 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
AlexVC97 0:3bdfc1556537 291 int response = _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 292 if (!(response & 0x80)) {
AlexVC97 0:3bdfc1556537 293 _cs = 1;
AlexVC97 0:3bdfc1556537 294 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 295 return response;
AlexVC97 0:3bdfc1556537 296 }
AlexVC97 0:3bdfc1556537 297 }
AlexVC97 0:3bdfc1556537 298 _cs = 1;
AlexVC97 0:3bdfc1556537 299 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 300 return -1; // timeout
AlexVC97 0:3bdfc1556537 301 }
AlexVC97 0:3bdfc1556537 302 int SDFileSystem::_cmdx(int cmd, int arg) {
AlexVC97 0:3bdfc1556537 303 _cs = 0;
AlexVC97 0:3bdfc1556537 304
AlexVC97 0:3bdfc1556537 305 // send a command
AlexVC97 0:3bdfc1556537 306 _spi.write(0x40 | cmd);
AlexVC97 0:3bdfc1556537 307 _spi.write(arg >> 24);
AlexVC97 0:3bdfc1556537 308 _spi.write(arg >> 16);
AlexVC97 0:3bdfc1556537 309 _spi.write(arg >> 8);
AlexVC97 0:3bdfc1556537 310 _spi.write(arg >> 0);
AlexVC97 0:3bdfc1556537 311 _spi.write(0x95);
AlexVC97 0:3bdfc1556537 312
AlexVC97 0:3bdfc1556537 313 // wait for the repsonse (response[7] == 0)
AlexVC97 0:3bdfc1556537 314 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
AlexVC97 0:3bdfc1556537 315 int response = _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 316 if (!(response & 0x80)) {
AlexVC97 0:3bdfc1556537 317 return response;
AlexVC97 0:3bdfc1556537 318 }
AlexVC97 0:3bdfc1556537 319 }
AlexVC97 0:3bdfc1556537 320 _cs = 1;
AlexVC97 0:3bdfc1556537 321 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 322 return -1; // timeout
AlexVC97 0:3bdfc1556537 323 }
AlexVC97 0:3bdfc1556537 324
AlexVC97 0:3bdfc1556537 325
AlexVC97 0:3bdfc1556537 326 int SDFileSystem::_cmd58() {
AlexVC97 0:3bdfc1556537 327 _cs = 0;
AlexVC97 0:3bdfc1556537 328 int arg = 0;
AlexVC97 0:3bdfc1556537 329
AlexVC97 0:3bdfc1556537 330 // send a command
AlexVC97 0:3bdfc1556537 331 _spi.write(0x40 | 58);
AlexVC97 0:3bdfc1556537 332 _spi.write(arg >> 24);
AlexVC97 0:3bdfc1556537 333 _spi.write(arg >> 16);
AlexVC97 0:3bdfc1556537 334 _spi.write(arg >> 8);
AlexVC97 0:3bdfc1556537 335 _spi.write(arg >> 0);
AlexVC97 0:3bdfc1556537 336 _spi.write(0x95);
AlexVC97 0:3bdfc1556537 337
AlexVC97 0:3bdfc1556537 338 // wait for the repsonse (response[7] == 0)
AlexVC97 0:3bdfc1556537 339 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
AlexVC97 0:3bdfc1556537 340 int response = _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 341 if (!(response & 0x80)) {
AlexVC97 0:3bdfc1556537 342 int ocr = _spi.write(0xFF) << 24;
AlexVC97 0:3bdfc1556537 343 ocr |= _spi.write(0xFF) << 16;
AlexVC97 0:3bdfc1556537 344 ocr |= _spi.write(0xFF) << 8;
AlexVC97 0:3bdfc1556537 345 ocr |= _spi.write(0xFF) << 0;
AlexVC97 0:3bdfc1556537 346 _cs = 1;
AlexVC97 0:3bdfc1556537 347 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 348 return response;
AlexVC97 0:3bdfc1556537 349 }
AlexVC97 0:3bdfc1556537 350 }
AlexVC97 0:3bdfc1556537 351 _cs = 1;
AlexVC97 0:3bdfc1556537 352 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 353 return -1; // timeout
AlexVC97 0:3bdfc1556537 354 }
AlexVC97 0:3bdfc1556537 355
AlexVC97 0:3bdfc1556537 356 int SDFileSystem::_cmd8() {
AlexVC97 0:3bdfc1556537 357 _cs = 0;
AlexVC97 0:3bdfc1556537 358
AlexVC97 0:3bdfc1556537 359 // send a command
AlexVC97 0:3bdfc1556537 360 _spi.write(0x40 | 8); // CMD8
AlexVC97 0:3bdfc1556537 361 _spi.write(0x00); // reserved
AlexVC97 0:3bdfc1556537 362 _spi.write(0x00); // reserved
AlexVC97 0:3bdfc1556537 363 _spi.write(0x01); // 3.3v
AlexVC97 0:3bdfc1556537 364 _spi.write(0xAA); // check pattern
AlexVC97 0:3bdfc1556537 365 _spi.write(0x87); // crc
AlexVC97 0:3bdfc1556537 366
AlexVC97 0:3bdfc1556537 367 // wait for the repsonse (response[7] == 0)
AlexVC97 0:3bdfc1556537 368 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
AlexVC97 0:3bdfc1556537 369 char response[5];
AlexVC97 0:3bdfc1556537 370 response[0] = _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 371 if (!(response[0] & 0x80)) {
AlexVC97 0:3bdfc1556537 372 for (int j = 1; j < 5; j++) {
AlexVC97 0:3bdfc1556537 373 response[i] = _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 374 }
AlexVC97 0:3bdfc1556537 375 _cs = 1;
AlexVC97 0:3bdfc1556537 376 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 377 return response[0];
AlexVC97 0:3bdfc1556537 378 }
AlexVC97 0:3bdfc1556537 379 }
AlexVC97 0:3bdfc1556537 380 _cs = 1;
AlexVC97 0:3bdfc1556537 381 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 382 return -1; // timeout
AlexVC97 0:3bdfc1556537 383 }
AlexVC97 0:3bdfc1556537 384
AlexVC97 0:3bdfc1556537 385 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
AlexVC97 0:3bdfc1556537 386 _cs = 0;
AlexVC97 0:3bdfc1556537 387
AlexVC97 0:3bdfc1556537 388 // read until start byte (0xFF)
AlexVC97 0:3bdfc1556537 389 while (_spi.write(0xFF) != 0xFE);
AlexVC97 0:3bdfc1556537 390
AlexVC97 0:3bdfc1556537 391 // read data
AlexVC97 0:3bdfc1556537 392 for (uint32_t i = 0; i < length; i++) {
AlexVC97 0:3bdfc1556537 393 buffer[i] = _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 394 }
AlexVC97 0:3bdfc1556537 395 _spi.write(0xFF); // checksum
AlexVC97 0:3bdfc1556537 396 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 397
AlexVC97 0:3bdfc1556537 398 _cs = 1;
AlexVC97 0:3bdfc1556537 399 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 400 return 0;
AlexVC97 0:3bdfc1556537 401 }
AlexVC97 0:3bdfc1556537 402
AlexVC97 0:3bdfc1556537 403 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
AlexVC97 0:3bdfc1556537 404 _cs = 0;
AlexVC97 0:3bdfc1556537 405
AlexVC97 0:3bdfc1556537 406 // indicate start of block
AlexVC97 0:3bdfc1556537 407 _spi.write(0xFE);
AlexVC97 0:3bdfc1556537 408
AlexVC97 0:3bdfc1556537 409 // write the data
AlexVC97 0:3bdfc1556537 410 for (uint32_t i = 0; i < length; i++) {
AlexVC97 0:3bdfc1556537 411 _spi.write(buffer[i]);
AlexVC97 0:3bdfc1556537 412 }
AlexVC97 0:3bdfc1556537 413
AlexVC97 0:3bdfc1556537 414 // write the checksum
AlexVC97 0:3bdfc1556537 415 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 416 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 417
AlexVC97 0:3bdfc1556537 418 // check the response token
AlexVC97 0:3bdfc1556537 419 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
AlexVC97 0:3bdfc1556537 420 _cs = 1;
AlexVC97 0:3bdfc1556537 421 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 422 return 1;
AlexVC97 0:3bdfc1556537 423 }
AlexVC97 0:3bdfc1556537 424
AlexVC97 0:3bdfc1556537 425 // wait for write to finish
AlexVC97 0:3bdfc1556537 426 while (_spi.write(0xFF) == 0);
AlexVC97 0:3bdfc1556537 427
AlexVC97 0:3bdfc1556537 428 _cs = 1;
AlexVC97 0:3bdfc1556537 429 _spi.write(0xFF);
AlexVC97 0:3bdfc1556537 430 return 0;
AlexVC97 0:3bdfc1556537 431 }
AlexVC97 0:3bdfc1556537 432
AlexVC97 0:3bdfc1556537 433 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
AlexVC97 0:3bdfc1556537 434 uint32_t bits = 0;
AlexVC97 0:3bdfc1556537 435 uint32_t size = 1 + msb - lsb;
AlexVC97 0:3bdfc1556537 436 for (uint32_t i = 0; i < size; i++) {
AlexVC97 0:3bdfc1556537 437 uint32_t position = lsb + i;
AlexVC97 0:3bdfc1556537 438 uint32_t byte = 15 - (position >> 3);
AlexVC97 0:3bdfc1556537 439 uint32_t bit = position & 0x7;
AlexVC97 0:3bdfc1556537 440 uint32_t value = (data[byte] >> bit) & 1;
AlexVC97 0:3bdfc1556537 441 bits |= value << i;
AlexVC97 0:3bdfc1556537 442 }
AlexVC97 0:3bdfc1556537 443 return bits;
AlexVC97 0:3bdfc1556537 444 }
AlexVC97 0:3bdfc1556537 445
AlexVC97 0:3bdfc1556537 446 uint32_t SDFileSystem::_sd_sectors() {
AlexVC97 0:3bdfc1556537 447 uint32_t c_size, c_size_mult, read_bl_len;
AlexVC97 0:3bdfc1556537 448 uint32_t block_len, mult, blocknr, capacity;
AlexVC97 0:3bdfc1556537 449 uint32_t hc_c_size;
AlexVC97 0:3bdfc1556537 450 uint32_t blocks;
AlexVC97 0:3bdfc1556537 451
AlexVC97 0:3bdfc1556537 452 // CMD9, Response R2 (R1 byte + 16-byte block read)
AlexVC97 0:3bdfc1556537 453 if (_cmdx(9, 0) != 0) {
AlexVC97 0:3bdfc1556537 454 debug("Didn't get a response from the disk\n");
AlexVC97 0:3bdfc1556537 455 return 0;
AlexVC97 0:3bdfc1556537 456 }
AlexVC97 0:3bdfc1556537 457
AlexVC97 0:3bdfc1556537 458 uint8_t csd[16];
AlexVC97 0:3bdfc1556537 459 if (_read(csd, 16) != 0) {
AlexVC97 0:3bdfc1556537 460 debug("Couldn't read csd response from disk\n");
AlexVC97 0:3bdfc1556537 461 return 0;
AlexVC97 0:3bdfc1556537 462 }
AlexVC97 0:3bdfc1556537 463
AlexVC97 0:3bdfc1556537 464 // csd_structure : csd[127:126]
AlexVC97 0:3bdfc1556537 465 // c_size : csd[73:62]
AlexVC97 0:3bdfc1556537 466 // c_size_mult : csd[49:47]
AlexVC97 0:3bdfc1556537 467 // read_bl_len : csd[83:80] - the *maximum* read block length
AlexVC97 0:3bdfc1556537 468
AlexVC97 0:3bdfc1556537 469 int csd_structure = ext_bits(csd, 127, 126);
AlexVC97 0:3bdfc1556537 470
AlexVC97 0:3bdfc1556537 471 switch (csd_structure) {
AlexVC97 0:3bdfc1556537 472 case 0:
AlexVC97 0:3bdfc1556537 473 cdv = 512;
AlexVC97 0:3bdfc1556537 474 c_size = ext_bits(csd, 73, 62);
AlexVC97 0:3bdfc1556537 475 c_size_mult = ext_bits(csd, 49, 47);
AlexVC97 0:3bdfc1556537 476 read_bl_len = ext_bits(csd, 83, 80);
AlexVC97 0:3bdfc1556537 477
AlexVC97 0:3bdfc1556537 478 block_len = 1 << read_bl_len;
AlexVC97 0:3bdfc1556537 479 mult = 1 << (c_size_mult + 2);
AlexVC97 0:3bdfc1556537 480 blocknr = (c_size + 1) * mult;
AlexVC97 0:3bdfc1556537 481 capacity = blocknr * block_len;
AlexVC97 0:3bdfc1556537 482 blocks = capacity / 512;
AlexVC97 0:3bdfc1556537 483 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
AlexVC97 0:3bdfc1556537 484 break;
AlexVC97 0:3bdfc1556537 485
AlexVC97 0:3bdfc1556537 486 case 1:
AlexVC97 0:3bdfc1556537 487 cdv = 1;
AlexVC97 0:3bdfc1556537 488 hc_c_size = ext_bits(csd, 63, 48);
AlexVC97 0:3bdfc1556537 489 blocks = (hc_c_size+1)*1024;
AlexVC97 0:3bdfc1556537 490 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
AlexVC97 0:3bdfc1556537 491 break;
AlexVC97 0:3bdfc1556537 492
AlexVC97 0:3bdfc1556537 493 default:
AlexVC97 0:3bdfc1556537 494 debug("CSD struct unsupported\r\n");
AlexVC97 0:3bdfc1556537 495 return 0;
AlexVC97 0:3bdfc1556537 496 };
AlexVC97 0:3bdfc1556537 497 return blocks;
AlexVC97 0:3bdfc1556537 498 }