Easily add all supported connectivity methods to your mbed OS project

Dependencies:   type-yd-driver

Committer:
MACRUM
Date:
Wed Jul 12 10:52:58 2017 +0000
Revision:
0:615f90842ce8
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MACRUM 0:615f90842ce8 1 /*!
MACRUM 0:615f90842ce8 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
MACRUM 0:615f90842ce8 3 * All rights reserved.
MACRUM 0:615f90842ce8 4 *
MACRUM 0:615f90842ce8 5 * \file MCR20Drv.h
MACRUM 0:615f90842ce8 6 *
MACRUM 0:615f90842ce8 7 * Redistribution and use in source and binary forms, with or without modification,
MACRUM 0:615f90842ce8 8 * are permitted provided that the following conditions are met:
MACRUM 0:615f90842ce8 9 *
MACRUM 0:615f90842ce8 10 * o Redistributions of source code must retain the above copyright notice, this list
MACRUM 0:615f90842ce8 11 * of conditions and the following disclaimer.
MACRUM 0:615f90842ce8 12 *
MACRUM 0:615f90842ce8 13 * o Redistributions in binary form must reproduce the above copyright notice, this
MACRUM 0:615f90842ce8 14 * list of conditions and the following disclaimer in the documentation and/or
MACRUM 0:615f90842ce8 15 * other materials provided with the distribution.
MACRUM 0:615f90842ce8 16 *
MACRUM 0:615f90842ce8 17 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
MACRUM 0:615f90842ce8 18 * contributors may be used to endorse or promote products derived from this
MACRUM 0:615f90842ce8 19 * software without specific prior written permission.
MACRUM 0:615f90842ce8 20 *
MACRUM 0:615f90842ce8 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
MACRUM 0:615f90842ce8 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
MACRUM 0:615f90842ce8 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
MACRUM 0:615f90842ce8 24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
MACRUM 0:615f90842ce8 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
MACRUM 0:615f90842ce8 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
MACRUM 0:615f90842ce8 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
MACRUM 0:615f90842ce8 28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
MACRUM 0:615f90842ce8 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
MACRUM 0:615f90842ce8 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
MACRUM 0:615f90842ce8 31 */
MACRUM 0:615f90842ce8 32
MACRUM 0:615f90842ce8 33 #ifndef __MCR20_DRV_H__
MACRUM 0:615f90842ce8 34 #define __MCR20_DRV_H__
MACRUM 0:615f90842ce8 35
MACRUM 0:615f90842ce8 36
MACRUM 0:615f90842ce8 37 /*****************************************************************************
MACRUM 0:615f90842ce8 38 * INCLUDED HEADERS *
MACRUM 0:615f90842ce8 39 *---------------------------------------------------------------------------*
MACRUM 0:615f90842ce8 40 * Add to this section all the headers that this module needs to include. *
MACRUM 0:615f90842ce8 41 * Note that it is not a good practice to include header files into header *
MACRUM 0:615f90842ce8 42 * files, so use this section only if there is no other better solution. *
MACRUM 0:615f90842ce8 43 *---------------------------------------------------------------------------*
MACRUM 0:615f90842ce8 44 *****************************************************************************/
MACRUM 0:615f90842ce8 45
MACRUM 0:615f90842ce8 46 /*****************************************************************************
MACRUM 0:615f90842ce8 47 * PRIVATE MACROS *
MACRUM 0:615f90842ce8 48 *---------------------------------------------------------------------------*
MACRUM 0:615f90842ce8 49 * Add to this section all the access macros, registers mappings, bit access *
MACRUM 0:615f90842ce8 50 * macros, masks, flags etc ...
MACRUM 0:615f90842ce8 51 *---------------------------------------------------------------------------*
MACRUM 0:615f90842ce8 52 *****************************************************************************/
MACRUM 0:615f90842ce8 53
MACRUM 0:615f90842ce8 54 /* Disable XCVR clock output by default, to reduce power consumption */
MACRUM 0:615f90842ce8 55 #ifndef gMCR20_ClkOutFreq_d
MACRUM 0:615f90842ce8 56 #define gMCR20_ClkOutFreq_d gCLK_OUT_FREQ_DISABLE
MACRUM 0:615f90842ce8 57 #endif
MACRUM 0:615f90842ce8 58
MACRUM 0:615f90842ce8 59 /*****************************************************************************
MACRUM 0:615f90842ce8 60 * PUBLIC FUNCTIONS *
MACRUM 0:615f90842ce8 61 *---------------------------------------------------------------------------*
MACRUM 0:615f90842ce8 62 * Add to this section all the global functions prototype preceded (as a *
MACRUM 0:615f90842ce8 63 * good practice) by the keyword 'extern' *
MACRUM 0:615f90842ce8 64 *---------------------------------------------------------------------------*
MACRUM 0:615f90842ce8 65 *****************************************************************************/
MACRUM 0:615f90842ce8 66
MACRUM 0:615f90842ce8 67 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 68 * Name: MCR20Drv_Init
MACRUM 0:615f90842ce8 69 * Description: -
MACRUM 0:615f90842ce8 70 * Parameters: -
MACRUM 0:615f90842ce8 71 * Return: -
MACRUM 0:615f90842ce8 72 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 73 extern void MCR20Drv_Init
MACRUM 0:615f90842ce8 74 (
MACRUM 0:615f90842ce8 75 void
MACRUM 0:615f90842ce8 76 );
MACRUM 0:615f90842ce8 77
MACRUM 0:615f90842ce8 78 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 79 * Name: MCR20Drv_SPI_DMA_Init
MACRUM 0:615f90842ce8 80 * Description: -
MACRUM 0:615f90842ce8 81 * Parameters: -
MACRUM 0:615f90842ce8 82 * Return: -
MACRUM 0:615f90842ce8 83 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 84 void MCR20Drv_SPI_DMA_Init
MACRUM 0:615f90842ce8 85 (
MACRUM 0:615f90842ce8 86 void
MACRUM 0:615f90842ce8 87 );
MACRUM 0:615f90842ce8 88
MACRUM 0:615f90842ce8 89 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 90 * Name: MCR20Drv_Start_PB_DMA_SPI_Write
MACRUM 0:615f90842ce8 91 * Description: -
MACRUM 0:615f90842ce8 92 * Parameters: -
MACRUM 0:615f90842ce8 93 * Return: -
MACRUM 0:615f90842ce8 94 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 95 void MCR20Drv_Start_PB_DMA_SPI_Write
MACRUM 0:615f90842ce8 96 (
MACRUM 0:615f90842ce8 97 uint8_t * srcAddress,
MACRUM 0:615f90842ce8 98 uint8_t numOfBytes
MACRUM 0:615f90842ce8 99 );
MACRUM 0:615f90842ce8 100
MACRUM 0:615f90842ce8 101 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 102 * Name: MCR20Drv_Start_PB_DMA_SPI_Read
MACRUM 0:615f90842ce8 103 * Description: -
MACRUM 0:615f90842ce8 104 * Parameters: -
MACRUM 0:615f90842ce8 105 * Return: -
MACRUM 0:615f90842ce8 106 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 107 void MCR20Drv_Start_PB_DMA_SPI_Read
MACRUM 0:615f90842ce8 108 (
MACRUM 0:615f90842ce8 109 uint8_t * dstAddress,
MACRUM 0:615f90842ce8 110 uint8_t numOfBytes
MACRUM 0:615f90842ce8 111 );
MACRUM 0:615f90842ce8 112
MACRUM 0:615f90842ce8 113 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 114 * Name: MCR20Drv_DirectAccessSPIWrite
MACRUM 0:615f90842ce8 115 * Description: -
MACRUM 0:615f90842ce8 116 * Parameters: -
MACRUM 0:615f90842ce8 117 * Return: -
MACRUM 0:615f90842ce8 118 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 119 void MCR20Drv_DirectAccessSPIWrite
MACRUM 0:615f90842ce8 120 (
MACRUM 0:615f90842ce8 121 uint8_t address,
MACRUM 0:615f90842ce8 122 uint8_t value
MACRUM 0:615f90842ce8 123 );
MACRUM 0:615f90842ce8 124
MACRUM 0:615f90842ce8 125 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 126 * Name: MCR20Drv_DirectAccessSPIMultiByteWrite
MACRUM 0:615f90842ce8 127 * Description: -
MACRUM 0:615f90842ce8 128 * Parameters: -
MACRUM 0:615f90842ce8 129 * Return: -
MACRUM 0:615f90842ce8 130 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 131 void MCR20Drv_DirectAccessSPIMultiByteWrite
MACRUM 0:615f90842ce8 132 (
MACRUM 0:615f90842ce8 133 uint8_t startAddress,
MACRUM 0:615f90842ce8 134 uint8_t * byteArray,
MACRUM 0:615f90842ce8 135 uint8_t numOfBytes
MACRUM 0:615f90842ce8 136 );
MACRUM 0:615f90842ce8 137
MACRUM 0:615f90842ce8 138 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 139 * Name: MCR20Drv_PB_SPIBurstWrite
MACRUM 0:615f90842ce8 140 * Description: -
MACRUM 0:615f90842ce8 141 * Parameters: -
MACRUM 0:615f90842ce8 142 * Return: -
MACRUM 0:615f90842ce8 143 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 144 void MCR20Drv_PB_SPIBurstWrite
MACRUM 0:615f90842ce8 145 (
MACRUM 0:615f90842ce8 146 uint8_t * byteArray,
MACRUM 0:615f90842ce8 147 uint8_t numOfBytes
MACRUM 0:615f90842ce8 148 );
MACRUM 0:615f90842ce8 149
MACRUM 0:615f90842ce8 150 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 151 * Name: MCR20Drv_DirectAccessSPIRead
MACRUM 0:615f90842ce8 152 * Description: -
MACRUM 0:615f90842ce8 153 * Parameters: -
MACRUM 0:615f90842ce8 154 * Return: -
MACRUM 0:615f90842ce8 155 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 156 uint8_t MCR20Drv_DirectAccessSPIRead
MACRUM 0:615f90842ce8 157 (
MACRUM 0:615f90842ce8 158 uint8_t address
MACRUM 0:615f90842ce8 159 );
MACRUM 0:615f90842ce8 160
MACRUM 0:615f90842ce8 161 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 162 * Name: MCR20Drv_DirectAccessSPIMultyByteRead
MACRUM 0:615f90842ce8 163 * Description: -
MACRUM 0:615f90842ce8 164 * Parameters: -
MACRUM 0:615f90842ce8 165 * Return: -
MACRUM 0:615f90842ce8 166 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 167
MACRUM 0:615f90842ce8 168 uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
MACRUM 0:615f90842ce8 169 (
MACRUM 0:615f90842ce8 170 uint8_t startAddress,
MACRUM 0:615f90842ce8 171 uint8_t * byteArray,
MACRUM 0:615f90842ce8 172 uint8_t numOfBytes
MACRUM 0:615f90842ce8 173 );
MACRUM 0:615f90842ce8 174
MACRUM 0:615f90842ce8 175 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 176 * Name: MCR20Drv_PB_SPIByteWrite
MACRUM 0:615f90842ce8 177 * Description: -
MACRUM 0:615f90842ce8 178 * Parameters: -
MACRUM 0:615f90842ce8 179 * Return: -
MACRUM 0:615f90842ce8 180 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 181 void MCR20Drv_PB_SPIByteWrite
MACRUM 0:615f90842ce8 182 (
MACRUM 0:615f90842ce8 183 uint8_t address,
MACRUM 0:615f90842ce8 184 uint8_t value
MACRUM 0:615f90842ce8 185 );
MACRUM 0:615f90842ce8 186
MACRUM 0:615f90842ce8 187 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 188 * Name: MCR20Drv_PB_SPIBurstRead
MACRUM 0:615f90842ce8 189 * Description: -
MACRUM 0:615f90842ce8 190 * Parameters: -
MACRUM 0:615f90842ce8 191 * Return: -
MACRUM 0:615f90842ce8 192 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 193 uint8_t MCR20Drv_PB_SPIBurstRead
MACRUM 0:615f90842ce8 194 (
MACRUM 0:615f90842ce8 195 uint8_t * byteArray,
MACRUM 0:615f90842ce8 196 uint8_t numOfBytes
MACRUM 0:615f90842ce8 197 );
MACRUM 0:615f90842ce8 198
MACRUM 0:615f90842ce8 199 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 200 * Name: MCR20Drv_IndirectAccessSPIWrite
MACRUM 0:615f90842ce8 201 * Description: -
MACRUM 0:615f90842ce8 202 * Parameters: -
MACRUM 0:615f90842ce8 203 * Return: -
MACRUM 0:615f90842ce8 204 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 205 void MCR20Drv_IndirectAccessSPIWrite
MACRUM 0:615f90842ce8 206 (
MACRUM 0:615f90842ce8 207 uint8_t address,
MACRUM 0:615f90842ce8 208 uint8_t value
MACRUM 0:615f90842ce8 209 );
MACRUM 0:615f90842ce8 210
MACRUM 0:615f90842ce8 211 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 212 * Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
MACRUM 0:615f90842ce8 213 * Description: -
MACRUM 0:615f90842ce8 214 * Parameters: -
MACRUM 0:615f90842ce8 215 * Return: -
MACRUM 0:615f90842ce8 216 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 217 void MCR20Drv_IndirectAccessSPIMultiByteWrite
MACRUM 0:615f90842ce8 218 (
MACRUM 0:615f90842ce8 219 uint8_t startAddress,
MACRUM 0:615f90842ce8 220 uint8_t * byteArray,
MACRUM 0:615f90842ce8 221 uint8_t numOfBytes
MACRUM 0:615f90842ce8 222 );
MACRUM 0:615f90842ce8 223
MACRUM 0:615f90842ce8 224 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 225 * Name: MCR20Drv_IndirectAccessSPIRead
MACRUM 0:615f90842ce8 226 * Description: -
MACRUM 0:615f90842ce8 227 * Parameters: -
MACRUM 0:615f90842ce8 228 * Return: -
MACRUM 0:615f90842ce8 229 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 230 uint8_t MCR20Drv_IndirectAccessSPIRead
MACRUM 0:615f90842ce8 231 (
MACRUM 0:615f90842ce8 232 uint8_t address
MACRUM 0:615f90842ce8 233 );
MACRUM 0:615f90842ce8 234 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 235 * Name: MCR20Drv_IndirectAccessSPIMultiByteRead
MACRUM 0:615f90842ce8 236 * Description: -
MACRUM 0:615f90842ce8 237 * Parameters: -
MACRUM 0:615f90842ce8 238 * Return: -
MACRUM 0:615f90842ce8 239 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 240 void MCR20Drv_IndirectAccessSPIMultiByteRead
MACRUM 0:615f90842ce8 241 (
MACRUM 0:615f90842ce8 242 uint8_t startAddress,
MACRUM 0:615f90842ce8 243 uint8_t * byteArray,
MACRUM 0:615f90842ce8 244 uint8_t numOfBytes
MACRUM 0:615f90842ce8 245 );
MACRUM 0:615f90842ce8 246
MACRUM 0:615f90842ce8 247 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 248 * Name: MCR20Drv_IsIrqPending
MACRUM 0:615f90842ce8 249 * Description: -
MACRUM 0:615f90842ce8 250 * Parameters: -
MACRUM 0:615f90842ce8 251 * Return: -
MACRUM 0:615f90842ce8 252 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 253 uint32_t MCR20Drv_IsIrqPending
MACRUM 0:615f90842ce8 254 (
MACRUM 0:615f90842ce8 255 void
MACRUM 0:615f90842ce8 256 );
MACRUM 0:615f90842ce8 257
MACRUM 0:615f90842ce8 258 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 259 * Name: MCR20Drv_IRQ_Disable
MACRUM 0:615f90842ce8 260 * Description: -
MACRUM 0:615f90842ce8 261 * Parameters: -
MACRUM 0:615f90842ce8 262 * Return: -
MACRUM 0:615f90842ce8 263 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 264 void MCR20Drv_IRQ_Disable
MACRUM 0:615f90842ce8 265 (
MACRUM 0:615f90842ce8 266 void
MACRUM 0:615f90842ce8 267 );
MACRUM 0:615f90842ce8 268
MACRUM 0:615f90842ce8 269 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 270 * Name: MCR20Drv_IRQ_Enable
MACRUM 0:615f90842ce8 271 * Description: -
MACRUM 0:615f90842ce8 272 * Parameters: -
MACRUM 0:615f90842ce8 273 * Return: -
MACRUM 0:615f90842ce8 274 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 275 void MCR20Drv_IRQ_Enable
MACRUM 0:615f90842ce8 276 (
MACRUM 0:615f90842ce8 277 void
MACRUM 0:615f90842ce8 278 );
MACRUM 0:615f90842ce8 279
MACRUM 0:615f90842ce8 280 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 281 * Name: MCR20Drv_RST_PortConfig
MACRUM 0:615f90842ce8 282 * Description: -
MACRUM 0:615f90842ce8 283 * Parameters: -
MACRUM 0:615f90842ce8 284 * Return: -
MACRUM 0:615f90842ce8 285 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 286 void MCR20Drv_RST_B_PortConfig
MACRUM 0:615f90842ce8 287 (
MACRUM 0:615f90842ce8 288 void
MACRUM 0:615f90842ce8 289 );
MACRUM 0:615f90842ce8 290
MACRUM 0:615f90842ce8 291 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 292 * Name: MCR20Drv_RST_Assert
MACRUM 0:615f90842ce8 293 * Description: -
MACRUM 0:615f90842ce8 294 * Parameters: -
MACRUM 0:615f90842ce8 295 * Return: -
MACRUM 0:615f90842ce8 296 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 297 void MCR20Drv_RST_B_Assert
MACRUM 0:615f90842ce8 298 (
MACRUM 0:615f90842ce8 299 void
MACRUM 0:615f90842ce8 300 );
MACRUM 0:615f90842ce8 301
MACRUM 0:615f90842ce8 302 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 303 * Name: MCR20Drv_RST_Deassert
MACRUM 0:615f90842ce8 304 * Description: -
MACRUM 0:615f90842ce8 305 * Parameters: -
MACRUM 0:615f90842ce8 306 * Return: -
MACRUM 0:615f90842ce8 307 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 308 void MCR20Drv_RST_B_Deassert
MACRUM 0:615f90842ce8 309 (
MACRUM 0:615f90842ce8 310 void
MACRUM 0:615f90842ce8 311 );
MACRUM 0:615f90842ce8 312
MACRUM 0:615f90842ce8 313 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 314 * Name: MCR20Drv_SoftRST_Assert
MACRUM 0:615f90842ce8 315 * Description: -
MACRUM 0:615f90842ce8 316 * Parameters: -
MACRUM 0:615f90842ce8 317 * Return: -
MACRUM 0:615f90842ce8 318 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 319 void MCR20Drv_SoftRST_Assert
MACRUM 0:615f90842ce8 320 (
MACRUM 0:615f90842ce8 321 void
MACRUM 0:615f90842ce8 322 );
MACRUM 0:615f90842ce8 323
MACRUM 0:615f90842ce8 324 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 325 * Name: MCR20Drv_SoftRST_Deassert
MACRUM 0:615f90842ce8 326 * Description: -
MACRUM 0:615f90842ce8 327 * Parameters: -
MACRUM 0:615f90842ce8 328 * Return: -
MACRUM 0:615f90842ce8 329 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 330 void MCR20Drv_SoftRST_Deassert
MACRUM 0:615f90842ce8 331 (
MACRUM 0:615f90842ce8 332 void
MACRUM 0:615f90842ce8 333 );
MACRUM 0:615f90842ce8 334
MACRUM 0:615f90842ce8 335
MACRUM 0:615f90842ce8 336 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 337 * Name: MCR20Drv_RESET
MACRUM 0:615f90842ce8 338 * Description: -
MACRUM 0:615f90842ce8 339 * Parameters: -
MACRUM 0:615f90842ce8 340 * Return: -
MACRUM 0:615f90842ce8 341 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 342 void MCR20Drv_RESET
MACRUM 0:615f90842ce8 343 (
MACRUM 0:615f90842ce8 344 void
MACRUM 0:615f90842ce8 345 );
MACRUM 0:615f90842ce8 346
MACRUM 0:615f90842ce8 347 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 348 * Name: MCR20Drv_Soft_RESET
MACRUM 0:615f90842ce8 349 * Description: -
MACRUM 0:615f90842ce8 350 * Parameters: -
MACRUM 0:615f90842ce8 351 * Return: -
MACRUM 0:615f90842ce8 352 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 353 void MCR20Drv_Soft_RESET
MACRUM 0:615f90842ce8 354 (
MACRUM 0:615f90842ce8 355 void
MACRUM 0:615f90842ce8 356 );
MACRUM 0:615f90842ce8 357
MACRUM 0:615f90842ce8 358 /*---------------------------------------------------------------------------
MACRUM 0:615f90842ce8 359 * Name: MCR20Drv_Set_CLK_OUT_Freq
MACRUM 0:615f90842ce8 360 * Description: -
MACRUM 0:615f90842ce8 361 * Parameters: -
MACRUM 0:615f90842ce8 362 * Return: -
MACRUM 0:615f90842ce8 363 *---------------------------------------------------------------------------*/
MACRUM 0:615f90842ce8 364 void MCR20Drv_Set_CLK_OUT_Freq
MACRUM 0:615f90842ce8 365 (
MACRUM 0:615f90842ce8 366 uint8_t freqDiv
MACRUM 0:615f90842ce8 367 );
MACRUM 0:615f90842ce8 368
MACRUM 0:615f90842ce8 369 #define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable()
MACRUM 0:615f90842ce8 370 #define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable()
MACRUM 0:615f90842ce8 371
MACRUM 0:615f90842ce8 372 #endif /* __MCR20_DRV_H__ */