Diff: SPITIS_TPM20.cpp

Revision:

2:526bf792254d

Parent:

1:fd0a59e55a85

Child:

3:4b9ad18eae02

diff -r fd0a59e55a85 -r 526bf792254d SPITIS_TPM20.cpp
--- a/SPITIS_TPM20.cpp	Tue Apr 07 15:57:47 2015 +0000
+++ b/SPITIS_TPM20.cpp	Tue Apr 07 19:13:09 2015 +0000
@@ -48,26 +48,35 @@
 #ifdef TPM_TIS_DEBUG_OUTPUT
     printf("TIS.InitializeTis.IntfCapability = 0x%08x\n\r", m_intfCabability);
 #endif
+
+    // Check mandatory 0 bits to see if we read a valid register
+    if(m_intfCabability & 0x0FFFF800)
+    {
+        result = TIS_SESSION_RESULT_FAILED;
+        goto Cleanup;        
+    }
     
     // If the TIS interface has a fixed burst count use that number instead of asking the TPM over and over and save cycles
-    if(m_intfCabability & TIS_INTF_CAPPABILITY_BURST_COUNT_STATIC)
-    {     
-        if((m_intfCabability & TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_MASK) == TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_8B)
-        {
-            m_fixedBurstCount = 8;
-        }
-        else if((m_intfCabability & TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_MASK) == TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_32B)
-        {
-            m_fixedBurstCount = 32;
-        }
-        else if ((m_intfCabability & TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_MASK) == TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_64B)
-        {
-            m_fixedBurstCount = 64;
-        }
+    m_fixedBurstCount = (m_intfCabability & TIS_INTF_CAPPABILITY_BURST_COUNT_STATIC);
 #ifdef TPM_TIS_DEBUG_OUTPUT
-        printf("TIS.InitializeTis.FixedBurstCount = %d\n\r", m_fixedBurstCount);
+    printf("TIS.InitializeTis.FixedBurstCount = %s\n\r", m_fixedBurstCount ? "YES" : "NO");
 #endif
+
+    if((m_intfCabability & TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_MASK) == TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_8B)
+    {
+        m_maxBurstCount = 8;
     }
+    else if((m_intfCabability & TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_MASK) == TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_32B)
+    {
+        m_maxBurstCount = 32;
+    }
+    else if ((m_intfCabability & TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_MASK) == TIS_INTF_CAPPABILITY_DATA_TRANSFER_SIZE_SUPPORT_64B)
+    {
+        m_maxBurstCount = 64;
+    }
+#ifdef TPM_TIS_DEBUG_OUTPUT
+    printf("TIS.InitializeTis.MaxBurstCount = %d\n\r", m_maxBurstCount);
+#endif
     
     result = TIS_SESSION_RESULT_COMPLETE;
 
@@ -510,21 +519,23 @@
 uint16_t
 TIS_TPM20::GetBurstCount()
 {
-    if(m_fixedBurstCount != 0)
+    if(m_fixedBurstCount)
     {
-        return m_fixedBurstCount;
+        return m_maxBurstCount;
     }
     else
     {
+        uint16_t burstCount = 0;
         uint8_t dataBytes[sizeof(uint16_t)] = {0};
         if(!ReadRegister(TIS_STS_BURSTCOUNT_REGISTER, dataBytes, sizeof(dataBytes)))
         {
             return 0;
         }
+        burstCount = min(LE_BYTEARRAY_TO_UINT16(dataBytes , 0), m_maxBurstCount);
 #ifdef TPM_TIS_DEBUG_OUTPUT
-        printf("TIS.BurstCount = %d\r\n", LE_BYTEARRAY_TO_UINT16(dataBytes , 0));
+        printf("TIS.BurstCount = %d\r\n", burstCount);
 #endif
-        return LE_BYTEARRAY_TO_UINT16(dataBytes , 0);
+        return burstCount;
     }
 }