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LIGHT2
Diff: INIT_HW/INIT_HW.cpp
- Revision:
- 244:30896263bd8b
- Parent:
- 241:fb5b57e3f157
- Child:
- 245:e9c5ec04e378
--- a/INIT_HW/INIT_HW.cpp Thu Apr 07 06:18:38 2022 +0000 +++ b/INIT_HW/INIT_HW.cpp Mon Jun 13 08:48:55 2022 +0000 @@ -2,92 +2,158 @@ #include "FastPWM.h" #include "setting.h" -void Init_ADC(void){ +extern ADC_HandleTypeDef hadc1; +extern ADC_HandleTypeDef hadc2; + +//void Init_ADC(void){ +// // ADC Setup +// RCC->APB2ENR |= RCC_APB2ENR_ADC3EN; // clock for ADC3 +// RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2 +// RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1 +// +// RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable clock for GPIOC +// RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock for GPIOA +// +// ADC->CCR = 0x00000016; // Regular simultaneous mode only +// ADC1->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC1 ON +// ADC1->SQR3 = 0x0000000E; //channel // use PC_4 as input- ADC1_IN14 +// ADC2->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC2 ON +// ADC2->SQR3 = 0x00000008; // use PB_0 as input - ADC2_IN8 +// ADC3->CR2 |= ADC_CR2_ADON; // ADC3 ON +// ADC3->SQR3 = 0x0000000B; // use PC_1, - ADC3_IN11 +// GPIOC->MODER |= 0b1100001100; //each channel // PC_4, PC_1 are analog inputs +// GPIOB->MODER |= 0x3; // PB_0 as analog input +// +// ADC1->SMPR1 |= 0x00001000; // 15 cycles on CH_14, 0b0001000000000000 +// ADC2->SMPR2 |= 0x01000000; // 15 cycles on CH_8, 0b0000000100000000<<16 +// ADC3->SMPR1 |= 0x00000008; // 15 cycles on CH_11, 0b0000000000001000 +//} + + +void Init_ADC(void) +{ // ADC Setup - RCC->APB2ENR |= RCC_APB2ENR_ADC3EN; // clock for ADC3 - RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2 - RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1 - - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable clock for GPIOC - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock for GPIOA - - ADC->CCR = 0x00000016; // Regular simultaneous mode only - ADC1->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC1 ON - ADC1->SQR3 = 0x0000000E; //channel // use PC_4 as input- ADC1_IN14 - ADC2->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC2 ON - ADC2->SQR3 = 0x00000008; // use PB_0 as input - ADC2_IN8 - ADC3->CR2 |= ADC_CR2_ADON; // ADC3 ON - ADC3->SQR3 = 0x0000000B; // use PC_1, - ADC3_IN11 - GPIOC->MODER |= 0b1100001100; //each channel // PC_4, PC_1 are analog inputs - GPIOB->MODER |= 0x3; // PB_0 as analog input - - ADC1->SMPR1 |= 0x00001000; // 15 cycles on CH_14, 0b0001000000000000 - ADC2->SMPR2 |= 0x01000000; // 15 cycles on CH_8, 0b0000000100000000<<16 - ADC3->SMPR1 |= 0x00000008; // 15 cycles on CH_11, 0b0000000000001000 +// RCC->APB2ENR |= RCC_APB2ENR_ADC3EN; // clock for ADC3 +// RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2 + RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1 + +// RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable clock for GPIOC + RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // Enable clock for GPIOB - } - -void Init_PWM(){ + ADC->CCR = 0x00000016; // Regular simultaneous mode only + ADC1->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC1 ON + ADC1->SQR3 = 0x00000008; // use PB_0 as input - ADC1_IN8 +// ADC1->SQR3 = 0x0000000E; //channel // use PC_4 as input- ADC1_IN14 +// ADC2->CR2 |= ADC_CR2_ADON;//0x00000001; // ADC2 ON +// ADC2->SQR3 = 0x00000008; // use PB_0 as input - ADC2_IN8 +// ADC3->CR2 |= ADC_CR2_ADON; // ADC3 ON +// ADC3->SQR3 = 0x0000000B; // use PC_1, - ADC3_IN11 +// GPIOC->MODER |= 0b1100001100; //each channel // PC_4, PC_1 are analog inputs + GPIOB->MODER |= 0x3; // PB_0 as analog input + + ADC1->SMPR2 |= 0x01000000; // 15 cycles on CH_8, 0b0000000100000000<<16 +// ADC1->SMPR1 |= 0x00001000; // 15 cycles on CH_14, 0b0001000000000000 +// ADC2->SMPR2 |= 0x01000000; // 15 cycles on CH_8, 0b0000000100000000<<16 +// ADC3->SMPR1 |= 0x00000008; // 15 cycles on CH_11, 0b0000000000001000 +} + + + + + +void Init_PWM() +{ RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // enable TIM4 clock - FastPWM pwm_v(PIN_V); - FastPWM pwm_w(PIN_W); - - //ISR Setup - +// FastPWM pwm_v(PIN_V); +// FastPWM pwm_w(PIN_W); + + //ISR Setup + NVIC_EnableIRQ(TIM4_IRQn); //Enable TIM4 IRQ TIM4->DIER |= TIM_DIER_UIE; // enable update interrupt -// TIM4->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode - TIM4->CR1 = 0x10; + TIM4->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode +// TIM4->CR1 = 0x10; TIM4->CR1 |= TIM_CR1_UDIS; - TIM4->CR1 |= TIM_CR1_ARPE; // autoreload on, - TIM4->RCR |= 0x001; // update event once per up/down count of TIM4 +// TIM4->CR1 |= TIM_CR1_ARPE; // autoreload on, + TIM4->RCR |= 0x001; // update event once per up/down count of TIM4 TIM4->EGR |= TIM_EGR_UG; - + //PWM Setup - TIM4->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock +// TIM4->PSC = 10-1; // no prescaler, timer counts up in sync with the peripheral clock TIM4->ARR = PWM_ARR-1; // set auto reload TIM4->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. TIM4->CR1 |= TIM_CR1_CEN; // enable TIM4 - + + TIM4->CCMR1 |= 0x7060; + } -void Init_TMR3(){ +//void Init_TMR3() +//{ +// RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // enable TIM3 clock +//// FastPWM pwm_v(PIN_V); +//// FastPWM pwm_w(PIN_W); +// //ISR Setup +// +// NVIC_EnableIRQ(TIM3_IRQn); //Enable TIM3 IRQ +// +// TIM3->DIER |= TIM_DIER_UIE; // enable update interrupt +//// TIM3->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode +// TIM3->CR1 = 0x10; +// TIM3->CR1 |= TIM_CR1_UDIS; +//// TIM3->CR1 |= TIM_CR1_ARPE; // autoreload on, +// TIM3->RCR |= 0x001; // update event once per up/down count of TIM3 +// TIM3->EGR |= TIM_EGR_UG; +// +//// TIM3->PSC = 0x00; // no prescaler, timer counts up in sync with the peripheral clock +// TIM3->PSC = 0x01; +// TIM3->ARR = TMR3_COUNT-1; // set auto reload, 5 khz +// TIM3->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. +// TIM3->CR1 |= TIM_CR1_CEN; // enable TIM4 +//} + +void Init_TMR3() +{ RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // enable TIM3 clock - - //ISR Setup - +// FastPWM pwm_v(PIN_V); +// FastPWM pwm_w(PIN_W); + //ISR Setup + NVIC_EnableIRQ(TIM3_IRQn); //Enable TIM3 IRQ TIM3->DIER |= TIM_DIER_UIE; // enable update interrupt -// TIM3->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode - TIM3->CR1 = 0x10; + TIM3->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode +// TIM3->CR1 = 0x10; TIM3->CR1 |= TIM_CR1_UDIS; - TIM3->CR1 |= TIM_CR1_ARPE; // autoreload on, - TIM3->RCR |= 0x001; // update event once per up/down count of TIM3 +// TIM3->CR1 |= TIM_CR1_ARPE; // autoreload on, + TIM3->RCR |= 0x001; // update event once per up/down count of TIM3 TIM3->EGR |= TIM_EGR_UG; -// TIM3->PSC = 0x00; // no prescaler, timer counts up in sync with the peripheral clock - TIM3->PSC = 0x01; + TIM3->PSC = 0x00; // no prescaler, timer counts up in sync with the peripheral clock +// TIM3->PSC = 0x01; TIM3->ARR = TMR3_COUNT-1; // set auto reload, 5 khz TIM3->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. TIM3->CR1 |= TIM_CR1_CEN; // enable TIM4 + + TIM3->CCMR1 |= 0x7060; } -void Init_TMR2(){ +void Init_TMR2() +{ RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // enable TIM2 clock - - //ISR Setup + + //ISR Setup NVIC_EnableIRQ(TIM2_IRQn); //Enable TIM2 IRQ TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt TIM2->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode TIM2->CR1 |= TIM_CR1_UDIS; - TIM2->CR1 |= TIM_CR1_ARPE; // autoreload on, - TIM2->RCR |= 0x001; // update event once per up/down count of TIM5 +// TIM2->CR1 |= TIM_CR1_ARPE; // autoreload on, + TIM2->RCR |= 0x001; // update event once per up/down count of TIM2 TIM2->EGR |= TIM_EGR_UG; TIM2->PSC = 0x00; // no prescaler, timer counts up in sync with the peripheral clock @@ -96,22 +162,49 @@ TIM2->CR1 |= TIM_CR1_CEN; // enable TIM2 } -//void Init_TMR2(){ -// RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // enable TIM5 clock -// -// //ISR Setup -// -// NVIC_EnableIRQ(TIM2_IRQn); //Enable TIM5 IRQ +void Init_TMR1() +{ + + RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // enable TIM1 clock +// RCC->APB2ENR |= 0x02; // enable TIM8 clock + FastPWM pwm_v(PIN_V); + FastPWM pwm_w(PIN_W); + + TIM1->DIER |= TIM_DIER_UIE; // enable update interrupt + TIM1->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode + TIM1->CR1 |= TIM_CR1_UDIS; + TIM1->CR1 |= TIM_CR1_ARPE; // autoreload on, + TIM1->RCR |= 0x001; // update event once per up/down count of TIM8 + TIM1->EGR |= TIM_EGR_UG; + + + TIM1->CCMR1 |= 0x60; +// TIM1->CCMR1 |= TIM_CCMR1_OC1PE; +// TIM1->CCMR1 &= ~TIM_CCMR1_OC1FE; +// TIM1->CCMR1 |= TIM_CCMR1_OC2PE; +// TIM1->CCMR1 &= ~TIM_CCMR1_OC2FE; + + TIM1->PSC = 0x00; // no prescaler, timer counts up in sync with the peripheral clock + TIM1->ARR = TMR1_COUNT-1; // set auto reload, 5 khz +// TIM1->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. + TIM1->CCER |= 0x05; // CC1E = 1, CC1P = 0, CC1NE = 1, CC1NP = 0 + + TIM1->BDTR |= 0x8000; // MOE = 1; + TIM1->BDTR |= 0x7F; // Dead-time 7Ftick + + TIM1->CR1 |= TIM_CR1_CEN; // enable TIM8 + + + +// __HAL_RCC_GPIOA_CLK_ENABLE(); // -// TIM2->DIER |= TIM_DIER_UIE; // enable update interrupt -// TIM2->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode -// TIM2->CR1 |= TIM_CR1_UDIS; -// TIM2->CR1 |= TIM_CR1_ARPE; // autoreload on, -// TIM2->RCR |= 0x001; // update event once per up/down count of TIM5 -// TIM2->EGR |= TIM_EGR_UG; +// GPIO_InitTypeDef GPIO_InitStruct = {0}; // -// TIM2->PSC = 0x12; // no prescaler, timer counts up in sync with the peripheral clock -// TIM2->ARR = TMR2_COUNT; // set auto reload, 5 khz -// TIM2->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. -// TIM2->CR1 |= TIM_CR1_CEN; // enable TIM5 -//} \ No newline at end of file +// GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6; +// GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +// GPIO_InitStruct.Alternate = GPIO_AF3_TIM1; +// HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + +} \ No newline at end of file