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host/Source/App/core_cmFunc.h@23:12e6183f04d4, 2016-02-03 (annotated)

Committer:
Kovalev_D
Date:
Wed Feb 03 10:44:42 2016 +0300
Revision:
23:12e6183f04d4
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Kovalev_D 23:12e6183f04d4 1 /**************************************************************************//**
Kovalev_D 23:12e6183f04d4 2 * @file core_cmFunc.h
Kovalev_D 23:12e6183f04d4 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kovalev_D 23:12e6183f04d4 4 * @version V2.01
Kovalev_D 23:12e6183f04d4 5 * @date 06. December 2010
Kovalev_D 23:12e6183f04d4 6 *
Kovalev_D 23:12e6183f04d4 7 * @note
Kovalev_D 23:12e6183f04d4 8 * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
Kovalev_D 23:12e6183f04d4 9 *
Kovalev_D 23:12e6183f04d4 10 * @par
Kovalev_D 23:12e6183f04d4 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
Kovalev_D 23:12e6183f04d4 12 * processor based microcontrollers. This file can be freely distributed
Kovalev_D 23:12e6183f04d4 13 * within development tools that are supporting such ARM based processors.
Kovalev_D 23:12e6183f04d4 14 *
Kovalev_D 23:12e6183f04d4 15 * @par
Kovalev_D 23:12e6183f04d4 16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
Kovalev_D 23:12e6183f04d4 17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
Kovalev_D 23:12e6183f04d4 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
Kovalev_D 23:12e6183f04d4 19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
Kovalev_D 23:12e6183f04d4 20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Kovalev_D 23:12e6183f04d4 21 *
Kovalev_D 23:12e6183f04d4 22 ******************************************************************************/
Kovalev_D 23:12e6183f04d4 23
Kovalev_D 23:12e6183f04d4 24 #ifndef __CORE_CMFUNC_H__
Kovalev_D 23:12e6183f04d4 25 #define __CORE_CMFUNC_H__
Kovalev_D 23:12e6183f04d4 26
Kovalev_D 23:12e6183f04d4 27 /* ########################### Core Function Access ########################### */
Kovalev_D 23:12e6183f04d4 28 /** \ingroup CMSIS_Core_FunctionInterface
Kovalev_D 23:12e6183f04d4 29 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kovalev_D 23:12e6183f04d4 30 @{
Kovalev_D 23:12e6183f04d4 31 */
Kovalev_D 23:12e6183f04d4 32
Kovalev_D 23:12e6183f04d4 33 #if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/
Kovalev_D 23:12e6183f04d4 34 /* ARM armcc specific functions */
Kovalev_D 23:12e6183f04d4 35
Kovalev_D 23:12e6183f04d4 36 /* intrinsic void __enable_irq(); */
Kovalev_D 23:12e6183f04d4 37 /* intrinsic void __disable_irq(); */
Kovalev_D 23:12e6183f04d4 38
Kovalev_D 23:12e6183f04d4 39 /** \brief Get Control Register
Kovalev_D 23:12e6183f04d4 40
Kovalev_D 23:12e6183f04d4 41 This function returns the content of the Control Register.
Kovalev_D 23:12e6183f04d4 42
Kovalev_D 23:12e6183f04d4 43 \return Control Register value
Kovalev_D 23:12e6183f04d4 44 */
Kovalev_D 23:12e6183f04d4 45 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 46 extern uint32_t __get_CONTROL(void);
Kovalev_D 23:12e6183f04d4 47 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 48 static __INLINE uint32_t __get_CONTROL(void)
Kovalev_D 23:12e6183f04d4 49 {
Kovalev_D 23:12e6183f04d4 50 register uint32_t __regControl __ASM("control");
Kovalev_D 23:12e6183f04d4 51 return(__regControl);
Kovalev_D 23:12e6183f04d4 52 }
Kovalev_D 23:12e6183f04d4 53 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 54
Kovalev_D 23:12e6183f04d4 55
Kovalev_D 23:12e6183f04d4 56 /** \brief Set Control Register
Kovalev_D 23:12e6183f04d4 57
Kovalev_D 23:12e6183f04d4 58 This function writes the given value to the Control Register.
Kovalev_D 23:12e6183f04d4 59
Kovalev_D 23:12e6183f04d4 60 \param [in] control Control Register value to set
Kovalev_D 23:12e6183f04d4 61 */
Kovalev_D 23:12e6183f04d4 62 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 63 extern void __set_CONTROL(uint32_t control);
Kovalev_D 23:12e6183f04d4 64 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 65 static __INLINE void __set_CONTROL(uint32_t control)
Kovalev_D 23:12e6183f04d4 66 {
Kovalev_D 23:12e6183f04d4 67 register uint32_t __regControl __ASM("control");
Kovalev_D 23:12e6183f04d4 68 __regControl = control;
Kovalev_D 23:12e6183f04d4 69 }
Kovalev_D 23:12e6183f04d4 70 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 71
Kovalev_D 23:12e6183f04d4 72
Kovalev_D 23:12e6183f04d4 73 /** \brief Get ISPR Register
Kovalev_D 23:12e6183f04d4 74
Kovalev_D 23:12e6183f04d4 75 This function returns the content of the ISPR Register.
Kovalev_D 23:12e6183f04d4 76
Kovalev_D 23:12e6183f04d4 77 \return ISPR Register value
Kovalev_D 23:12e6183f04d4 78 */
Kovalev_D 23:12e6183f04d4 79 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 80 extern uint32_t __get_IPSR(void);
Kovalev_D 23:12e6183f04d4 81 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 82 static __INLINE uint32_t __get_IPSR(void)
Kovalev_D 23:12e6183f04d4 83 {
Kovalev_D 23:12e6183f04d4 84 register uint32_t __regIPSR __ASM("ipsr");
Kovalev_D 23:12e6183f04d4 85 return(__regIPSR);
Kovalev_D 23:12e6183f04d4 86 }
Kovalev_D 23:12e6183f04d4 87 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 88
Kovalev_D 23:12e6183f04d4 89
Kovalev_D 23:12e6183f04d4 90 /** \brief Get APSR Register
Kovalev_D 23:12e6183f04d4 91
Kovalev_D 23:12e6183f04d4 92 This function returns the content of the APSR Register.
Kovalev_D 23:12e6183f04d4 93
Kovalev_D 23:12e6183f04d4 94 \return APSR Register value
Kovalev_D 23:12e6183f04d4 95 */
Kovalev_D 23:12e6183f04d4 96 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 97 extern uint32_t __get_APSR(void);
Kovalev_D 23:12e6183f04d4 98 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 99 static __INLINE uint32_t __get_APSR(void)
Kovalev_D 23:12e6183f04d4 100 {
Kovalev_D 23:12e6183f04d4 101 register uint32_t __regAPSR __ASM("apsr");
Kovalev_D 23:12e6183f04d4 102 return(__regAPSR);
Kovalev_D 23:12e6183f04d4 103 }
Kovalev_D 23:12e6183f04d4 104 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 105
Kovalev_D 23:12e6183f04d4 106
Kovalev_D 23:12e6183f04d4 107 /** \brief Get xPSR Register
Kovalev_D 23:12e6183f04d4 108
Kovalev_D 23:12e6183f04d4 109 This function returns the content of the xPSR Register.
Kovalev_D 23:12e6183f04d4 110
Kovalev_D 23:12e6183f04d4 111 \return xPSR Register value
Kovalev_D 23:12e6183f04d4 112 */
Kovalev_D 23:12e6183f04d4 113 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 114 extern uint32_t __get_xPSR(void);
Kovalev_D 23:12e6183f04d4 115 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 116 static __INLINE uint32_t __get_xPSR(void)
Kovalev_D 23:12e6183f04d4 117 {
Kovalev_D 23:12e6183f04d4 118 register uint32_t __regXPSR __ASM("xpsr");
Kovalev_D 23:12e6183f04d4 119 return(__regXPSR);
Kovalev_D 23:12e6183f04d4 120 }
Kovalev_D 23:12e6183f04d4 121 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 122
Kovalev_D 23:12e6183f04d4 123
Kovalev_D 23:12e6183f04d4 124 /** \brief Get Process Stack Pointer
Kovalev_D 23:12e6183f04d4 125
Kovalev_D 23:12e6183f04d4 126 This function returns the current value of the Process Stack Pointer (PSP).
Kovalev_D 23:12e6183f04d4 127
Kovalev_D 23:12e6183f04d4 128 \return PSP Register value
Kovalev_D 23:12e6183f04d4 129 */
Kovalev_D 23:12e6183f04d4 130 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 131 extern uint32_t __get_PSP(void);
Kovalev_D 23:12e6183f04d4 132 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 133 static __INLINE uint32_t __get_PSP(void)
Kovalev_D 23:12e6183f04d4 134 {
Kovalev_D 23:12e6183f04d4 135 register uint32_t __regProcessStackPointer __ASM("psp");
Kovalev_D 23:12e6183f04d4 136 return(__regProcessStackPointer);
Kovalev_D 23:12e6183f04d4 137 }
Kovalev_D 23:12e6183f04d4 138 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 139
Kovalev_D 23:12e6183f04d4 140
Kovalev_D 23:12e6183f04d4 141 /** \brief Set Process Stack Pointer
Kovalev_D 23:12e6183f04d4 142
Kovalev_D 23:12e6183f04d4 143 This function assigns the given value to the Process Stack Pointer (PSP).
Kovalev_D 23:12e6183f04d4 144
Kovalev_D 23:12e6183f04d4 145 \param [in] topOfProcStack Process Stack Pointer value to set
Kovalev_D 23:12e6183f04d4 146 */
Kovalev_D 23:12e6183f04d4 147 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 148 extern void __set_PSP(uint32_t topOfProcStack);
Kovalev_D 23:12e6183f04d4 149 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 150 static __INLINE void __set_PSP(uint32_t topOfProcStack)
Kovalev_D 23:12e6183f04d4 151 {
Kovalev_D 23:12e6183f04d4 152 register uint32_t __regProcessStackPointer __ASM("psp");
Kovalev_D 23:12e6183f04d4 153 __regProcessStackPointer = topOfProcStack;
Kovalev_D 23:12e6183f04d4 154 }
Kovalev_D 23:12e6183f04d4 155 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 156
Kovalev_D 23:12e6183f04d4 157
Kovalev_D 23:12e6183f04d4 158 /** \brief Get Main Stack Pointer
Kovalev_D 23:12e6183f04d4 159
Kovalev_D 23:12e6183f04d4 160 This function returns the current value of the Main Stack Pointer (MSP).
Kovalev_D 23:12e6183f04d4 161
Kovalev_D 23:12e6183f04d4 162 \return MSP Register value
Kovalev_D 23:12e6183f04d4 163 */
Kovalev_D 23:12e6183f04d4 164 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 165 extern uint32_t __get_MSP(void);
Kovalev_D 23:12e6183f04d4 166 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 167 static __INLINE uint32_t __get_MSP(void)
Kovalev_D 23:12e6183f04d4 168 {
Kovalev_D 23:12e6183f04d4 169 register uint32_t __regMainStackPointer __ASM("msp");
Kovalev_D 23:12e6183f04d4 170 return(__regMainStackPointer);
Kovalev_D 23:12e6183f04d4 171 }
Kovalev_D 23:12e6183f04d4 172 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 173
Kovalev_D 23:12e6183f04d4 174
Kovalev_D 23:12e6183f04d4 175 /** \brief Set Main Stack Pointer
Kovalev_D 23:12e6183f04d4 176
Kovalev_D 23:12e6183f04d4 177 This function assigns the given value to the Main Stack Pointer (MSP).
Kovalev_D 23:12e6183f04d4 178
Kovalev_D 23:12e6183f04d4 179 \param [in] topOfMainStack Main Stack Pointer value to set
Kovalev_D 23:12e6183f04d4 180 */
Kovalev_D 23:12e6183f04d4 181 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 182 extern void __set_MSP(uint32_t topOfMainStack);
Kovalev_D 23:12e6183f04d4 183 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 184 static __INLINE void __set_MSP(uint32_t topOfMainStack)
Kovalev_D 23:12e6183f04d4 185 {
Kovalev_D 23:12e6183f04d4 186 register uint32_t __regMainStackPointer __ASM("msp");
Kovalev_D 23:12e6183f04d4 187 __regMainStackPointer = topOfMainStack;
Kovalev_D 23:12e6183f04d4 188 }
Kovalev_D 23:12e6183f04d4 189 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 190
Kovalev_D 23:12e6183f04d4 191
Kovalev_D 23:12e6183f04d4 192 /** \brief Get Priority Mask
Kovalev_D 23:12e6183f04d4 193
Kovalev_D 23:12e6183f04d4 194 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kovalev_D 23:12e6183f04d4 195
Kovalev_D 23:12e6183f04d4 196 \return Priority Mask value
Kovalev_D 23:12e6183f04d4 197 */
Kovalev_D 23:12e6183f04d4 198 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 199 extern uint32_t __get_PRIMASK(void);
Kovalev_D 23:12e6183f04d4 200 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 201 static __INLINE uint32_t __get_PRIMASK(void)
Kovalev_D 23:12e6183f04d4 202 {
Kovalev_D 23:12e6183f04d4 203 register uint32_t __regPriMask __ASM("primask");
Kovalev_D 23:12e6183f04d4 204 return(__regPriMask);
Kovalev_D 23:12e6183f04d4 205 }
Kovalev_D 23:12e6183f04d4 206 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 207
Kovalev_D 23:12e6183f04d4 208
Kovalev_D 23:12e6183f04d4 209 /** \brief Set Priority Mask
Kovalev_D 23:12e6183f04d4 210
Kovalev_D 23:12e6183f04d4 211 This function assigns the given value to the Priority Mask Register.
Kovalev_D 23:12e6183f04d4 212
Kovalev_D 23:12e6183f04d4 213 \param [in] priMask Priority Mask
Kovalev_D 23:12e6183f04d4 214 */
Kovalev_D 23:12e6183f04d4 215 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 216 extern void __set_PRIMASK(uint32_t priMask);
Kovalev_D 23:12e6183f04d4 217 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 218 static __INLINE void __set_PRIMASK(uint32_t priMask)
Kovalev_D 23:12e6183f04d4 219 {
Kovalev_D 23:12e6183f04d4 220 register uint32_t __regPriMask __ASM("primask");
Kovalev_D 23:12e6183f04d4 221 __regPriMask = (priMask);
Kovalev_D 23:12e6183f04d4 222 }
Kovalev_D 23:12e6183f04d4 223 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 224
Kovalev_D 23:12e6183f04d4 225
Kovalev_D 23:12e6183f04d4 226 #if (__CORTEX_M >= 0x03)
Kovalev_D 23:12e6183f04d4 227
Kovalev_D 23:12e6183f04d4 228 /** \brief Enable FIQ
Kovalev_D 23:12e6183f04d4 229
Kovalev_D 23:12e6183f04d4 230 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 231 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 232 */
Kovalev_D 23:12e6183f04d4 233 #define __enable_fault_irq __enable_fiq
Kovalev_D 23:12e6183f04d4 234
Kovalev_D 23:12e6183f04d4 235
Kovalev_D 23:12e6183f04d4 236 /** \brief Disable FIQ
Kovalev_D 23:12e6183f04d4 237
Kovalev_D 23:12e6183f04d4 238 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 239 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 240 */
Kovalev_D 23:12e6183f04d4 241 #define __disable_fault_irq __disable_fiq
Kovalev_D 23:12e6183f04d4 242
Kovalev_D 23:12e6183f04d4 243
Kovalev_D 23:12e6183f04d4 244 /** \brief Get Base Priority
Kovalev_D 23:12e6183f04d4 245
Kovalev_D 23:12e6183f04d4 246 This function returns the current value of the Base Priority register.
Kovalev_D 23:12e6183f04d4 247
Kovalev_D 23:12e6183f04d4 248 \return Base Priority register value
Kovalev_D 23:12e6183f04d4 249 */
Kovalev_D 23:12e6183f04d4 250 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 251 extern uint32_t __get_BASEPRI(void);
Kovalev_D 23:12e6183f04d4 252 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 253 static __INLINE uint32_t __get_BASEPRI(void)
Kovalev_D 23:12e6183f04d4 254 {
Kovalev_D 23:12e6183f04d4 255 register uint32_t __regBasePri __ASM("basepri");
Kovalev_D 23:12e6183f04d4 256 return(__regBasePri);
Kovalev_D 23:12e6183f04d4 257 }
Kovalev_D 23:12e6183f04d4 258 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 259
Kovalev_D 23:12e6183f04d4 260
Kovalev_D 23:12e6183f04d4 261 /** \brief Set Base Priority
Kovalev_D 23:12e6183f04d4 262
Kovalev_D 23:12e6183f04d4 263 This function assigns the given value to the Base Priority register.
Kovalev_D 23:12e6183f04d4 264
Kovalev_D 23:12e6183f04d4 265 \param [in] basePri Base Priority value to set
Kovalev_D 23:12e6183f04d4 266 */
Kovalev_D 23:12e6183f04d4 267 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 268 extern void __set_BASEPRI(uint32_t basePri);
Kovalev_D 23:12e6183f04d4 269 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 270 static __INLINE void __set_BASEPRI(uint32_t basePri)
Kovalev_D 23:12e6183f04d4 271 {
Kovalev_D 23:12e6183f04d4 272 register uint32_t __regBasePri __ASM("basepri");
Kovalev_D 23:12e6183f04d4 273 __regBasePri = (basePri & 0xff);
Kovalev_D 23:12e6183f04d4 274 }
Kovalev_D 23:12e6183f04d4 275 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 276
Kovalev_D 23:12e6183f04d4 277
Kovalev_D 23:12e6183f04d4 278 /** \brief Get Fault Mask
Kovalev_D 23:12e6183f04d4 279
Kovalev_D 23:12e6183f04d4 280 This function returns the current value of the Fault Mask register.
Kovalev_D 23:12e6183f04d4 281
Kovalev_D 23:12e6183f04d4 282 \return Fault Mask register value
Kovalev_D 23:12e6183f04d4 283 */
Kovalev_D 23:12e6183f04d4 284 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 285 extern uint32_t __get_FAULTMASK(void);
Kovalev_D 23:12e6183f04d4 286 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 287 static __INLINE uint32_t __get_FAULTMASK(void)
Kovalev_D 23:12e6183f04d4 288 {
Kovalev_D 23:12e6183f04d4 289 register uint32_t __regFaultMask __ASM("faultmask");
Kovalev_D 23:12e6183f04d4 290 return(__regFaultMask);
Kovalev_D 23:12e6183f04d4 291 }
Kovalev_D 23:12e6183f04d4 292 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 293
Kovalev_D 23:12e6183f04d4 294
Kovalev_D 23:12e6183f04d4 295 /** \brief Set Fault Mask
Kovalev_D 23:12e6183f04d4 296
Kovalev_D 23:12e6183f04d4 297 This function assigns the given value to the Fault Mask register.
Kovalev_D 23:12e6183f04d4 298
Kovalev_D 23:12e6183f04d4 299 \param [in] faultMask Fault Mask value to set
Kovalev_D 23:12e6183f04d4 300 */
Kovalev_D 23:12e6183f04d4 301 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 302 extern void __set_FAULTMASK(uint32_t faultMask);
Kovalev_D 23:12e6183f04d4 303 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 304 static __INLINE void __set_FAULTMASK(uint32_t faultMask)
Kovalev_D 23:12e6183f04d4 305 {
Kovalev_D 23:12e6183f04d4 306 register uint32_t __regFaultMask __ASM("faultmask");
Kovalev_D 23:12e6183f04d4 307 __regFaultMask = (faultMask & 1);
Kovalev_D 23:12e6183f04d4 308 }
Kovalev_D 23:12e6183f04d4 309 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 310
Kovalev_D 23:12e6183f04d4 311 #endif /* (__CORTEX_M >= 0x03) */
Kovalev_D 23:12e6183f04d4 312
Kovalev_D 23:12e6183f04d4 313
Kovalev_D 23:12e6183f04d4 314 #if (__CORTEX_M == 0x04)
Kovalev_D 23:12e6183f04d4 315
Kovalev_D 23:12e6183f04d4 316 /** \brief Get FPSCR
Kovalev_D 23:12e6183f04d4 317
Kovalev_D 23:12e6183f04d4 318 This function returns the current value of the Floating Point Status/Control register.
Kovalev_D 23:12e6183f04d4 319
Kovalev_D 23:12e6183f04d4 320 \return Floating Point Status/Control register value
Kovalev_D 23:12e6183f04d4 321 */
Kovalev_D 23:12e6183f04d4 322 static __INLINE uint32_t __get_FPSCR(void)
Kovalev_D 23:12e6183f04d4 323 {
Kovalev_D 23:12e6183f04d4 324 #if (__FPU_PRESENT == 1)
Kovalev_D 23:12e6183f04d4 325 register uint32_t __regfpscr __ASM("fpscr");
Kovalev_D 23:12e6183f04d4 326 return(__regfpscr);
Kovalev_D 23:12e6183f04d4 327 #else
Kovalev_D 23:12e6183f04d4 328 return(0);
Kovalev_D 23:12e6183f04d4 329 #endif
Kovalev_D 23:12e6183f04d4 330 }
Kovalev_D 23:12e6183f04d4 331
Kovalev_D 23:12e6183f04d4 332
Kovalev_D 23:12e6183f04d4 333 /** \brief Set FPSCR
Kovalev_D 23:12e6183f04d4 334
Kovalev_D 23:12e6183f04d4 335 This function assigns the given value to the Floating Point Status/Control register.
Kovalev_D 23:12e6183f04d4 336
Kovalev_D 23:12e6183f04d4 337 \param [in] fpscr Floating Point Status/Control value to set
Kovalev_D 23:12e6183f04d4 338 */
Kovalev_D 23:12e6183f04d4 339 static __INLINE void __set_FPSCR(uint32_t fpscr)
Kovalev_D 23:12e6183f04d4 340 {
Kovalev_D 23:12e6183f04d4 341 #if (__FPU_PRESENT == 1)
Kovalev_D 23:12e6183f04d4 342 register uint32_t __regfpscr __ASM("fpscr");
Kovalev_D 23:12e6183f04d4 343 __regfpscr = (fpscr);
Kovalev_D 23:12e6183f04d4 344 #endif
Kovalev_D 23:12e6183f04d4 345 }
Kovalev_D 23:12e6183f04d4 346
Kovalev_D 23:12e6183f04d4 347 #endif /* (__CORTEX_M == 0x04) */
Kovalev_D 23:12e6183f04d4 348
Kovalev_D 23:12e6183f04d4 349
Kovalev_D 23:12e6183f04d4 350 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
Kovalev_D 23:12e6183f04d4 351 /* IAR iccarm specific functions */
Kovalev_D 23:12e6183f04d4 352
Kovalev_D 23:12e6183f04d4 353 #if defined (__ICCARM__)
Kovalev_D 23:12e6183f04d4 354 #include <intrinsics.h> /* IAR Intrinsics */
Kovalev_D 23:12e6183f04d4 355 #endif
Kovalev_D 23:12e6183f04d4 356
Kovalev_D 23:12e6183f04d4 357 #pragma diag_suppress=Pe940
Kovalev_D 23:12e6183f04d4 358
Kovalev_D 23:12e6183f04d4 359 /** \brief Enable IRQ Interrupts
Kovalev_D 23:12e6183f04d4 360
Kovalev_D 23:12e6183f04d4 361 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 362 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 363 */
Kovalev_D 23:12e6183f04d4 364 #define __enable_irq __enable_interrupt
Kovalev_D 23:12e6183f04d4 365
Kovalev_D 23:12e6183f04d4 366
Kovalev_D 23:12e6183f04d4 367 /** \brief Disable IRQ Interrupts
Kovalev_D 23:12e6183f04d4 368
Kovalev_D 23:12e6183f04d4 369 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 370 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 371 */
Kovalev_D 23:12e6183f04d4 372 #define __disable_irq __disable_interrupt
Kovalev_D 23:12e6183f04d4 373
Kovalev_D 23:12e6183f04d4 374
Kovalev_D 23:12e6183f04d4 375 /* intrinsic unsigned long __get_CONTROL( void ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 376 /* intrinsic void __set_CONTROL( unsigned long ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 377
Kovalev_D 23:12e6183f04d4 378
Kovalev_D 23:12e6183f04d4 379 /** \brief Get ISPR Register
Kovalev_D 23:12e6183f04d4 380
Kovalev_D 23:12e6183f04d4 381 This function returns the content of the ISPR Register.
Kovalev_D 23:12e6183f04d4 382
Kovalev_D 23:12e6183f04d4 383 \return ISPR Register value
Kovalev_D 23:12e6183f04d4 384 */
Kovalev_D 23:12e6183f04d4 385 static uint32_t __get_IPSR(void)
Kovalev_D 23:12e6183f04d4 386 {
Kovalev_D 23:12e6183f04d4 387 __ASM("mrs r0, ipsr");
Kovalev_D 23:12e6183f04d4 388 }
Kovalev_D 23:12e6183f04d4 389
Kovalev_D 23:12e6183f04d4 390
Kovalev_D 23:12e6183f04d4 391 /** \brief Get APSR Register
Kovalev_D 23:12e6183f04d4 392
Kovalev_D 23:12e6183f04d4 393 This function returns the content of the APSR Register.
Kovalev_D 23:12e6183f04d4 394
Kovalev_D 23:12e6183f04d4 395 \return APSR Register value
Kovalev_D 23:12e6183f04d4 396 */
Kovalev_D 23:12e6183f04d4 397 static uint32_t __get_APSR(void)
Kovalev_D 23:12e6183f04d4 398 {
Kovalev_D 23:12e6183f04d4 399 __ASM("mrs r0, apsr");
Kovalev_D 23:12e6183f04d4 400 }
Kovalev_D 23:12e6183f04d4 401
Kovalev_D 23:12e6183f04d4 402
Kovalev_D 23:12e6183f04d4 403 /** \brief Get xPSR Register
Kovalev_D 23:12e6183f04d4 404
Kovalev_D 23:12e6183f04d4 405 This function returns the content of the xPSR Register.
Kovalev_D 23:12e6183f04d4 406
Kovalev_D 23:12e6183f04d4 407 \return xPSR Register value
Kovalev_D 23:12e6183f04d4 408 */
Kovalev_D 23:12e6183f04d4 409 static uint32_t __get_xPSR(void)
Kovalev_D 23:12e6183f04d4 410 {
Kovalev_D 23:12e6183f04d4 411 __ASM("mrs r0, psr"); // assembler does not know "xpsr"
Kovalev_D 23:12e6183f04d4 412 }
Kovalev_D 23:12e6183f04d4 413
Kovalev_D 23:12e6183f04d4 414
Kovalev_D 23:12e6183f04d4 415 /** \brief Get Process Stack Pointer
Kovalev_D 23:12e6183f04d4 416
Kovalev_D 23:12e6183f04d4 417 This function returns the current value of the Process Stack Pointer (PSP).
Kovalev_D 23:12e6183f04d4 418
Kovalev_D 23:12e6183f04d4 419 \return PSP Register value
Kovalev_D 23:12e6183f04d4 420 */
Kovalev_D 23:12e6183f04d4 421 static uint32_t __get_PSP(void)
Kovalev_D 23:12e6183f04d4 422 {
Kovalev_D 23:12e6183f04d4 423 __ASM("mrs r0, psp");
Kovalev_D 23:12e6183f04d4 424 }
Kovalev_D 23:12e6183f04d4 425
Kovalev_D 23:12e6183f04d4 426
Kovalev_D 23:12e6183f04d4 427 /** \brief Set Process Stack Pointer
Kovalev_D 23:12e6183f04d4 428
Kovalev_D 23:12e6183f04d4 429 This function assigns the given value to the Process Stack Pointer (PSP).
Kovalev_D 23:12e6183f04d4 430
Kovalev_D 23:12e6183f04d4 431 \param [in] topOfProcStack Process Stack Pointer value to set
Kovalev_D 23:12e6183f04d4 432 */
Kovalev_D 23:12e6183f04d4 433 static void __set_PSP(uint32_t topOfProcStack)
Kovalev_D 23:12e6183f04d4 434 {
Kovalev_D 23:12e6183f04d4 435 __ASM("msr psp, r0");
Kovalev_D 23:12e6183f04d4 436 }
Kovalev_D 23:12e6183f04d4 437
Kovalev_D 23:12e6183f04d4 438
Kovalev_D 23:12e6183f04d4 439 /** \brief Get Main Stack Pointer
Kovalev_D 23:12e6183f04d4 440
Kovalev_D 23:12e6183f04d4 441 This function returns the current value of the Main Stack Pointer (MSP).
Kovalev_D 23:12e6183f04d4 442
Kovalev_D 23:12e6183f04d4 443 \return MSP Register value
Kovalev_D 23:12e6183f04d4 444 */
Kovalev_D 23:12e6183f04d4 445 static uint32_t __get_MSP(void)
Kovalev_D 23:12e6183f04d4 446 {
Kovalev_D 23:12e6183f04d4 447 __ASM("mrs r0, msp");
Kovalev_D 23:12e6183f04d4 448 }
Kovalev_D 23:12e6183f04d4 449
Kovalev_D 23:12e6183f04d4 450
Kovalev_D 23:12e6183f04d4 451 /** \brief Set Main Stack Pointer
Kovalev_D 23:12e6183f04d4 452
Kovalev_D 23:12e6183f04d4 453 This function assigns the given value to the Main Stack Pointer (MSP).
Kovalev_D 23:12e6183f04d4 454
Kovalev_D 23:12e6183f04d4 455 \param [in] topOfMainStack Main Stack Pointer value to set
Kovalev_D 23:12e6183f04d4 456 */
Kovalev_D 23:12e6183f04d4 457 static void __set_MSP(uint32_t topOfMainStack)
Kovalev_D 23:12e6183f04d4 458 {
Kovalev_D 23:12e6183f04d4 459 __ASM("msr msp, r0");
Kovalev_D 23:12e6183f04d4 460 }
Kovalev_D 23:12e6183f04d4 461
Kovalev_D 23:12e6183f04d4 462
Kovalev_D 23:12e6183f04d4 463 /* intrinsic unsigned long __get_PRIMASK( void ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 464 /* intrinsic void __set_PRIMASK( unsigned long ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 465
Kovalev_D 23:12e6183f04d4 466
Kovalev_D 23:12e6183f04d4 467 #if (__CORTEX_M >= 0x03)
Kovalev_D 23:12e6183f04d4 468
Kovalev_D 23:12e6183f04d4 469 /** \brief Enable FIQ
Kovalev_D 23:12e6183f04d4 470
Kovalev_D 23:12e6183f04d4 471 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 472 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 473 */
Kovalev_D 23:12e6183f04d4 474 static __INLINE void __enable_fault_irq(void)
Kovalev_D 23:12e6183f04d4 475 {
Kovalev_D 23:12e6183f04d4 476 __ASM ("cpsie f");
Kovalev_D 23:12e6183f04d4 477 }
Kovalev_D 23:12e6183f04d4 478
Kovalev_D 23:12e6183f04d4 479
Kovalev_D 23:12e6183f04d4 480 /** \brief Disable FIQ
Kovalev_D 23:12e6183f04d4 481
Kovalev_D 23:12e6183f04d4 482 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 483 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 484 */
Kovalev_D 23:12e6183f04d4 485 static __INLINE void __disable_fault_irq(void)
Kovalev_D 23:12e6183f04d4 486 {
Kovalev_D 23:12e6183f04d4 487 __ASM ("cpsid f");
Kovalev_D 23:12e6183f04d4 488 }
Kovalev_D 23:12e6183f04d4 489
Kovalev_D 23:12e6183f04d4 490
Kovalev_D 23:12e6183f04d4 491 /* intrinsic unsigned long __get_BASEPRI( void ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 492 /* intrinsic void __set_BASEPRI( unsigned long ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 493 /* intrinsic unsigned long __get_FAULTMASK( void ); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 494 /* intrinsic void __set_FAULTMASK(unsigned long); (see intrinsic.h) */
Kovalev_D 23:12e6183f04d4 495
Kovalev_D 23:12e6183f04d4 496 #endif /* (__CORTEX_M >= 0x03) */
Kovalev_D 23:12e6183f04d4 497
Kovalev_D 23:12e6183f04d4 498
Kovalev_D 23:12e6183f04d4 499 #if (__CORTEX_M == 0x04)
Kovalev_D 23:12e6183f04d4 500
Kovalev_D 23:12e6183f04d4 501 /** \brief Get FPSCR
Kovalev_D 23:12e6183f04d4 502
Kovalev_D 23:12e6183f04d4 503 This function returns the current value of the Floating Point Status/Control register.
Kovalev_D 23:12e6183f04d4 504
Kovalev_D 23:12e6183f04d4 505 \return Floating Point Status/Control register value
Kovalev_D 23:12e6183f04d4 506 */
Kovalev_D 23:12e6183f04d4 507 static uint32_t __get_FPSCR(void)
Kovalev_D 23:12e6183f04d4 508 {
Kovalev_D 23:12e6183f04d4 509 #if (__FPU_PRESENT == 1)
Kovalev_D 23:12e6183f04d4 510 __ASM("vmrs r0, fpscr");
Kovalev_D 23:12e6183f04d4 511 #else
Kovalev_D 23:12e6183f04d4 512 return(0);
Kovalev_D 23:12e6183f04d4 513 #endif
Kovalev_D 23:12e6183f04d4 514 }
Kovalev_D 23:12e6183f04d4 515
Kovalev_D 23:12e6183f04d4 516
Kovalev_D 23:12e6183f04d4 517 /** \brief Set FPSCR
Kovalev_D 23:12e6183f04d4 518
Kovalev_D 23:12e6183f04d4 519 This function assigns the given value to the Floating Point Status/Control register.
Kovalev_D 23:12e6183f04d4 520
Kovalev_D 23:12e6183f04d4 521 \param [in] fpscr Floating Point Status/Control value to set
Kovalev_D 23:12e6183f04d4 522 */
Kovalev_D 23:12e6183f04d4 523 static void __set_FPSCR(uint32_t fpscr)
Kovalev_D 23:12e6183f04d4 524 {
Kovalev_D 23:12e6183f04d4 525 #if (__FPU_PRESENT == 1)
Kovalev_D 23:12e6183f04d4 526 __ASM("vmsr fpscr, r0");
Kovalev_D 23:12e6183f04d4 527 #endif
Kovalev_D 23:12e6183f04d4 528 }
Kovalev_D 23:12e6183f04d4 529
Kovalev_D 23:12e6183f04d4 530 #endif /* (__CORTEX_M == 0x04) */
Kovalev_D 23:12e6183f04d4 531
Kovalev_D 23:12e6183f04d4 532 #pragma diag_default=Pe940
Kovalev_D 23:12e6183f04d4 533
Kovalev_D 23:12e6183f04d4 534
Kovalev_D 23:12e6183f04d4 535 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
Kovalev_D 23:12e6183f04d4 536 /* GNU gcc specific functions */
Kovalev_D 23:12e6183f04d4 537
Kovalev_D 23:12e6183f04d4 538 /** \brief Enable IRQ Interrupts
Kovalev_D 23:12e6183f04d4 539
Kovalev_D 23:12e6183f04d4 540 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 541 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 542 */
Kovalev_D 23:12e6183f04d4 543 __attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
Kovalev_D 23:12e6183f04d4 544 {
Kovalev_D 23:12e6183f04d4 545 __ASM volatile ("cpsie i");
Kovalev_D 23:12e6183f04d4 546 }
Kovalev_D 23:12e6183f04d4 547
Kovalev_D 23:12e6183f04d4 548
Kovalev_D 23:12e6183f04d4 549 /** \brief Disable IRQ Interrupts
Kovalev_D 23:12e6183f04d4 550
Kovalev_D 23:12e6183f04d4 551 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 552 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 553 */
Kovalev_D 23:12e6183f04d4 554 __attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
Kovalev_D 23:12e6183f04d4 555 {
Kovalev_D 23:12e6183f04d4 556 __ASM volatile ("cpsid i");
Kovalev_D 23:12e6183f04d4 557 }
Kovalev_D 23:12e6183f04d4 558
Kovalev_D 23:12e6183f04d4 559
Kovalev_D 23:12e6183f04d4 560 /** \brief Get Control Register
Kovalev_D 23:12e6183f04d4 561
Kovalev_D 23:12e6183f04d4 562 This function returns the content of the Control Register.
Kovalev_D 23:12e6183f04d4 563
Kovalev_D 23:12e6183f04d4 564 \return Control Register value
Kovalev_D 23:12e6183f04d4 565 */
Kovalev_D 23:12e6183f04d4 566 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
Kovalev_D 23:12e6183f04d4 567 {
Kovalev_D 23:12e6183f04d4 568 uint32_t result;
Kovalev_D 23:12e6183f04d4 569
Kovalev_D 23:12e6183f04d4 570 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 571 return(result);
Kovalev_D 23:12e6183f04d4 572 }
Kovalev_D 23:12e6183f04d4 573
Kovalev_D 23:12e6183f04d4 574
Kovalev_D 23:12e6183f04d4 575 /** \brief Set Control Register
Kovalev_D 23:12e6183f04d4 576
Kovalev_D 23:12e6183f04d4 577 This function writes the given value to the Control Register.
Kovalev_D 23:12e6183f04d4 578
Kovalev_D 23:12e6183f04d4 579 \param [in] control Control Register value to set
Kovalev_D 23:12e6183f04d4 580 */
Kovalev_D 23:12e6183f04d4 581 __attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
Kovalev_D 23:12e6183f04d4 582 {
Kovalev_D 23:12e6183f04d4 583 __ASM volatile ("MSR control, %0" : : "r" (control) );
Kovalev_D 23:12e6183f04d4 584 }
Kovalev_D 23:12e6183f04d4 585
Kovalev_D 23:12e6183f04d4 586
Kovalev_D 23:12e6183f04d4 587 /** \brief Get ISPR Register
Kovalev_D 23:12e6183f04d4 588
Kovalev_D 23:12e6183f04d4 589 This function returns the content of the ISPR Register.
Kovalev_D 23:12e6183f04d4 590
Kovalev_D 23:12e6183f04d4 591 \return ISPR Register value
Kovalev_D 23:12e6183f04d4 592 */
Kovalev_D 23:12e6183f04d4 593 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
Kovalev_D 23:12e6183f04d4 594 {
Kovalev_D 23:12e6183f04d4 595 uint32_t result;
Kovalev_D 23:12e6183f04d4 596
Kovalev_D 23:12e6183f04d4 597 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 598 return(result);
Kovalev_D 23:12e6183f04d4 599 }
Kovalev_D 23:12e6183f04d4 600
Kovalev_D 23:12e6183f04d4 601
Kovalev_D 23:12e6183f04d4 602 /** \brief Get APSR Register
Kovalev_D 23:12e6183f04d4 603
Kovalev_D 23:12e6183f04d4 604 This function returns the content of the APSR Register.
Kovalev_D 23:12e6183f04d4 605
Kovalev_D 23:12e6183f04d4 606 \return APSR Register value
Kovalev_D 23:12e6183f04d4 607 */
Kovalev_D 23:12e6183f04d4 608 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
Kovalev_D 23:12e6183f04d4 609 {
Kovalev_D 23:12e6183f04d4 610 uint32_t result;
Kovalev_D 23:12e6183f04d4 611
Kovalev_D 23:12e6183f04d4 612 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 613 return(result);
Kovalev_D 23:12e6183f04d4 614 }
Kovalev_D 23:12e6183f04d4 615
Kovalev_D 23:12e6183f04d4 616
Kovalev_D 23:12e6183f04d4 617 /** \brief Get xPSR Register
Kovalev_D 23:12e6183f04d4 618
Kovalev_D 23:12e6183f04d4 619 This function returns the content of the xPSR Register.
Kovalev_D 23:12e6183f04d4 620
Kovalev_D 23:12e6183f04d4 621 \return xPSR Register value
Kovalev_D 23:12e6183f04d4 622 */
Kovalev_D 23:12e6183f04d4 623 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
Kovalev_D 23:12e6183f04d4 624 {
Kovalev_D 23:12e6183f04d4 625 uint32_t result;
Kovalev_D 23:12e6183f04d4 626
Kovalev_D 23:12e6183f04d4 627 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 628 return(result);
Kovalev_D 23:12e6183f04d4 629 }
Kovalev_D 23:12e6183f04d4 630
Kovalev_D 23:12e6183f04d4 631
Kovalev_D 23:12e6183f04d4 632 /** \brief Get Process Stack Pointer
Kovalev_D 23:12e6183f04d4 633
Kovalev_D 23:12e6183f04d4 634 This function returns the current value of the Process Stack Pointer (PSP).
Kovalev_D 23:12e6183f04d4 635
Kovalev_D 23:12e6183f04d4 636 \return PSP Register value
Kovalev_D 23:12e6183f04d4 637 */
Kovalev_D 23:12e6183f04d4 638 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
Kovalev_D 23:12e6183f04d4 639 {
Kovalev_D 23:12e6183f04d4 640 register uint32_t result;
Kovalev_D 23:12e6183f04d4 641
Kovalev_D 23:12e6183f04d4 642 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 643 return(result);
Kovalev_D 23:12e6183f04d4 644 }
Kovalev_D 23:12e6183f04d4 645
Kovalev_D 23:12e6183f04d4 646
Kovalev_D 23:12e6183f04d4 647 /** \brief Set Process Stack Pointer
Kovalev_D 23:12e6183f04d4 648
Kovalev_D 23:12e6183f04d4 649 This function assigns the given value to the Process Stack Pointer (PSP).
Kovalev_D 23:12e6183f04d4 650
Kovalev_D 23:12e6183f04d4 651 \param [in] topOfProcStack Process Stack Pointer value to set
Kovalev_D 23:12e6183f04d4 652 */
Kovalev_D 23:12e6183f04d4 653 __attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
Kovalev_D 23:12e6183f04d4 654 {
Kovalev_D 23:12e6183f04d4 655 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
Kovalev_D 23:12e6183f04d4 656 }
Kovalev_D 23:12e6183f04d4 657
Kovalev_D 23:12e6183f04d4 658
Kovalev_D 23:12e6183f04d4 659 /** \brief Get Main Stack Pointer
Kovalev_D 23:12e6183f04d4 660
Kovalev_D 23:12e6183f04d4 661 This function returns the current value of the Main Stack Pointer (MSP).
Kovalev_D 23:12e6183f04d4 662
Kovalev_D 23:12e6183f04d4 663 \return MSP Register value
Kovalev_D 23:12e6183f04d4 664 */
Kovalev_D 23:12e6183f04d4 665 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
Kovalev_D 23:12e6183f04d4 666 {
Kovalev_D 23:12e6183f04d4 667 register uint32_t result;
Kovalev_D 23:12e6183f04d4 668
Kovalev_D 23:12e6183f04d4 669 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 670 return(result);
Kovalev_D 23:12e6183f04d4 671 }
Kovalev_D 23:12e6183f04d4 672
Kovalev_D 23:12e6183f04d4 673
Kovalev_D 23:12e6183f04d4 674 /** \brief Set Main Stack Pointer
Kovalev_D 23:12e6183f04d4 675
Kovalev_D 23:12e6183f04d4 676 This function assigns the given value to the Main Stack Pointer (MSP).
Kovalev_D 23:12e6183f04d4 677
Kovalev_D 23:12e6183f04d4 678 \param [in] topOfMainStack Main Stack Pointer value to set
Kovalev_D 23:12e6183f04d4 679 */
Kovalev_D 23:12e6183f04d4 680 __attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
Kovalev_D 23:12e6183f04d4 681 {
Kovalev_D 23:12e6183f04d4 682 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
Kovalev_D 23:12e6183f04d4 683 }
Kovalev_D 23:12e6183f04d4 684
Kovalev_D 23:12e6183f04d4 685
Kovalev_D 23:12e6183f04d4 686 /** \brief Get Priority Mask
Kovalev_D 23:12e6183f04d4 687
Kovalev_D 23:12e6183f04d4 688 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kovalev_D 23:12e6183f04d4 689
Kovalev_D 23:12e6183f04d4 690 \return Priority Mask value
Kovalev_D 23:12e6183f04d4 691 */
Kovalev_D 23:12e6183f04d4 692 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
Kovalev_D 23:12e6183f04d4 693 {
Kovalev_D 23:12e6183f04d4 694 uint32_t result;
Kovalev_D 23:12e6183f04d4 695
Kovalev_D 23:12e6183f04d4 696 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 697 return(result);
Kovalev_D 23:12e6183f04d4 698 }
Kovalev_D 23:12e6183f04d4 699
Kovalev_D 23:12e6183f04d4 700
Kovalev_D 23:12e6183f04d4 701 /** \brief Set Priority Mask
Kovalev_D 23:12e6183f04d4 702
Kovalev_D 23:12e6183f04d4 703 This function assigns the given value to the Priority Mask Register.
Kovalev_D 23:12e6183f04d4 704
Kovalev_D 23:12e6183f04d4 705 \param [in] priMask Priority Mask
Kovalev_D 23:12e6183f04d4 706 */
Kovalev_D 23:12e6183f04d4 707 __attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
Kovalev_D 23:12e6183f04d4 708 {
Kovalev_D 23:12e6183f04d4 709 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
Kovalev_D 23:12e6183f04d4 710 }
Kovalev_D 23:12e6183f04d4 711
Kovalev_D 23:12e6183f04d4 712
Kovalev_D 23:12e6183f04d4 713 #if (__CORTEX_M >= 0x03)
Kovalev_D 23:12e6183f04d4 714
Kovalev_D 23:12e6183f04d4 715 /** \brief Enable FIQ
Kovalev_D 23:12e6183f04d4 716
Kovalev_D 23:12e6183f04d4 717 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 718 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 719 */
Kovalev_D 23:12e6183f04d4 720 __attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
Kovalev_D 23:12e6183f04d4 721 {
Kovalev_D 23:12e6183f04d4 722 __ASM volatile ("cpsie f");
Kovalev_D 23:12e6183f04d4 723 }
Kovalev_D 23:12e6183f04d4 724
Kovalev_D 23:12e6183f04d4 725
Kovalev_D 23:12e6183f04d4 726 /** \brief Disable FIQ
Kovalev_D 23:12e6183f04d4 727
Kovalev_D 23:12e6183f04d4 728 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kovalev_D 23:12e6183f04d4 729 Can only be executed in Privileged modes.
Kovalev_D 23:12e6183f04d4 730 */
Kovalev_D 23:12e6183f04d4 731 __attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
Kovalev_D 23:12e6183f04d4 732 {
Kovalev_D 23:12e6183f04d4 733 __ASM volatile ("cpsid f");
Kovalev_D 23:12e6183f04d4 734 }
Kovalev_D 23:12e6183f04d4 735
Kovalev_D 23:12e6183f04d4 736
Kovalev_D 23:12e6183f04d4 737 /** \brief Get Base Priority
Kovalev_D 23:12e6183f04d4 738
Kovalev_D 23:12e6183f04d4 739 This function returns the current value of the Base Priority register.
Kovalev_D 23:12e6183f04d4 740
Kovalev_D 23:12e6183f04d4 741 \return Base Priority register value
Kovalev_D 23:12e6183f04d4 742 */
Kovalev_D 23:12e6183f04d4 743 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
Kovalev_D 23:12e6183f04d4 744 {
Kovalev_D 23:12e6183f04d4 745 uint32_t result;
Kovalev_D 23:12e6183f04d4 746
Kovalev_D 23:12e6183f04d4 747 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 748 return(result);
Kovalev_D 23:12e6183f04d4 749 }
Kovalev_D 23:12e6183f04d4 750
Kovalev_D 23:12e6183f04d4 751
Kovalev_D 23:12e6183f04d4 752 /** \brief Set Base Priority
Kovalev_D 23:12e6183f04d4 753
Kovalev_D 23:12e6183f04d4 754 This function assigns the given value to the Base Priority register.
Kovalev_D 23:12e6183f04d4 755
Kovalev_D 23:12e6183f04d4 756 \param [in] basePri Base Priority value to set
Kovalev_D 23:12e6183f04d4 757 */
Kovalev_D 23:12e6183f04d4 758 __attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
Kovalev_D 23:12e6183f04d4 759 {
Kovalev_D 23:12e6183f04d4 760 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
Kovalev_D 23:12e6183f04d4 761 }
Kovalev_D 23:12e6183f04d4 762
Kovalev_D 23:12e6183f04d4 763
Kovalev_D 23:12e6183f04d4 764 /** \brief Get Fault Mask
Kovalev_D 23:12e6183f04d4 765
Kovalev_D 23:12e6183f04d4 766 This function returns the current value of the Fault Mask register.
Kovalev_D 23:12e6183f04d4 767
Kovalev_D 23:12e6183f04d4 768 \return Fault Mask register value
Kovalev_D 23:12e6183f04d4 769 */
Kovalev_D 23:12e6183f04d4 770 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
Kovalev_D 23:12e6183f04d4 771 {
Kovalev_D 23:12e6183f04d4 772 uint32_t result;
Kovalev_D 23:12e6183f04d4 773
Kovalev_D 23:12e6183f04d4 774 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 775 return(result);
Kovalev_D 23:12e6183f04d4 776 }
Kovalev_D 23:12e6183f04d4 777
Kovalev_D 23:12e6183f04d4 778
Kovalev_D 23:12e6183f04d4 779 /** \brief Set Fault Mask
Kovalev_D 23:12e6183f04d4 780
Kovalev_D 23:12e6183f04d4 781 This function assigns the given value to the Fault Mask register.
Kovalev_D 23:12e6183f04d4 782
Kovalev_D 23:12e6183f04d4 783 \param [in] faultMask Fault Mask value to set
Kovalev_D 23:12e6183f04d4 784 */
Kovalev_D 23:12e6183f04d4 785 __attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
Kovalev_D 23:12e6183f04d4 786 {
Kovalev_D 23:12e6183f04d4 787 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
Kovalev_D 23:12e6183f04d4 788 }
Kovalev_D 23:12e6183f04d4 789
Kovalev_D 23:12e6183f04d4 790 #endif /* (__CORTEX_M >= 0x03) */
Kovalev_D 23:12e6183f04d4 791
Kovalev_D 23:12e6183f04d4 792
Kovalev_D 23:12e6183f04d4 793 #if (__CORTEX_M == 0x04)
Kovalev_D 23:12e6183f04d4 794
Kovalev_D 23:12e6183f04d4 795 /** \brief Get FPSCR
Kovalev_D 23:12e6183f04d4 796
Kovalev_D 23:12e6183f04d4 797 This function returns the current value of the Floating Point Status/Control register.
Kovalev_D 23:12e6183f04d4 798
Kovalev_D 23:12e6183f04d4 799 \return Floating Point Status/Control register value
Kovalev_D 23:12e6183f04d4 800 */
Kovalev_D 23:12e6183f04d4 801 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
Kovalev_D 23:12e6183f04d4 802 {
Kovalev_D 23:12e6183f04d4 803 #if (__FPU_PRESENT == 1)
Kovalev_D 23:12e6183f04d4 804 uint32_t result;
Kovalev_D 23:12e6183f04d4 805
Kovalev_D 23:12e6183f04d4 806 __ASM volatile ("MRS %0, fpscr" : "=r" (result) );
Kovalev_D 23:12e6183f04d4 807 return(result);
Kovalev_D 23:12e6183f04d4 808 #else
Kovalev_D 23:12e6183f04d4 809 return(0);
Kovalev_D 23:12e6183f04d4 810 #endif
Kovalev_D 23:12e6183f04d4 811 }
Kovalev_D 23:12e6183f04d4 812
Kovalev_D 23:12e6183f04d4 813
Kovalev_D 23:12e6183f04d4 814 /** \brief Set FPSCR
Kovalev_D 23:12e6183f04d4 815
Kovalev_D 23:12e6183f04d4 816 This function assigns the given value to the Floating Point Status/Control register.
Kovalev_D 23:12e6183f04d4 817
Kovalev_D 23:12e6183f04d4 818 \param [in] fpscr Floating Point Status/Control value to set
Kovalev_D 23:12e6183f04d4 819 */
Kovalev_D 23:12e6183f04d4 820 __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
Kovalev_D 23:12e6183f04d4 821 {
Kovalev_D 23:12e6183f04d4 822 #if (__FPU_PRESENT == 1)
Kovalev_D 23:12e6183f04d4 823 __ASM volatile ("MSR fpscr, %0" : : "r" (fpscr) );
Kovalev_D 23:12e6183f04d4 824 #endif
Kovalev_D 23:12e6183f04d4 825 }
Kovalev_D 23:12e6183f04d4 826
Kovalev_D 23:12e6183f04d4 827 #endif /* (__CORTEX_M == 0x04) */
Kovalev_D 23:12e6183f04d4 828
Kovalev_D 23:12e6183f04d4 829
Kovalev_D 23:12e6183f04d4 830 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
Kovalev_D 23:12e6183f04d4 831 /* TASKING carm specific functions */
Kovalev_D 23:12e6183f04d4 832
Kovalev_D 23:12e6183f04d4 833 /*
Kovalev_D 23:12e6183f04d4 834 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kovalev_D 23:12e6183f04d4 835 * Please use "carm -?i" to get an up to date list of all instrinsics,
Kovalev_D 23:12e6183f04d4 836 * Including the CMSIS ones.
Kovalev_D 23:12e6183f04d4 837 */
Kovalev_D 23:12e6183f04d4 838
Kovalev_D 23:12e6183f04d4 839 #endif
Kovalev_D 23:12e6183f04d4 840
Kovalev_D 23:12e6183f04d4 841 /*@} end of CMSIS_Core_RegAccFunctions */
Kovalev_D 23:12e6183f04d4 842
Kovalev_D 23:12e6183f04d4 843
Kovalev_D 23:12e6183f04d4 844 #endif /* __CORE_CMFUNC_H__ */