forkd

Dependencies:   mbed

Fork of LG2 by Dmitry Kovalev

Committer:
Kovalev_D
Date:
Wed Feb 03 10:44:42 2016 +0300
Revision:
23:12e6183f04d4
[thyz

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kovalev_D 23:12e6183f04d4 1 ;/*****************************************************************************
Kovalev_D 23:12e6183f04d4 2 ; * @file: startup_LPC17xx.s
Kovalev_D 23:12e6183f04d4 3 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
Kovalev_D 23:12e6183f04d4 4 ; * for the NXP LPC17xx Device Series
Kovalev_D 23:12e6183f04d4 5 ; * @version: V1.02
Kovalev_D 23:12e6183f04d4 6 ; * @date: 27. July 2009
Kovalev_D 23:12e6183f04d4 7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
Kovalev_D 23:12e6183f04d4 8 ; *
Kovalev_D 23:12e6183f04d4 9 ; * Copyright (C) 2009 ARM Limited. All rights reserved.
Kovalev_D 23:12e6183f04d4 10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
Kovalev_D 23:12e6183f04d4 11 ; * processor based microcontrollers. This file can be freely distributed
Kovalev_D 23:12e6183f04d4 12 ; * within development tools that are supporting such ARM based processors.
Kovalev_D 23:12e6183f04d4 13 ; *
Kovalev_D 23:12e6183f04d4 14 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
Kovalev_D 23:12e6183f04d4 15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
Kovalev_D 23:12e6183f04d4 16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
Kovalev_D 23:12e6183f04d4 17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
Kovalev_D 23:12e6183f04d4 18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Kovalev_D 23:12e6183f04d4 19 ; *
Kovalev_D 23:12e6183f04d4 20 ; *****************************************************************************/
Kovalev_D 23:12e6183f04d4 21
Kovalev_D 23:12e6183f04d4 22
Kovalev_D 23:12e6183f04d4 23 ; <h> Stack Configuration
Kovalev_D 23:12e6183f04d4 24 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
Kovalev_D 23:12e6183f04d4 25 ; </h>
Kovalev_D 23:12e6183f04d4 26
Kovalev_D 23:12e6183f04d4 27 Stack_Size EQU 0x00002000
Kovalev_D 23:12e6183f04d4 28
Kovalev_D 23:12e6183f04d4 29 AREA STACK, NOINIT, READWRITE, ALIGN=3
Kovalev_D 23:12e6183f04d4 30 Stack_Mem SPACE Stack_Size
Kovalev_D 23:12e6183f04d4 31 __initial_sp
Kovalev_D 23:12e6183f04d4 32
Kovalev_D 23:12e6183f04d4 33
Kovalev_D 23:12e6183f04d4 34 ; <h> Heap Configuration
Kovalev_D 23:12e6183f04d4 35 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
Kovalev_D 23:12e6183f04d4 36 ; </h>
Kovalev_D 23:12e6183f04d4 37
Kovalev_D 23:12e6183f04d4 38 Heap_Size EQU 0x00000000
Kovalev_D 23:12e6183f04d4 39
Kovalev_D 23:12e6183f04d4 40 AREA HEAP, NOINIT, READWRITE, ALIGN=3
Kovalev_D 23:12e6183f04d4 41 __heap_base
Kovalev_D 23:12e6183f04d4 42 Heap_Mem SPACE Heap_Size
Kovalev_D 23:12e6183f04d4 43 __heap_limit
Kovalev_D 23:12e6183f04d4 44
Kovalev_D 23:12e6183f04d4 45
Kovalev_D 23:12e6183f04d4 46 PRESERVE8
Kovalev_D 23:12e6183f04d4 47 THUMB
Kovalev_D 23:12e6183f04d4 48
Kovalev_D 23:12e6183f04d4 49
Kovalev_D 23:12e6183f04d4 50 ; Vector Table Mapped to Address 0 at Reset
Kovalev_D 23:12e6183f04d4 51
Kovalev_D 23:12e6183f04d4 52 AREA RESET, DATA, READONLY
Kovalev_D 23:12e6183f04d4 53 EXPORT __Vectors
Kovalev_D 23:12e6183f04d4 54
Kovalev_D 23:12e6183f04d4 55 __Vectors DCD __initial_sp ; Top of Stack
Kovalev_D 23:12e6183f04d4 56 DCD Reset_Handler ; Reset Handler
Kovalev_D 23:12e6183f04d4 57 DCD NMI_Handler ; NMI Handler
Kovalev_D 23:12e6183f04d4 58 DCD HardFault_Handler ; Hard Fault Handler
Kovalev_D 23:12e6183f04d4 59 DCD MemManage_Handler ; MPU Fault Handler
Kovalev_D 23:12e6183f04d4 60 DCD BusFault_Handler ; Bus Fault Handler
Kovalev_D 23:12e6183f04d4 61 DCD UsageFault_Handler ; Usage Fault Handler
Kovalev_D 23:12e6183f04d4 62 DCD 0 ; Reserved
Kovalev_D 23:12e6183f04d4 63 DCD 0 ; Reserved
Kovalev_D 23:12e6183f04d4 64 DCD 0 ; Reserved
Kovalev_D 23:12e6183f04d4 65 DCD 0 ; Reserved
Kovalev_D 23:12e6183f04d4 66 DCD SVC_Handler ; SVCall Handler
Kovalev_D 23:12e6183f04d4 67 DCD DebugMon_Handler ; Debug Monitor Handler
Kovalev_D 23:12e6183f04d4 68 DCD 0 ; Reserved
Kovalev_D 23:12e6183f04d4 69 DCD PendSV_Handler ; PendSV Handler
Kovalev_D 23:12e6183f04d4 70 DCD SysTick_Handler ; SysTick Handler
Kovalev_D 23:12e6183f04d4 71
Kovalev_D 23:12e6183f04d4 72 ; External Interrupts
Kovalev_D 23:12e6183f04d4 73 DCD WDT_IRQHandler ; 16: Watchdog Timer
Kovalev_D 23:12e6183f04d4 74 DCD TIMER0_IRQHandler ; 17: Timer0
Kovalev_D 23:12e6183f04d4 75 DCD TIMER1_IRQHandler ; 18: Timer1
Kovalev_D 23:12e6183f04d4 76 DCD TIMER2_IRQHandler ; 19: Timer2
Kovalev_D 23:12e6183f04d4 77 DCD IntLatch_IRQHandler ; 20: Timer3
Kovalev_D 23:12e6183f04d4 78 DCD UART0_IRQHandler ; 21: UART0
Kovalev_D 23:12e6183f04d4 79 DCD UART1_IRQHandler ; 22: UART1
Kovalev_D 23:12e6183f04d4 80 DCD UART2_IRQHandler ; 23: UART2
Kovalev_D 23:12e6183f04d4 81 DCD UART3_IRQHandler ; 24: UART3
Kovalev_D 23:12e6183f04d4 82 DCD PWM1_IRQHandler ; 25: PWM1
Kovalev_D 23:12e6183f04d4 83 DCD I2C0_IRQHandler ; 26: I2C0
Kovalev_D 23:12e6183f04d4 84 DCD I2C1_IRQHandler ; 27: I2C1
Kovalev_D 23:12e6183f04d4 85 DCD I2C2_IRQHandler ; 28: I2C2
Kovalev_D 23:12e6183f04d4 86 DCD SPI_IRQHandler ; 29: SPI
Kovalev_D 23:12e6183f04d4 87 DCD SSP0_IRQHandler ; 30: SSP0
Kovalev_D 23:12e6183f04d4 88 DCD SSP1_IRQHandler ; 31: SSP1
Kovalev_D 23:12e6183f04d4 89 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
Kovalev_D 23:12e6183f04d4 90 DCD RTC_IRQHandler ; 33: Real Time Clock
Kovalev_D 23:12e6183f04d4 91 DCD EINT0_IRQHandler ; 34: External Interrupt 0
Kovalev_D 23:12e6183f04d4 92 DCD EINT1_IRQHandler ; 35: External Interrupt 1
Kovalev_D 23:12e6183f04d4 93 DCD EINT2_IRQHandler ; 36: External Interrupt 2
Kovalev_D 23:12e6183f04d4 94 DCD EINT3_IRQHandler ; 37: External Interrupt 3
Kovalev_D 23:12e6183f04d4 95 DCD ADC_IRQHandler ; 38: A/D Converter
Kovalev_D 23:12e6183f04d4 96 DCD BOD_IRQHandler ; 39: Brown-Out Detect
Kovalev_D 23:12e6183f04d4 97 DCD USB_IRQHandler ; 40: USB
Kovalev_D 23:12e6183f04d4 98 DCD CAN_IRQHandler ; 41: CAN
Kovalev_D 23:12e6183f04d4 99 DCD DMA_IRQHandler ; 42: General Purpose DMA
Kovalev_D 23:12e6183f04d4 100 DCD I2S_IRQHandler ; 43: I2S
Kovalev_D 23:12e6183f04d4 101 DCD ENET_IRQHandler ; 44: Ethernet
Kovalev_D 23:12e6183f04d4 102 DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
Kovalev_D 23:12e6183f04d4 103 DCD MCPWM_IRQHandler ; 46: Motor Control PWM
Kovalev_D 23:12e6183f04d4 104 DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
Kovalev_D 23:12e6183f04d4 105 DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
Kovalev_D 23:12e6183f04d4 106
Kovalev_D 23:12e6183f04d4 107
Kovalev_D 23:12e6183f04d4 108 IF :LNOT::DEF:NO_CRP
Kovalev_D 23:12e6183f04d4 109 AREA |.ARM.__at_0x02FC|, CODE, READONLY
Kovalev_D 23:12e6183f04d4 110 CRP_Key DCD 0xFFFFFFFF
Kovalev_D 23:12e6183f04d4 111 ENDIF
Kovalev_D 23:12e6183f04d4 112
Kovalev_D 23:12e6183f04d4 113
Kovalev_D 23:12e6183f04d4 114 AREA |.text|, CODE, READONLY
Kovalev_D 23:12e6183f04d4 115
Kovalev_D 23:12e6183f04d4 116
Kovalev_D 23:12e6183f04d4 117 ; Reset Handler
Kovalev_D 23:12e6183f04d4 118
Kovalev_D 23:12e6183f04d4 119 Reset_Handler PROC
Kovalev_D 23:12e6183f04d4 120 EXPORT Reset_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 121 IMPORT SystemInit
Kovalev_D 23:12e6183f04d4 122 IMPORT __main
Kovalev_D 23:12e6183f04d4 123 LDR R0, =SystemInit
Kovalev_D 23:12e6183f04d4 124 BLX R0
Kovalev_D 23:12e6183f04d4 125 LDR R0, =__main
Kovalev_D 23:12e6183f04d4 126 BX R0
Kovalev_D 23:12e6183f04d4 127 ENDP
Kovalev_D 23:12e6183f04d4 128
Kovalev_D 23:12e6183f04d4 129
Kovalev_D 23:12e6183f04d4 130 ; Dummy Exception Handlers (infinite loops which can be modified)
Kovalev_D 23:12e6183f04d4 131
Kovalev_D 23:12e6183f04d4 132 NMI_Handler PROC
Kovalev_D 23:12e6183f04d4 133 EXPORT NMI_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 134 B .
Kovalev_D 23:12e6183f04d4 135 ENDP
Kovalev_D 23:12e6183f04d4 136 HardFault_Handler\
Kovalev_D 23:12e6183f04d4 137 PROC
Kovalev_D 23:12e6183f04d4 138 EXPORT HardFault_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 139 B .
Kovalev_D 23:12e6183f04d4 140 ENDP
Kovalev_D 23:12e6183f04d4 141 MemManage_Handler\
Kovalev_D 23:12e6183f04d4 142 PROC
Kovalev_D 23:12e6183f04d4 143 EXPORT MemManage_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 144 B .
Kovalev_D 23:12e6183f04d4 145 ENDP
Kovalev_D 23:12e6183f04d4 146 BusFault_Handler\
Kovalev_D 23:12e6183f04d4 147 PROC
Kovalev_D 23:12e6183f04d4 148 EXPORT BusFault_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 149 B .
Kovalev_D 23:12e6183f04d4 150 ENDP
Kovalev_D 23:12e6183f04d4 151 UsageFault_Handler\
Kovalev_D 23:12e6183f04d4 152 PROC
Kovalev_D 23:12e6183f04d4 153 EXPORT UsageFault_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 154 B .
Kovalev_D 23:12e6183f04d4 155 ENDP
Kovalev_D 23:12e6183f04d4 156 SVC_Handler PROC
Kovalev_D 23:12e6183f04d4 157 EXPORT SVC_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 158 B .
Kovalev_D 23:12e6183f04d4 159 ENDP
Kovalev_D 23:12e6183f04d4 160 DebugMon_Handler\
Kovalev_D 23:12e6183f04d4 161 PROC
Kovalev_D 23:12e6183f04d4 162 EXPORT DebugMon_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 163 B .
Kovalev_D 23:12e6183f04d4 164 ENDP
Kovalev_D 23:12e6183f04d4 165 PendSV_Handler PROC
Kovalev_D 23:12e6183f04d4 166 EXPORT PendSV_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 167 B .
Kovalev_D 23:12e6183f04d4 168 ENDP
Kovalev_D 23:12e6183f04d4 169 SysTick_Handler PROC
Kovalev_D 23:12e6183f04d4 170 EXPORT SysTick_Handler [WEAK]
Kovalev_D 23:12e6183f04d4 171 B .
Kovalev_D 23:12e6183f04d4 172 ENDP
Kovalev_D 23:12e6183f04d4 173
Kovalev_D 23:12e6183f04d4 174 Default_Handler PROC
Kovalev_D 23:12e6183f04d4 175
Kovalev_D 23:12e6183f04d4 176 EXPORT WDT_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 177 EXPORT TIMER0_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 178 EXPORT TIMER1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 179 EXPORT TIMER2_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 180 EXPORT IntLatch_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 181 EXPORT UART0_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 182 EXPORT UART1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 183 EXPORT UART2_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 184 EXPORT UART3_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 185 EXPORT PWM1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 186 EXPORT I2C0_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 187 EXPORT I2C1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 188 EXPORT I2C2_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 189 EXPORT SPI_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 190 EXPORT SSP0_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 191 EXPORT SSP1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 192 EXPORT PLL0_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 193 EXPORT RTC_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 194 EXPORT EINT0_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 195 EXPORT EINT1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 196 EXPORT EINT2_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 197 EXPORT EINT3_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 198 EXPORT ADC_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 199 EXPORT BOD_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 200 EXPORT USB_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 201 EXPORT CAN_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 202 EXPORT DMA_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 203 EXPORT I2S_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 204 EXPORT ENET_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 205 EXPORT RIT_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 206 EXPORT MCPWM_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 207 EXPORT QEI_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 208 EXPORT PLL1_IRQHandler [WEAK]
Kovalev_D 23:12e6183f04d4 209
Kovalev_D 23:12e6183f04d4 210 WDT_IRQHandler
Kovalev_D 23:12e6183f04d4 211 TIMER0_IRQHandler
Kovalev_D 23:12e6183f04d4 212 TIMER1_IRQHandler
Kovalev_D 23:12e6183f04d4 213 TIMER2_IRQHandler
Kovalev_D 23:12e6183f04d4 214 IntLatch_IRQHandler
Kovalev_D 23:12e6183f04d4 215 UART0_IRQHandler
Kovalev_D 23:12e6183f04d4 216 UART1_IRQHandler
Kovalev_D 23:12e6183f04d4 217 UART2_IRQHandler
Kovalev_D 23:12e6183f04d4 218 UART3_IRQHandler
Kovalev_D 23:12e6183f04d4 219 PWM1_IRQHandler
Kovalev_D 23:12e6183f04d4 220 I2C0_IRQHandler
Kovalev_D 23:12e6183f04d4 221 I2C1_IRQHandler
Kovalev_D 23:12e6183f04d4 222 I2C2_IRQHandler
Kovalev_D 23:12e6183f04d4 223 SPI_IRQHandler
Kovalev_D 23:12e6183f04d4 224 SSP0_IRQHandler
Kovalev_D 23:12e6183f04d4 225 SSP1_IRQHandler
Kovalev_D 23:12e6183f04d4 226 PLL0_IRQHandler
Kovalev_D 23:12e6183f04d4 227 RTC_IRQHandler
Kovalev_D 23:12e6183f04d4 228 EINT0_IRQHandler
Kovalev_D 23:12e6183f04d4 229 EINT1_IRQHandler
Kovalev_D 23:12e6183f04d4 230 EINT2_IRQHandler
Kovalev_D 23:12e6183f04d4 231 EINT3_IRQHandler
Kovalev_D 23:12e6183f04d4 232 ADC_IRQHandler
Kovalev_D 23:12e6183f04d4 233 BOD_IRQHandler
Kovalev_D 23:12e6183f04d4 234 USB_IRQHandler
Kovalev_D 23:12e6183f04d4 235 CAN_IRQHandler
Kovalev_D 23:12e6183f04d4 236 DMA_IRQHandler
Kovalev_D 23:12e6183f04d4 237 I2S_IRQHandler
Kovalev_D 23:12e6183f04d4 238 ENET_IRQHandler
Kovalev_D 23:12e6183f04d4 239 RIT_IRQHandler
Kovalev_D 23:12e6183f04d4 240 MCPWM_IRQHandler
Kovalev_D 23:12e6183f04d4 241 QEI_IRQHandler
Kovalev_D 23:12e6183f04d4 242 PLL1_IRQHandler
Kovalev_D 23:12e6183f04d4 243
Kovalev_D 23:12e6183f04d4 244 B .
Kovalev_D 23:12e6183f04d4 245
Kovalev_D 23:12e6183f04d4 246 ENDP
Kovalev_D 23:12e6183f04d4 247
Kovalev_D 23:12e6183f04d4 248
Kovalev_D 23:12e6183f04d4 249 ALIGN
Kovalev_D 23:12e6183f04d4 250
Kovalev_D 23:12e6183f04d4 251
Kovalev_D 23:12e6183f04d4 252 ; User Initial Stack & Heap
Kovalev_D 23:12e6183f04d4 253
Kovalev_D 23:12e6183f04d4 254 IF :DEF:__MICROLIB
Kovalev_D 23:12e6183f04d4 255
Kovalev_D 23:12e6183f04d4 256 EXPORT __initial_sp
Kovalev_D 23:12e6183f04d4 257 EXPORT __heap_base
Kovalev_D 23:12e6183f04d4 258 EXPORT __heap_limit
Kovalev_D 23:12e6183f04d4 259
Kovalev_D 23:12e6183f04d4 260 ELSE
Kovalev_D 23:12e6183f04d4 261
Kovalev_D 23:12e6183f04d4 262 IMPORT __use_two_region_memory
Kovalev_D 23:12e6183f04d4 263 EXPORT __user_initial_stackheap
Kovalev_D 23:12e6183f04d4 264 __user_initial_stackheap
Kovalev_D 23:12e6183f04d4 265
Kovalev_D 23:12e6183f04d4 266 LDR R0, = Heap_Mem
Kovalev_D 23:12e6183f04d4 267 LDR R1, =(Stack_Mem + Stack_Size)
Kovalev_D 23:12e6183f04d4 268 LDR R2, = (Heap_Mem + Heap_Size)
Kovalev_D 23:12e6183f04d4 269 LDR R3, = Stack_Mem
Kovalev_D 23:12e6183f04d4 270 BX LR
Kovalev_D 23:12e6183f04d4 271
Kovalev_D 23:12e6183f04d4 272 ALIGN
Kovalev_D 23:12e6183f04d4 273
Kovalev_D 23:12e6183f04d4 274 ENDIF
Kovalev_D 23:12e6183f04d4 275
Kovalev_D 23:12e6183f04d4 276
Kovalev_D 23:12e6183f04d4 277 END