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host/Source/App/core_cmInstr.h@23:12e6183f04d4, 2016-02-03 (annotated)

Committer:
Kovalev_D
Date:
Wed Feb 03 10:44:42 2016 +0300
Revision:
23:12e6183f04d4
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Kovalev_D 23:12e6183f04d4 1 /**************************************************************************//**
Kovalev_D 23:12e6183f04d4 2 * @file core_cmInstr.h
Kovalev_D 23:12e6183f04d4 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Kovalev_D 23:12e6183f04d4 4 * @version V2.01
Kovalev_D 23:12e6183f04d4 5 * @date 06. December 2010
Kovalev_D 23:12e6183f04d4 6 *
Kovalev_D 23:12e6183f04d4 7 * @note
Kovalev_D 23:12e6183f04d4 8 * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
Kovalev_D 23:12e6183f04d4 9 *
Kovalev_D 23:12e6183f04d4 10 * @par
Kovalev_D 23:12e6183f04d4 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
Kovalev_D 23:12e6183f04d4 12 * processor based microcontrollers. This file can be freely distributed
Kovalev_D 23:12e6183f04d4 13 * within development tools that are supporting such ARM based processors.
Kovalev_D 23:12e6183f04d4 14 *
Kovalev_D 23:12e6183f04d4 15 * @par
Kovalev_D 23:12e6183f04d4 16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
Kovalev_D 23:12e6183f04d4 17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
Kovalev_D 23:12e6183f04d4 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
Kovalev_D 23:12e6183f04d4 19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
Kovalev_D 23:12e6183f04d4 20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Kovalev_D 23:12e6183f04d4 21 *
Kovalev_D 23:12e6183f04d4 22 ******************************************************************************/
Kovalev_D 23:12e6183f04d4 23
Kovalev_D 23:12e6183f04d4 24 #ifndef __CORE_CMINSTR_H__
Kovalev_D 23:12e6183f04d4 25 #define __CORE_CMINSTR_H__
Kovalev_D 23:12e6183f04d4 26
Kovalev_D 23:12e6183f04d4 27
Kovalev_D 23:12e6183f04d4 28 /* ########################## Core Instruction Access ######################### */
Kovalev_D 23:12e6183f04d4 29 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Kovalev_D 23:12e6183f04d4 30 Access to dedicated instructions
Kovalev_D 23:12e6183f04d4 31 @{
Kovalev_D 23:12e6183f04d4 32 */
Kovalev_D 23:12e6183f04d4 33
Kovalev_D 23:12e6183f04d4 34 #if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/
Kovalev_D 23:12e6183f04d4 35 /* ARM armcc specific functions */
Kovalev_D 23:12e6183f04d4 36
Kovalev_D 23:12e6183f04d4 37 /** \brief No Operation
Kovalev_D 23:12e6183f04d4 38
Kovalev_D 23:12e6183f04d4 39 No Operation does nothing. This instruction can be used for code alignment purposes.
Kovalev_D 23:12e6183f04d4 40 */
Kovalev_D 23:12e6183f04d4 41 #define __NOP __nop
Kovalev_D 23:12e6183f04d4 42
Kovalev_D 23:12e6183f04d4 43
Kovalev_D 23:12e6183f04d4 44 /** \brief Wait For Interrupt
Kovalev_D 23:12e6183f04d4 45
Kovalev_D 23:12e6183f04d4 46 Wait For Interrupt is a hint instruction that suspends execution
Kovalev_D 23:12e6183f04d4 47 until one of a number of events occurs.
Kovalev_D 23:12e6183f04d4 48 */
Kovalev_D 23:12e6183f04d4 49 #define __WFI __wfi
Kovalev_D 23:12e6183f04d4 50
Kovalev_D 23:12e6183f04d4 51
Kovalev_D 23:12e6183f04d4 52 /** \brief Wait For Event
Kovalev_D 23:12e6183f04d4 53
Kovalev_D 23:12e6183f04d4 54 Wait For Event is a hint instruction that permits the processor to enter
Kovalev_D 23:12e6183f04d4 55 a low-power state until one of a number of events occurs.
Kovalev_D 23:12e6183f04d4 56 */
Kovalev_D 23:12e6183f04d4 57 #define __WFE __wfe
Kovalev_D 23:12e6183f04d4 58
Kovalev_D 23:12e6183f04d4 59
Kovalev_D 23:12e6183f04d4 60 /** \brief Send Event
Kovalev_D 23:12e6183f04d4 61
Kovalev_D 23:12e6183f04d4 62 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kovalev_D 23:12e6183f04d4 63 */
Kovalev_D 23:12e6183f04d4 64 #define __SEV __sev
Kovalev_D 23:12e6183f04d4 65
Kovalev_D 23:12e6183f04d4 66
Kovalev_D 23:12e6183f04d4 67 /** \brief Instruction Synchronization Barrier
Kovalev_D 23:12e6183f04d4 68
Kovalev_D 23:12e6183f04d4 69 Instruction Synchronization Barrier flushes the pipeline in the processor,
Kovalev_D 23:12e6183f04d4 70 so that all instructions following the ISB are fetched from cache or
Kovalev_D 23:12e6183f04d4 71 memory, after the instruction has been completed.
Kovalev_D 23:12e6183f04d4 72 */
Kovalev_D 23:12e6183f04d4 73 #define __ISB() __isb(0xF)
Kovalev_D 23:12e6183f04d4 74
Kovalev_D 23:12e6183f04d4 75
Kovalev_D 23:12e6183f04d4 76 /** \brief Data Synchronization Barrier
Kovalev_D 23:12e6183f04d4 77
Kovalev_D 23:12e6183f04d4 78 This function acts as a special kind of Data Memory Barrier.
Kovalev_D 23:12e6183f04d4 79 It completes when all explicit memory accesses before this instruction complete.
Kovalev_D 23:12e6183f04d4 80 */
Kovalev_D 23:12e6183f04d4 81 #define __DSB() __dsb(0xF)
Kovalev_D 23:12e6183f04d4 82
Kovalev_D 23:12e6183f04d4 83
Kovalev_D 23:12e6183f04d4 84 /** \brief Data Memory Barrier
Kovalev_D 23:12e6183f04d4 85
Kovalev_D 23:12e6183f04d4 86 This function ensures the apparent order of the explicit memory operations before
Kovalev_D 23:12e6183f04d4 87 and after the instruction, without ensuring their completion.
Kovalev_D 23:12e6183f04d4 88 */
Kovalev_D 23:12e6183f04d4 89 #define __DMB() __dmb(0xF)
Kovalev_D 23:12e6183f04d4 90
Kovalev_D 23:12e6183f04d4 91
Kovalev_D 23:12e6183f04d4 92 /** \brief Reverse byte order (32 bit)
Kovalev_D 23:12e6183f04d4 93
Kovalev_D 23:12e6183f04d4 94 This function reverses the byte order in integer value.
Kovalev_D 23:12e6183f04d4 95
Kovalev_D 23:12e6183f04d4 96 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 97 \return Reversed value
Kovalev_D 23:12e6183f04d4 98 */
Kovalev_D 23:12e6183f04d4 99 #define __REV __rev
Kovalev_D 23:12e6183f04d4 100
Kovalev_D 23:12e6183f04d4 101
Kovalev_D 23:12e6183f04d4 102 /** \brief Reverse byte order (16 bit)
Kovalev_D 23:12e6183f04d4 103
Kovalev_D 23:12e6183f04d4 104 This function reverses the byte order in two unsigned short values.
Kovalev_D 23:12e6183f04d4 105
Kovalev_D 23:12e6183f04d4 106 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 107 \return Reversed value
Kovalev_D 23:12e6183f04d4 108 */
Kovalev_D 23:12e6183f04d4 109 #if (__ARMCC_VERSION < 400677)
Kovalev_D 23:12e6183f04d4 110 extern uint32_t __REV16(uint32_t value);
Kovalev_D 23:12e6183f04d4 111 #else /* (__ARMCC_VERSION >= 400677) */
Kovalev_D 23:12e6183f04d4 112 static __INLINE __ASM uint32_t __REV16(uint32_t value)
Kovalev_D 23:12e6183f04d4 113 {
Kovalev_D 23:12e6183f04d4 114 rev16 r0, r0
Kovalev_D 23:12e6183f04d4 115 bx lr
Kovalev_D 23:12e6183f04d4 116 }
Kovalev_D 23:12e6183f04d4 117 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 118
Kovalev_D 23:12e6183f04d4 119
Kovalev_D 23:12e6183f04d4 120 /** \brief Reverse byte order in signed short value
Kovalev_D 23:12e6183f04d4 121
Kovalev_D 23:12e6183f04d4 122 This function reverses the byte order in a signed short value with sign extension to integer.
Kovalev_D 23:12e6183f04d4 123
Kovalev_D 23:12e6183f04d4 124 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 125 \return Reversed value
Kovalev_D 23:12e6183f04d4 126 */
Kovalev_D 23:12e6183f04d4 127 #if (__ARMCC_VERSION < 400677)
Kovalev_D 23:12e6183f04d4 128 extern int32_t __REVSH(int32_t value);
Kovalev_D 23:12e6183f04d4 129 #else /* (__ARMCC_VERSION >= 400677) */
Kovalev_D 23:12e6183f04d4 130 static __INLINE __ASM int32_t __REVSH(int32_t value)
Kovalev_D 23:12e6183f04d4 131 {
Kovalev_D 23:12e6183f04d4 132 revsh r0, r0
Kovalev_D 23:12e6183f04d4 133 bx lr
Kovalev_D 23:12e6183f04d4 134 }
Kovalev_D 23:12e6183f04d4 135 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 136
Kovalev_D 23:12e6183f04d4 137
Kovalev_D 23:12e6183f04d4 138 #if (__CORTEX_M >= 0x03)
Kovalev_D 23:12e6183f04d4 139
Kovalev_D 23:12e6183f04d4 140 /** \brief Reverse bit order of value
Kovalev_D 23:12e6183f04d4 141
Kovalev_D 23:12e6183f04d4 142 This function reverses the bit order of the given value.
Kovalev_D 23:12e6183f04d4 143
Kovalev_D 23:12e6183f04d4 144 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 145 \return Reversed value
Kovalev_D 23:12e6183f04d4 146 */
Kovalev_D 23:12e6183f04d4 147 #define __RBIT __rbit
Kovalev_D 23:12e6183f04d4 148
Kovalev_D 23:12e6183f04d4 149
Kovalev_D 23:12e6183f04d4 150 /** \brief LDR Exclusive (8 bit)
Kovalev_D 23:12e6183f04d4 151
Kovalev_D 23:12e6183f04d4 152 This function performs a exclusive LDR command for 8 bit value.
Kovalev_D 23:12e6183f04d4 153
Kovalev_D 23:12e6183f04d4 154 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 155 \return value of type uint8_t at (*ptr)
Kovalev_D 23:12e6183f04d4 156 */
Kovalev_D 23:12e6183f04d4 157 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
Kovalev_D 23:12e6183f04d4 158
Kovalev_D 23:12e6183f04d4 159
Kovalev_D 23:12e6183f04d4 160 /** \brief LDR Exclusive (16 bit)
Kovalev_D 23:12e6183f04d4 161
Kovalev_D 23:12e6183f04d4 162 This function performs a exclusive LDR command for 16 bit values.
Kovalev_D 23:12e6183f04d4 163
Kovalev_D 23:12e6183f04d4 164 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 165 \return value of type uint16_t at (*ptr)
Kovalev_D 23:12e6183f04d4 166 */
Kovalev_D 23:12e6183f04d4 167 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
Kovalev_D 23:12e6183f04d4 168
Kovalev_D 23:12e6183f04d4 169
Kovalev_D 23:12e6183f04d4 170 /** \brief LDR Exclusive (32 bit)
Kovalev_D 23:12e6183f04d4 171
Kovalev_D 23:12e6183f04d4 172 This function performs a exclusive LDR command for 32 bit values.
Kovalev_D 23:12e6183f04d4 173
Kovalev_D 23:12e6183f04d4 174 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 175 \return value of type uint32_t at (*ptr)
Kovalev_D 23:12e6183f04d4 176 */
Kovalev_D 23:12e6183f04d4 177 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
Kovalev_D 23:12e6183f04d4 178
Kovalev_D 23:12e6183f04d4 179
Kovalev_D 23:12e6183f04d4 180 /** \brief STR Exclusive (8 bit)
Kovalev_D 23:12e6183f04d4 181
Kovalev_D 23:12e6183f04d4 182 This function performs a exclusive STR command for 8 bit values.
Kovalev_D 23:12e6183f04d4 183
Kovalev_D 23:12e6183f04d4 184 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 185 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 186 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 187 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 188 */
Kovalev_D 23:12e6183f04d4 189 #define __STREXB(value, ptr) __strex(value, ptr)
Kovalev_D 23:12e6183f04d4 190
Kovalev_D 23:12e6183f04d4 191
Kovalev_D 23:12e6183f04d4 192 /** \brief STR Exclusive (16 bit)
Kovalev_D 23:12e6183f04d4 193
Kovalev_D 23:12e6183f04d4 194 This function performs a exclusive STR command for 16 bit values.
Kovalev_D 23:12e6183f04d4 195
Kovalev_D 23:12e6183f04d4 196 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 197 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 198 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 199 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 200 */
Kovalev_D 23:12e6183f04d4 201 #define __STREXH(value, ptr) __strex(value, ptr)
Kovalev_D 23:12e6183f04d4 202
Kovalev_D 23:12e6183f04d4 203
Kovalev_D 23:12e6183f04d4 204 /** \brief STR Exclusive (32 bit)
Kovalev_D 23:12e6183f04d4 205
Kovalev_D 23:12e6183f04d4 206 This function performs a exclusive STR command for 32 bit values.
Kovalev_D 23:12e6183f04d4 207
Kovalev_D 23:12e6183f04d4 208 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 209 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 210 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 211 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 212 */
Kovalev_D 23:12e6183f04d4 213 #define __STREXW(value, ptr) __strex(value, ptr)
Kovalev_D 23:12e6183f04d4 214
Kovalev_D 23:12e6183f04d4 215
Kovalev_D 23:12e6183f04d4 216 /** \brief Remove the exclusive lock
Kovalev_D 23:12e6183f04d4 217
Kovalev_D 23:12e6183f04d4 218 This function removes the exclusive lock which is created by LDREX.
Kovalev_D 23:12e6183f04d4 219
Kovalev_D 23:12e6183f04d4 220 */
Kovalev_D 23:12e6183f04d4 221 #if (__ARMCC_VERSION < 400000)
Kovalev_D 23:12e6183f04d4 222 extern void __CLREX(void);
Kovalev_D 23:12e6183f04d4 223 #else /* (__ARMCC_VERSION >= 400000) */
Kovalev_D 23:12e6183f04d4 224 #define __CLREX __clrex
Kovalev_D 23:12e6183f04d4 225 #endif /* __ARMCC_VERSION */
Kovalev_D 23:12e6183f04d4 226
Kovalev_D 23:12e6183f04d4 227
Kovalev_D 23:12e6183f04d4 228 /** \brief Signed Saturate
Kovalev_D 23:12e6183f04d4 229
Kovalev_D 23:12e6183f04d4 230 This function saturates a signed value.
Kovalev_D 23:12e6183f04d4 231
Kovalev_D 23:12e6183f04d4 232 \param [in] value Value to be saturated
Kovalev_D 23:12e6183f04d4 233 \param [in] sat Bit position to saturate to (1..32)
Kovalev_D 23:12e6183f04d4 234 \return Saturated value
Kovalev_D 23:12e6183f04d4 235 */
Kovalev_D 23:12e6183f04d4 236 #define __SSAT __ssat
Kovalev_D 23:12e6183f04d4 237
Kovalev_D 23:12e6183f04d4 238
Kovalev_D 23:12e6183f04d4 239 /** \brief Unsigned Saturate
Kovalev_D 23:12e6183f04d4 240
Kovalev_D 23:12e6183f04d4 241 This function saturates an unsigned value.
Kovalev_D 23:12e6183f04d4 242
Kovalev_D 23:12e6183f04d4 243 \param [in] value Value to be saturated
Kovalev_D 23:12e6183f04d4 244 \param [in] sat Bit position to saturate to (0..31)
Kovalev_D 23:12e6183f04d4 245 \return Saturated value
Kovalev_D 23:12e6183f04d4 246 */
Kovalev_D 23:12e6183f04d4 247 #define __USAT __usat
Kovalev_D 23:12e6183f04d4 248
Kovalev_D 23:12e6183f04d4 249
Kovalev_D 23:12e6183f04d4 250 /** \brief Count leading zeros
Kovalev_D 23:12e6183f04d4 251
Kovalev_D 23:12e6183f04d4 252 This function counts the number of leading zeros of a data value.
Kovalev_D 23:12e6183f04d4 253
Kovalev_D 23:12e6183f04d4 254 \param [in] value Value to count the leading zeros
Kovalev_D 23:12e6183f04d4 255 \return number of leading zeros in value
Kovalev_D 23:12e6183f04d4 256 */
Kovalev_D 23:12e6183f04d4 257 #define __CLZ __clz
Kovalev_D 23:12e6183f04d4 258
Kovalev_D 23:12e6183f04d4 259 #endif /* (__CORTEX_M >= 0x03) */
Kovalev_D 23:12e6183f04d4 260
Kovalev_D 23:12e6183f04d4 261
Kovalev_D 23:12e6183f04d4 262
Kovalev_D 23:12e6183f04d4 263 #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/
Kovalev_D 23:12e6183f04d4 264 /* IAR iccarm specific functions */
Kovalev_D 23:12e6183f04d4 265
Kovalev_D 23:12e6183f04d4 266 #include <intrinsics.h> /* IAR Intrinsics */
Kovalev_D 23:12e6183f04d4 267
Kovalev_D 23:12e6183f04d4 268 #pragma diag_suppress=Pe940
Kovalev_D 23:12e6183f04d4 269
Kovalev_D 23:12e6183f04d4 270 /** \brief No Operation
Kovalev_D 23:12e6183f04d4 271
Kovalev_D 23:12e6183f04d4 272 No Operation does nothing. This instruction can be used for code alignment purposes.
Kovalev_D 23:12e6183f04d4 273 */
Kovalev_D 23:12e6183f04d4 274 #define __NOP __no_operation
Kovalev_D 23:12e6183f04d4 275
Kovalev_D 23:12e6183f04d4 276
Kovalev_D 23:12e6183f04d4 277 /** \brief Wait For Interrupt
Kovalev_D 23:12e6183f04d4 278
Kovalev_D 23:12e6183f04d4 279 Wait For Interrupt is a hint instruction that suspends execution
Kovalev_D 23:12e6183f04d4 280 until one of a number of events occurs.
Kovalev_D 23:12e6183f04d4 281 */
Kovalev_D 23:12e6183f04d4 282 static __INLINE void __WFI(void)
Kovalev_D 23:12e6183f04d4 283 {
Kovalev_D 23:12e6183f04d4 284 __ASM ("wfi");
Kovalev_D 23:12e6183f04d4 285 }
Kovalev_D 23:12e6183f04d4 286
Kovalev_D 23:12e6183f04d4 287
Kovalev_D 23:12e6183f04d4 288 /** \brief Wait For Event
Kovalev_D 23:12e6183f04d4 289
Kovalev_D 23:12e6183f04d4 290 Wait For Event is a hint instruction that permits the processor to enter
Kovalev_D 23:12e6183f04d4 291 a low-power state until one of a number of events occurs.
Kovalev_D 23:12e6183f04d4 292 */
Kovalev_D 23:12e6183f04d4 293 static __INLINE void __WFE(void)
Kovalev_D 23:12e6183f04d4 294 {
Kovalev_D 23:12e6183f04d4 295 __ASM ("wfe");
Kovalev_D 23:12e6183f04d4 296 }
Kovalev_D 23:12e6183f04d4 297
Kovalev_D 23:12e6183f04d4 298
Kovalev_D 23:12e6183f04d4 299 /** \brief Send Event
Kovalev_D 23:12e6183f04d4 300
Kovalev_D 23:12e6183f04d4 301 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kovalev_D 23:12e6183f04d4 302 */
Kovalev_D 23:12e6183f04d4 303 static __INLINE void __SEV(void)
Kovalev_D 23:12e6183f04d4 304 {
Kovalev_D 23:12e6183f04d4 305 __ASM ("sev");
Kovalev_D 23:12e6183f04d4 306 }
Kovalev_D 23:12e6183f04d4 307
Kovalev_D 23:12e6183f04d4 308
Kovalev_D 23:12e6183f04d4 309 /* intrinsic void __ISB(void) (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 310 /* intrinsic void __DSB(void) (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 311 /* intrinsic void __DMB(void) (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 312 /* intrinsic uint32_t __REV(uint32_t value) (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 313 /* intrinsic __SSAT (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 314 /* intrinsic __USAT (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 315
Kovalev_D 23:12e6183f04d4 316
Kovalev_D 23:12e6183f04d4 317 /** \brief Reverse byte order (16 bit)
Kovalev_D 23:12e6183f04d4 318
Kovalev_D 23:12e6183f04d4 319 This function reverses the byte order in two unsigned short values.
Kovalev_D 23:12e6183f04d4 320
Kovalev_D 23:12e6183f04d4 321 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 322 \return Reversed value
Kovalev_D 23:12e6183f04d4 323 */
Kovalev_D 23:12e6183f04d4 324 static uint32_t __REV16(uint32_t value)
Kovalev_D 23:12e6183f04d4 325 {
Kovalev_D 23:12e6183f04d4 326 __ASM("rev16 r0, r0");
Kovalev_D 23:12e6183f04d4 327 }
Kovalev_D 23:12e6183f04d4 328
Kovalev_D 23:12e6183f04d4 329
Kovalev_D 23:12e6183f04d4 330 /* intrinsic uint32_t __REVSH(uint32_t value) (see intrinsics.h */
Kovalev_D 23:12e6183f04d4 331
Kovalev_D 23:12e6183f04d4 332
Kovalev_D 23:12e6183f04d4 333 #if (__CORTEX_M >= 0x03)
Kovalev_D 23:12e6183f04d4 334
Kovalev_D 23:12e6183f04d4 335 /** \brief Reverse bit order of value
Kovalev_D 23:12e6183f04d4 336
Kovalev_D 23:12e6183f04d4 337 This function reverses the bit order of the given value.
Kovalev_D 23:12e6183f04d4 338
Kovalev_D 23:12e6183f04d4 339 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 340 \return Reversed value
Kovalev_D 23:12e6183f04d4 341 */
Kovalev_D 23:12e6183f04d4 342 static uint32_t __RBIT(uint32_t value)
Kovalev_D 23:12e6183f04d4 343 {
Kovalev_D 23:12e6183f04d4 344 __ASM("rbit r0, r0");
Kovalev_D 23:12e6183f04d4 345 }
Kovalev_D 23:12e6183f04d4 346
Kovalev_D 23:12e6183f04d4 347
Kovalev_D 23:12e6183f04d4 348 /** \brief LDR Exclusive (8 bit)
Kovalev_D 23:12e6183f04d4 349
Kovalev_D 23:12e6183f04d4 350 This function performs a exclusive LDR command for 8 bit value.
Kovalev_D 23:12e6183f04d4 351
Kovalev_D 23:12e6183f04d4 352 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 353 \return value of type uint8_t at (*ptr)
Kovalev_D 23:12e6183f04d4 354 */
Kovalev_D 23:12e6183f04d4 355 static uint8_t __LDREXB(volatile uint8_t *addr)
Kovalev_D 23:12e6183f04d4 356 {
Kovalev_D 23:12e6183f04d4 357 __ASM("ldrexb r0, [r0]");
Kovalev_D 23:12e6183f04d4 358 }
Kovalev_D 23:12e6183f04d4 359
Kovalev_D 23:12e6183f04d4 360
Kovalev_D 23:12e6183f04d4 361 /** \brief LDR Exclusive (16 bit)
Kovalev_D 23:12e6183f04d4 362
Kovalev_D 23:12e6183f04d4 363 This function performs a exclusive LDR command for 16 bit values.
Kovalev_D 23:12e6183f04d4 364
Kovalev_D 23:12e6183f04d4 365 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 366 \return value of type uint16_t at (*ptr)
Kovalev_D 23:12e6183f04d4 367 */
Kovalev_D 23:12e6183f04d4 368 static uint16_t __LDREXH(volatile uint16_t *addr)
Kovalev_D 23:12e6183f04d4 369 {
Kovalev_D 23:12e6183f04d4 370 __ASM("ldrexh r0, [r0]");
Kovalev_D 23:12e6183f04d4 371 }
Kovalev_D 23:12e6183f04d4 372
Kovalev_D 23:12e6183f04d4 373
Kovalev_D 23:12e6183f04d4 374 /** \brief LDR Exclusive (32 bit)
Kovalev_D 23:12e6183f04d4 375
Kovalev_D 23:12e6183f04d4 376 This function performs a exclusive LDR command for 32 bit values.
Kovalev_D 23:12e6183f04d4 377
Kovalev_D 23:12e6183f04d4 378 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 379 \return value of type uint32_t at (*ptr)
Kovalev_D 23:12e6183f04d4 380 */
Kovalev_D 23:12e6183f04d4 381 /* intrinsic unsigned long __LDREX(unsigned long *) (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 382 static uint32_t __LDREXW(volatile uint32_t *addr)
Kovalev_D 23:12e6183f04d4 383 {
Kovalev_D 23:12e6183f04d4 384 __ASM("ldrex r0, [r0]");
Kovalev_D 23:12e6183f04d4 385 }
Kovalev_D 23:12e6183f04d4 386
Kovalev_D 23:12e6183f04d4 387
Kovalev_D 23:12e6183f04d4 388 /** \brief STR Exclusive (8 bit)
Kovalev_D 23:12e6183f04d4 389
Kovalev_D 23:12e6183f04d4 390 This function performs a exclusive STR command for 8 bit values.
Kovalev_D 23:12e6183f04d4 391
Kovalev_D 23:12e6183f04d4 392 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 393 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 394 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 395 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 396 */
Kovalev_D 23:12e6183f04d4 397 static uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Kovalev_D 23:12e6183f04d4 398 {
Kovalev_D 23:12e6183f04d4 399 __ASM("strexb r0, r0, [r1]");
Kovalev_D 23:12e6183f04d4 400 }
Kovalev_D 23:12e6183f04d4 401
Kovalev_D 23:12e6183f04d4 402
Kovalev_D 23:12e6183f04d4 403 /** \brief STR Exclusive (16 bit)
Kovalev_D 23:12e6183f04d4 404
Kovalev_D 23:12e6183f04d4 405 This function performs a exclusive STR command for 16 bit values.
Kovalev_D 23:12e6183f04d4 406
Kovalev_D 23:12e6183f04d4 407 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 408 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 409 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 410 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 411 */
Kovalev_D 23:12e6183f04d4 412 static uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Kovalev_D 23:12e6183f04d4 413 {
Kovalev_D 23:12e6183f04d4 414 __ASM("strexh r0, r0, [r1]");
Kovalev_D 23:12e6183f04d4 415 }
Kovalev_D 23:12e6183f04d4 416
Kovalev_D 23:12e6183f04d4 417
Kovalev_D 23:12e6183f04d4 418 /** \brief STR Exclusive (32 bit)
Kovalev_D 23:12e6183f04d4 419
Kovalev_D 23:12e6183f04d4 420 This function performs a exclusive STR command for 32 bit values.
Kovalev_D 23:12e6183f04d4 421
Kovalev_D 23:12e6183f04d4 422 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 423 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 424 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 425 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 426 */
Kovalev_D 23:12e6183f04d4 427 /* intrinsic unsigned long __STREX(unsigned long, unsigned long) (see intrinsics.h )*/
Kovalev_D 23:12e6183f04d4 428 static uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Kovalev_D 23:12e6183f04d4 429 {
Kovalev_D 23:12e6183f04d4 430 __ASM("strex r0, r0, [r1]");
Kovalev_D 23:12e6183f04d4 431 }
Kovalev_D 23:12e6183f04d4 432
Kovalev_D 23:12e6183f04d4 433
Kovalev_D 23:12e6183f04d4 434 /** \brief Remove the exclusive lock
Kovalev_D 23:12e6183f04d4 435
Kovalev_D 23:12e6183f04d4 436 This function removes the exclusive lock which is created by LDREX.
Kovalev_D 23:12e6183f04d4 437
Kovalev_D 23:12e6183f04d4 438 */
Kovalev_D 23:12e6183f04d4 439 static __INLINE void __CLREX(void)
Kovalev_D 23:12e6183f04d4 440 {
Kovalev_D 23:12e6183f04d4 441 __ASM ("clrex");
Kovalev_D 23:12e6183f04d4 442 }
Kovalev_D 23:12e6183f04d4 443
Kovalev_D 23:12e6183f04d4 444 /* intrinsic unsigned char __CLZ( unsigned long ) (see intrinsics.h) */
Kovalev_D 23:12e6183f04d4 445
Kovalev_D 23:12e6183f04d4 446 #endif /* (__CORTEX_M >= 0x03) */
Kovalev_D 23:12e6183f04d4 447
Kovalev_D 23:12e6183f04d4 448 #pragma diag_default=Pe940
Kovalev_D 23:12e6183f04d4 449
Kovalev_D 23:12e6183f04d4 450
Kovalev_D 23:12e6183f04d4 451
Kovalev_D 23:12e6183f04d4 452 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
Kovalev_D 23:12e6183f04d4 453 /* GNU gcc specific functions */
Kovalev_D 23:12e6183f04d4 454
Kovalev_D 23:12e6183f04d4 455 /** \brief No Operation
Kovalev_D 23:12e6183f04d4 456
Kovalev_D 23:12e6183f04d4 457 No Operation does nothing. This instruction can be used for code alignment purposes.
Kovalev_D 23:12e6183f04d4 458 */
Kovalev_D 23:12e6183f04d4 459 __attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
Kovalev_D 23:12e6183f04d4 460 {
Kovalev_D 23:12e6183f04d4 461 __ASM volatile ("nop");
Kovalev_D 23:12e6183f04d4 462 }
Kovalev_D 23:12e6183f04d4 463
Kovalev_D 23:12e6183f04d4 464
Kovalev_D 23:12e6183f04d4 465 /** \brief Wait For Interrupt
Kovalev_D 23:12e6183f04d4 466
Kovalev_D 23:12e6183f04d4 467 Wait For Interrupt is a hint instruction that suspends execution
Kovalev_D 23:12e6183f04d4 468 until one of a number of events occurs.
Kovalev_D 23:12e6183f04d4 469 */
Kovalev_D 23:12e6183f04d4 470 __attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
Kovalev_D 23:12e6183f04d4 471 {
Kovalev_D 23:12e6183f04d4 472 __ASM volatile ("wfi");
Kovalev_D 23:12e6183f04d4 473 }
Kovalev_D 23:12e6183f04d4 474
Kovalev_D 23:12e6183f04d4 475
Kovalev_D 23:12e6183f04d4 476 /** \brief Wait For Event
Kovalev_D 23:12e6183f04d4 477
Kovalev_D 23:12e6183f04d4 478 Wait For Event is a hint instruction that permits the processor to enter
Kovalev_D 23:12e6183f04d4 479 a low-power state until one of a number of events occurs.
Kovalev_D 23:12e6183f04d4 480 */
Kovalev_D 23:12e6183f04d4 481 __attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
Kovalev_D 23:12e6183f04d4 482 {
Kovalev_D 23:12e6183f04d4 483 __ASM volatile ("wfe");
Kovalev_D 23:12e6183f04d4 484 }
Kovalev_D 23:12e6183f04d4 485
Kovalev_D 23:12e6183f04d4 486
Kovalev_D 23:12e6183f04d4 487 /** \brief Send Event
Kovalev_D 23:12e6183f04d4 488
Kovalev_D 23:12e6183f04d4 489 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Kovalev_D 23:12e6183f04d4 490 */
Kovalev_D 23:12e6183f04d4 491 __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
Kovalev_D 23:12e6183f04d4 492 {
Kovalev_D 23:12e6183f04d4 493 __ASM volatile ("sev");
Kovalev_D 23:12e6183f04d4 494 }
Kovalev_D 23:12e6183f04d4 495
Kovalev_D 23:12e6183f04d4 496
Kovalev_D 23:12e6183f04d4 497 /** \brief Instruction Synchronization Barrier
Kovalev_D 23:12e6183f04d4 498
Kovalev_D 23:12e6183f04d4 499 Instruction Synchronization Barrier flushes the pipeline in the processor,
Kovalev_D 23:12e6183f04d4 500 so that all instructions following the ISB are fetched from cache or
Kovalev_D 23:12e6183f04d4 501 memory, after the instruction has been completed.
Kovalev_D 23:12e6183f04d4 502 */
Kovalev_D 23:12e6183f04d4 503 __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
Kovalev_D 23:12e6183f04d4 504 {
Kovalev_D 23:12e6183f04d4 505 __ASM volatile ("isb");
Kovalev_D 23:12e6183f04d4 506 }
Kovalev_D 23:12e6183f04d4 507
Kovalev_D 23:12e6183f04d4 508
Kovalev_D 23:12e6183f04d4 509 /** \brief Data Synchronization Barrier
Kovalev_D 23:12e6183f04d4 510
Kovalev_D 23:12e6183f04d4 511 This function acts as a special kind of Data Memory Barrier.
Kovalev_D 23:12e6183f04d4 512 It completes when all explicit memory accesses before this instruction complete.
Kovalev_D 23:12e6183f04d4 513 */
Kovalev_D 23:12e6183f04d4 514 __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
Kovalev_D 23:12e6183f04d4 515 {
Kovalev_D 23:12e6183f04d4 516 __ASM volatile ("dsb");
Kovalev_D 23:12e6183f04d4 517 }
Kovalev_D 23:12e6183f04d4 518
Kovalev_D 23:12e6183f04d4 519
Kovalev_D 23:12e6183f04d4 520 /** \brief Data Memory Barrier
Kovalev_D 23:12e6183f04d4 521
Kovalev_D 23:12e6183f04d4 522 This function ensures the apparent order of the explicit memory operations before
Kovalev_D 23:12e6183f04d4 523 and after the instruction, without ensuring their completion.
Kovalev_D 23:12e6183f04d4 524 */
Kovalev_D 23:12e6183f04d4 525 __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
Kovalev_D 23:12e6183f04d4 526 {
Kovalev_D 23:12e6183f04d4 527 __ASM volatile ("dmb");
Kovalev_D 23:12e6183f04d4 528 }
Kovalev_D 23:12e6183f04d4 529
Kovalev_D 23:12e6183f04d4 530
Kovalev_D 23:12e6183f04d4 531 /** \brief Reverse byte order (32 bit)
Kovalev_D 23:12e6183f04d4 532
Kovalev_D 23:12e6183f04d4 533 This function reverses the byte order in integer value.
Kovalev_D 23:12e6183f04d4 534
Kovalev_D 23:12e6183f04d4 535 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 536 \return Reversed value
Kovalev_D 23:12e6183f04d4 537 */
Kovalev_D 23:12e6183f04d4 538 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
Kovalev_D 23:12e6183f04d4 539 {
Kovalev_D 23:12e6183f04d4 540 uint32_t result;
Kovalev_D 23:12e6183f04d4 541
Kovalev_D 23:12e6183f04d4 542 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 23:12e6183f04d4 543 return(result);
Kovalev_D 23:12e6183f04d4 544 }
Kovalev_D 23:12e6183f04d4 545
Kovalev_D 23:12e6183f04d4 546
Kovalev_D 23:12e6183f04d4 547 /** \brief Reverse byte order (16 bit)
Kovalev_D 23:12e6183f04d4 548
Kovalev_D 23:12e6183f04d4 549 This function reverses the byte order in two unsigned short values.
Kovalev_D 23:12e6183f04d4 550
Kovalev_D 23:12e6183f04d4 551 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 552 \return Reversed value
Kovalev_D 23:12e6183f04d4 553 */
Kovalev_D 23:12e6183f04d4 554 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
Kovalev_D 23:12e6183f04d4 555 {
Kovalev_D 23:12e6183f04d4 556 uint32_t result;
Kovalev_D 23:12e6183f04d4 557
Kovalev_D 23:12e6183f04d4 558 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 23:12e6183f04d4 559 return(result);
Kovalev_D 23:12e6183f04d4 560 }
Kovalev_D 23:12e6183f04d4 561
Kovalev_D 23:12e6183f04d4 562
Kovalev_D 23:12e6183f04d4 563 /** \brief Reverse byte order in signed short value
Kovalev_D 23:12e6183f04d4 564
Kovalev_D 23:12e6183f04d4 565 This function reverses the byte order in a signed short value with sign extension to integer.
Kovalev_D 23:12e6183f04d4 566
Kovalev_D 23:12e6183f04d4 567 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 568 \return Reversed value
Kovalev_D 23:12e6183f04d4 569 */
Kovalev_D 23:12e6183f04d4 570 __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
Kovalev_D 23:12e6183f04d4 571 {
Kovalev_D 23:12e6183f04d4 572 uint32_t result;
Kovalev_D 23:12e6183f04d4 573
Kovalev_D 23:12e6183f04d4 574 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 23:12e6183f04d4 575 return(result);
Kovalev_D 23:12e6183f04d4 576 }
Kovalev_D 23:12e6183f04d4 577
Kovalev_D 23:12e6183f04d4 578
Kovalev_D 23:12e6183f04d4 579 #if (__CORTEX_M >= 0x03)
Kovalev_D 23:12e6183f04d4 580
Kovalev_D 23:12e6183f04d4 581 /** \brief Reverse bit order of value
Kovalev_D 23:12e6183f04d4 582
Kovalev_D 23:12e6183f04d4 583 This function reverses the bit order of the given value.
Kovalev_D 23:12e6183f04d4 584
Kovalev_D 23:12e6183f04d4 585 \param [in] value Value to reverse
Kovalev_D 23:12e6183f04d4 586 \return Reversed value
Kovalev_D 23:12e6183f04d4 587 */
Kovalev_D 23:12e6183f04d4 588 __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
Kovalev_D 23:12e6183f04d4 589 {
Kovalev_D 23:12e6183f04d4 590 uint32_t result;
Kovalev_D 23:12e6183f04d4 591
Kovalev_D 23:12e6183f04d4 592 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 23:12e6183f04d4 593 return(result);
Kovalev_D 23:12e6183f04d4 594 }
Kovalev_D 23:12e6183f04d4 595
Kovalev_D 23:12e6183f04d4 596
Kovalev_D 23:12e6183f04d4 597 /** \brief LDR Exclusive (8 bit)
Kovalev_D 23:12e6183f04d4 598
Kovalev_D 23:12e6183f04d4 599 This function performs a exclusive LDR command for 8 bit value.
Kovalev_D 23:12e6183f04d4 600
Kovalev_D 23:12e6183f04d4 601 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 602 \return value of type uint8_t at (*ptr)
Kovalev_D 23:12e6183f04d4 603 */
Kovalev_D 23:12e6183f04d4 604 __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
Kovalev_D 23:12e6183f04d4 605 {
Kovalev_D 23:12e6183f04d4 606 uint8_t result;
Kovalev_D 23:12e6183f04d4 607
Kovalev_D 23:12e6183f04d4 608 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
Kovalev_D 23:12e6183f04d4 609 return(result);
Kovalev_D 23:12e6183f04d4 610 }
Kovalev_D 23:12e6183f04d4 611
Kovalev_D 23:12e6183f04d4 612
Kovalev_D 23:12e6183f04d4 613 /** \brief LDR Exclusive (16 bit)
Kovalev_D 23:12e6183f04d4 614
Kovalev_D 23:12e6183f04d4 615 This function performs a exclusive LDR command for 16 bit values.
Kovalev_D 23:12e6183f04d4 616
Kovalev_D 23:12e6183f04d4 617 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 618 \return value of type uint16_t at (*ptr)
Kovalev_D 23:12e6183f04d4 619 */
Kovalev_D 23:12e6183f04d4 620 __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
Kovalev_D 23:12e6183f04d4 621 {
Kovalev_D 23:12e6183f04d4 622 uint16_t result;
Kovalev_D 23:12e6183f04d4 623
Kovalev_D 23:12e6183f04d4 624 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
Kovalev_D 23:12e6183f04d4 625 return(result);
Kovalev_D 23:12e6183f04d4 626 }
Kovalev_D 23:12e6183f04d4 627
Kovalev_D 23:12e6183f04d4 628
Kovalev_D 23:12e6183f04d4 629 /** \brief LDR Exclusive (32 bit)
Kovalev_D 23:12e6183f04d4 630
Kovalev_D 23:12e6183f04d4 631 This function performs a exclusive LDR command for 32 bit values.
Kovalev_D 23:12e6183f04d4 632
Kovalev_D 23:12e6183f04d4 633 \param [in] ptr Pointer to data
Kovalev_D 23:12e6183f04d4 634 \return value of type uint32_t at (*ptr)
Kovalev_D 23:12e6183f04d4 635 */
Kovalev_D 23:12e6183f04d4 636 __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
Kovalev_D 23:12e6183f04d4 637 {
Kovalev_D 23:12e6183f04d4 638 uint32_t result;
Kovalev_D 23:12e6183f04d4 639
Kovalev_D 23:12e6183f04d4 640 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
Kovalev_D 23:12e6183f04d4 641 return(result);
Kovalev_D 23:12e6183f04d4 642 }
Kovalev_D 23:12e6183f04d4 643
Kovalev_D 23:12e6183f04d4 644
Kovalev_D 23:12e6183f04d4 645 /** \brief STR Exclusive (8 bit)
Kovalev_D 23:12e6183f04d4 646
Kovalev_D 23:12e6183f04d4 647 This function performs a exclusive STR command for 8 bit values.
Kovalev_D 23:12e6183f04d4 648
Kovalev_D 23:12e6183f04d4 649 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 650 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 651 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 652 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 653 */
Kovalev_D 23:12e6183f04d4 654 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Kovalev_D 23:12e6183f04d4 655 {
Kovalev_D 23:12e6183f04d4 656 uint32_t result;
Kovalev_D 23:12e6183f04d4 657
Kovalev_D 23:12e6183f04d4 658 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
Kovalev_D 23:12e6183f04d4 659 return(result);
Kovalev_D 23:12e6183f04d4 660 }
Kovalev_D 23:12e6183f04d4 661
Kovalev_D 23:12e6183f04d4 662
Kovalev_D 23:12e6183f04d4 663 /** \brief STR Exclusive (16 bit)
Kovalev_D 23:12e6183f04d4 664
Kovalev_D 23:12e6183f04d4 665 This function performs a exclusive STR command for 16 bit values.
Kovalev_D 23:12e6183f04d4 666
Kovalev_D 23:12e6183f04d4 667 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 668 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 669 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 670 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 671 */
Kovalev_D 23:12e6183f04d4 672 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Kovalev_D 23:12e6183f04d4 673 {
Kovalev_D 23:12e6183f04d4 674 uint32_t result;
Kovalev_D 23:12e6183f04d4 675
Kovalev_D 23:12e6183f04d4 676 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
Kovalev_D 23:12e6183f04d4 677 return(result);
Kovalev_D 23:12e6183f04d4 678 }
Kovalev_D 23:12e6183f04d4 679
Kovalev_D 23:12e6183f04d4 680
Kovalev_D 23:12e6183f04d4 681 /** \brief STR Exclusive (32 bit)
Kovalev_D 23:12e6183f04d4 682
Kovalev_D 23:12e6183f04d4 683 This function performs a exclusive STR command for 32 bit values.
Kovalev_D 23:12e6183f04d4 684
Kovalev_D 23:12e6183f04d4 685 \param [in] value Value to store
Kovalev_D 23:12e6183f04d4 686 \param [in] ptr Pointer to location
Kovalev_D 23:12e6183f04d4 687 \return 0 Function succeeded
Kovalev_D 23:12e6183f04d4 688 \return 1 Function failed
Kovalev_D 23:12e6183f04d4 689 */
Kovalev_D 23:12e6183f04d4 690 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Kovalev_D 23:12e6183f04d4 691 {
Kovalev_D 23:12e6183f04d4 692 uint32_t result;
Kovalev_D 23:12e6183f04d4 693
Kovalev_D 23:12e6183f04d4 694 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
Kovalev_D 23:12e6183f04d4 695 return(result);
Kovalev_D 23:12e6183f04d4 696 }
Kovalev_D 23:12e6183f04d4 697
Kovalev_D 23:12e6183f04d4 698
Kovalev_D 23:12e6183f04d4 699 /** \brief Remove the exclusive lock
Kovalev_D 23:12e6183f04d4 700
Kovalev_D 23:12e6183f04d4 701 This function removes the exclusive lock which is created by LDREX.
Kovalev_D 23:12e6183f04d4 702
Kovalev_D 23:12e6183f04d4 703 */
Kovalev_D 23:12e6183f04d4 704 __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
Kovalev_D 23:12e6183f04d4 705 {
Kovalev_D 23:12e6183f04d4 706 __ASM volatile ("clrex");
Kovalev_D 23:12e6183f04d4 707 }
Kovalev_D 23:12e6183f04d4 708
Kovalev_D 23:12e6183f04d4 709
Kovalev_D 23:12e6183f04d4 710 /** \brief Signed Saturate
Kovalev_D 23:12e6183f04d4 711
Kovalev_D 23:12e6183f04d4 712 This function saturates a signed value.
Kovalev_D 23:12e6183f04d4 713
Kovalev_D 23:12e6183f04d4 714 \param [in] value Value to be saturated
Kovalev_D 23:12e6183f04d4 715 \param [in] sat Bit position to saturate to (1..32)
Kovalev_D 23:12e6183f04d4 716 \return Saturated value
Kovalev_D 23:12e6183f04d4 717 */
Kovalev_D 23:12e6183f04d4 718 #define __SSAT(ARG1,ARG2) \
Kovalev_D 23:12e6183f04d4 719 ({ \
Kovalev_D 23:12e6183f04d4 720 uint32_t __RES, __ARG1 = (ARG1); \
Kovalev_D 23:12e6183f04d4 721 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kovalev_D 23:12e6183f04d4 722 __RES; \
Kovalev_D 23:12e6183f04d4 723 })
Kovalev_D 23:12e6183f04d4 724
Kovalev_D 23:12e6183f04d4 725
Kovalev_D 23:12e6183f04d4 726 /** \brief Unsigned Saturate
Kovalev_D 23:12e6183f04d4 727
Kovalev_D 23:12e6183f04d4 728 This function saturates an unsigned value.
Kovalev_D 23:12e6183f04d4 729
Kovalev_D 23:12e6183f04d4 730 \param [in] value Value to be saturated
Kovalev_D 23:12e6183f04d4 731 \param [in] sat Bit position to saturate to (0..31)
Kovalev_D 23:12e6183f04d4 732 \return Saturated value
Kovalev_D 23:12e6183f04d4 733 */
Kovalev_D 23:12e6183f04d4 734 #define __USAT(ARG1,ARG2) \
Kovalev_D 23:12e6183f04d4 735 ({ \
Kovalev_D 23:12e6183f04d4 736 uint32_t __RES, __ARG1 = (ARG1); \
Kovalev_D 23:12e6183f04d4 737 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Kovalev_D 23:12e6183f04d4 738 __RES; \
Kovalev_D 23:12e6183f04d4 739 })
Kovalev_D 23:12e6183f04d4 740
Kovalev_D 23:12e6183f04d4 741
Kovalev_D 23:12e6183f04d4 742 /** \brief Count leading zeros
Kovalev_D 23:12e6183f04d4 743
Kovalev_D 23:12e6183f04d4 744 This function counts the number of leading zeros of a data value.
Kovalev_D 23:12e6183f04d4 745
Kovalev_D 23:12e6183f04d4 746 \param [in] value Value to count the leading zeros
Kovalev_D 23:12e6183f04d4 747 \return number of leading zeros in value
Kovalev_D 23:12e6183f04d4 748 */
Kovalev_D 23:12e6183f04d4 749 __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
Kovalev_D 23:12e6183f04d4 750 {
Kovalev_D 23:12e6183f04d4 751 uint8_t result;
Kovalev_D 23:12e6183f04d4 752
Kovalev_D 23:12e6183f04d4 753 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
Kovalev_D 23:12e6183f04d4 754 return(result);
Kovalev_D 23:12e6183f04d4 755 }
Kovalev_D 23:12e6183f04d4 756
Kovalev_D 23:12e6183f04d4 757 #endif /* (__CORTEX_M >= 0x03) */
Kovalev_D 23:12e6183f04d4 758
Kovalev_D 23:12e6183f04d4 759
Kovalev_D 23:12e6183f04d4 760
Kovalev_D 23:12e6183f04d4 761
Kovalev_D 23:12e6183f04d4 762 #elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/
Kovalev_D 23:12e6183f04d4 763 /* TASKING carm specific functions */
Kovalev_D 23:12e6183f04d4 764
Kovalev_D 23:12e6183f04d4 765 /*
Kovalev_D 23:12e6183f04d4 766 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kovalev_D 23:12e6183f04d4 767 * Please use "carm -?i" to get an up to date list of all instrinsics,
Kovalev_D 23:12e6183f04d4 768 * Including the CMSIS ones.
Kovalev_D 23:12e6183f04d4 769 */
Kovalev_D 23:12e6183f04d4 770
Kovalev_D 23:12e6183f04d4 771 #endif
Kovalev_D 23:12e6183f04d4 772
Kovalev_D 23:12e6183f04d4 773 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Kovalev_D 23:12e6183f04d4 774
Kovalev_D 23:12e6183f04d4 775 #endif /* __CORE_CMINSTR_H__ */