forkd

Dependencies:   mbed

Fork of LG2 by Dmitry Kovalev

Committer:
Kovalev_D
Date:
Wed Feb 03 10:44:42 2016 +0300
Revision:
23:12e6183f04d4
[thyz

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kovalev_D 23:12e6183f04d4 1 /**--------------File Info---------------------------------------------------------------------------------
Kovalev_D 23:12e6183f04d4 2 ** File name: CycleSync.h
Kovalev_D 23:12e6183f04d4 3 ** Last modified Date: 2011-09-06
Kovalev_D 23:12e6183f04d4 4 ** Last Version: V1.00
Kovalev_D 23:12e6183f04d4 5 ** Descriptions:
Kovalev_D 23:12e6183f04d4 6 **
Kovalev_D 23:12e6183f04d4 7 **--------------------------------------------------------------------------------------------------------
Kovalev_D 23:12e6183f04d4 8 ** Created by: Electrooptica Inc.
Kovalev_D 23:12e6183f04d4 9 ** Created date: 2011-09-06
Kovalev_D 23:12e6183f04d4 10 ** Version: V1.00
Kovalev_D 23:12e6183f04d4 11 ** Descriptions: There is the routines for device synchronization
Kovalev_D 23:12e6183f04d4 12 **
Kovalev_D 23:12e6183f04d4 13 **--------------------------------------------------------------------------------------------------------
Kovalev_D 23:12e6183f04d4 14 *********************************************************************************************************/
Kovalev_D 23:12e6183f04d4 15 #include "lpc17xx.h"
Kovalev_D 23:12e6183f04d4 16 #include "CntrlGLD.h"
Kovalev_D 23:12e6183f04d4 17
Kovalev_D 23:12e6183f04d4 18 //#define PERFOMANCE
Kovalev_D 23:12e6183f04d4 19
Kovalev_D 23:12e6183f04d4 20 #define DEVICE_SAMPLE_RATE_HZ 10000 //e. sampling frequency 10 kHz //r. ÷àñòîòà äèñêðåòèçàöèè 10 êÃö
Kovalev_D 23:12e6183f04d4 21 #define DEVICE_SAMPLE_RATE_uks 100000000 //e. sampling frequency 10 kHz //r. ÷àñòîòà äèñêðåòèçàöèè 10 êÃö
Kovalev_D 23:12e6183f04d4 22 #define DELAY_UART_ENBL 4000 //e. delay = DELAY_UART_ENBL*8/CLCK
Kovalev_D 23:12e6183f04d4 23 #define DELAY_UART_DISBL 2500 //e. delay = DELAY_UART_ENBL*8/CLCK
Kovalev_D 23:12e6183f04d4 24 #define RATE_REPER_OR_REFMEANDR 0x0000 //e. difference of general counters (not dither counters), latched by Reper or by Sign Meander //r. ðàçíîñòü îáû÷íûõ ñ÷åò÷èêîâ (íå âèáðîñ÷), çàùåëêíóòûõ ïî Reper`ó èëè ïî RefMeandr`ó
Kovalev_D 23:12e6183f04d4 25 #define RATE_VIBRO_1 0x0001 //e. difference of dither counters after the filter of moving average //r. ðàçíîñòü âèáðîñ÷åò÷èêîâ ïîñëå ôèëüòðà ñêîëüç.ñðåäíåãî
Kovalev_D 23:12e6183f04d4 26
Kovalev_D 23:12e6183f04d4 27 #define HALF_PERIOD 0x00000004
Kovalev_D 23:12e6183f04d4 28 #define WHOLE_PERIOD 0x00000008
Kovalev_D 23:12e6183f04d4 29 #define RESET_PERIOD 0x0000000C
Kovalev_D 23:12e6183f04d4 30 //-----------------------------PWM Registers----------------------------------------
Kovalev_D 23:12e6183f04d4 31
Kovalev_D 23:12e6183f04d4 32 #define TCR_CNT_EN 0x00000001
Kovalev_D 23:12e6183f04d4 33 #define TCR_RESET 0x00000002
Kovalev_D 23:12e6183f04d4 34 #define TCR_PWM_EN 0x00000008
Kovalev_D 23:12e6183f04d4 35
Kovalev_D 23:12e6183f04d4 36 #define PWMMR0I (1 << 0)
Kovalev_D 23:12e6183f04d4 37 #define PWMMR0R (1 << 1)
Kovalev_D 23:12e6183f04d4 38 #define PWMMR0S (1 << 2)
Kovalev_D 23:12e6183f04d4 39 #define PWMENA1 (1 << 9)
Kovalev_D 23:12e6183f04d4 40 #define LER0_EN (1 << 0)
Kovalev_D 23:12e6183f04d4 41
Kovalev_D 23:12e6183f04d4 42 //-----------------------Drive cycle registers------------------------------------
Kovalev_D 23:12e6183f04d4 43 #define MR0_RESET 0x00000002
Kovalev_D 23:12e6183f04d4 44 #define MR1_RESET 0x00000010
Kovalev_D 23:12e6183f04d4 45 #define MR1_STOP 0x00000020
Kovalev_D 23:12e6183f04d4 46 #define MR0_STOP 0x00000004
Kovalev_D 23:12e6183f04d4 47 #define MR0_NO_STOP 0x00000000
Kovalev_D 23:12e6183f04d4 48 #define MR0_INT_EN 0x00000001
Kovalev_D 23:12e6183f04d4 49 #define SYNC_CLCK4 0xffff3fff
Kovalev_D 23:12e6183f04d4 50 #define SYNC_CLCK 0xfffffff
Kovalev_D 23:12e6183f04d4 51
Kovalev_D 23:12e6183f04d4 52 //------------------------WDT registers--------------------------------------------
Kovalev_D 23:12e6183f04d4 53 #define WDEN (0x1<<0)
Kovalev_D 23:12e6183f04d4 54 #define WDRESET (0x1<<1)
Kovalev_D 23:12e6183f04d4 55 #define WDTOF (0x1<<2)
Kovalev_D 23:12e6183f04d4 56 #define WDINT (0x1<<3)
Kovalev_D 23:12e6183f04d4 57 #define WDT_FEED_VALUE 0x003FFFFF
Kovalev_D 23:12e6183f04d4 58
Kovalev_D 23:12e6183f04d4 59 extern uint32_t WDTInit( void );
Kovalev_D 23:12e6183f04d4 60 extern void WDTFeed( void );
Kovalev_D 23:12e6183f04d4 61 extern uint32_t Sys_Clock;
Kovalev_D 23:12e6183f04d4 62 extern int32_t time_1_Sec;
Kovalev_D 23:12e6183f04d4 63 extern uint32_t trm_cycl;
Kovalev_D 23:12e6183f04d4 64 extern int32_t PrevPeriod;
Kovalev_D 23:12e6183f04d4 65 extern uint32_t Ext_Latch_ResetEnable;
Kovalev_D 23:12e6183f04d4 66 extern volatile uint32_t Latch_Rdy;
Kovalev_D 23:12e6183f04d4 67 extern volatile uint32_t data_Rdy;
Kovalev_D 23:12e6183f04d4 68 extern int32_t LatchPhase;
Kovalev_D 23:12e6183f04d4 69 extern uint32_t PeriodElapsed;
Kovalev_D 23:12e6183f04d4 70 extern uint32_t count;
Kovalev_D 23:12e6183f04d4 71 extern uint32_t main_cycle_latch;
Kovalev_D 23:12e6183f04d4 72 extern uint32_t Out_main_cycle_latch; //e. counter of main cycles between external latch pulse appearence
Kovalev_D 23:12e6183f04d4 73 extern uint32_t T_latch, Out_T_latch, temp_T_latch;
Kovalev_D 23:12e6183f04d4 74
Kovalev_D 23:12e6183f04d4 75 extern void CounterIquiryCycle_Init(uint32_t);
Kovalev_D 23:12e6183f04d4 76 extern void ExtLatch_Init(void);
Kovalev_D 23:12e6183f04d4 77 extern void IntLatch_Init(void);
Kovalev_D 23:12e6183f04d4 78 extern void Latch_Event(void);
Kovalev_D 23:12e6183f04d4 79 extern void SetIntLatch(uint32_t);
Kovalev_D 23:12e6183f04d4 80 extern void SwitchRefMeandInt(uint32_t);
Kovalev_D 23:12e6183f04d4 81 extern int SwitchMode(void);
Kovalev_D 23:12e6183f04d4 82
Kovalev_D 23:12e6183f04d4 83 #if defined PERFOMANCE
Kovalev_D 23:12e6183f04d4 84 void IntLatch(void);
Kovalev_D 23:12e6183f04d4 85 #endif
Kovalev_D 23:12e6183f04d4 86
Kovalev_D 23:12e6183f04d4 87 void ServiceTime(void);
Kovalev_D 23:12e6183f04d4 88
Kovalev_D 23:12e6183f04d4 89 /*****************************************************************************
Kovalev_D 23:12e6183f04d4 90 ** End Of File
Kovalev_D 23:12e6183f04d4 91 ******************************************************************************/