forkd

Dependencies:   mbed

Fork of LGstaandart by Dmitry Kovalev

Embed: (wiki syntax)

« Back to documentation index

LPC_QEI_TypeDef Struct Reference

LPC_QEI_TypeDef Struct Reference
[LPC17xx_System]

Quadrature Encoder Interface (QEI) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__O uint32_t CON
__I uint32_t STAT
__IO uint32_t CONF
__I uint32_t POS
__IO uint32_t MAXPOS
__IO uint32_t CMPOS0
__IO uint32_t CMPOS1
__IO uint32_t CMPOS2
__I uint32_t INXCNT
__IO uint32_t INXCMP0
__IO uint32_t LOAD
__I uint32_t TIME
__I uint32_t VEL
__I uint32_t CAP
__IO uint32_t VELCOMP
__O uint32_t IEC
__O uint32_t IES
__I uint32_t INTSTAT
__I uint32_t IE
__O uint32_t CLR
__O uint32_t SET

Detailed Description

Quadrature Encoder Interface (QEI) register structure definition.

Definition at line 591 of file LPC17xx.h.


Field Documentation

__I uint32_t CAP

Offset: 0x034 (R/ ) Velocity capture Register

Definition at line 606 of file LPC17xx.h.

__O uint32_t CLR

Offset: 0xFE8 ( /W) Interrupt status clear Register

Definition at line 614 of file LPC17xx.h.

__IO uint32_t CMPOS0

Offset: 0x014 (R/W) Position compare Register 0

Definition at line 598 of file LPC17xx.h.

__IO uint32_t CMPOS1

Offset: 0x018 (R/W) Position compare Register 1

Definition at line 599 of file LPC17xx.h.

__IO uint32_t CMPOS2

Offset: 0x01C (R/W) Position compare Register 2

Definition at line 600 of file LPC17xx.h.

__O uint32_t CON

Offset: 0x000 ( /W) Control Register

Definition at line 593 of file LPC17xx.h.

__IO uint32_t CONF

Offset: 0x008 (R/W) Configuration Register

Definition at line 595 of file LPC17xx.h.

__I uint32_t IE

Offset: 0xFE4 (R/ ) Interrupt enable Register

Definition at line 613 of file LPC17xx.h.

__O uint32_t IEC

Offset: 0xFD8 ( /W) Interrupt enable clear Register

Definition at line 610 of file LPC17xx.h.

__O uint32_t IES

Offset: 0xFDC ( /W) Interrupt enable set Register

Definition at line 611 of file LPC17xx.h.

__I uint32_t INTSTAT

Offset: 0xFE0 (R/ ) Interrupt status Register

Definition at line 612 of file LPC17xx.h.

__IO uint32_t INXCMP0

Offset: 0x024 (R/W) Index compare Register 0

Definition at line 602 of file LPC17xx.h.

__I uint32_t INXCNT

Offset: 0x020 (R/ ) Index count Register

Definition at line 601 of file LPC17xx.h.

__IO uint32_t LOAD

Offset: 0x028 (R/W) Velocity timer reload Register

Definition at line 603 of file LPC17xx.h.

__IO uint32_t MAXPOS

Offset: 0x010 (R/W) Maximum position Register

Definition at line 597 of file LPC17xx.h.

__I uint32_t POS

Offset: 0x00C (R/ ) Position Register

Definition at line 596 of file LPC17xx.h.

__O uint32_t SET

Offset: 0xFEC ( /W) Interrupt status set Register

Definition at line 615 of file LPC17xx.h.

__I uint32_t STAT

Offset: 0x004 (R/ ) Encoder Status Register

Definition at line 594 of file LPC17xx.h.

__I uint32_t TIME

Offset: 0x02C (R/ ) Velocity timer Register

Definition at line 604 of file LPC17xx.h.

__I uint32_t VEL

Offset: 0x030 (R/ ) Velocity counter Register

Definition at line 605 of file LPC17xx.h.

__IO uint32_t VELCOMP

Offset: 0x038 (R/W) Velocity compare Register

Definition at line 607 of file LPC17xx.h.