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LPC_PWM_TypeDef Struct Reference
Data Fields

LPC_PWM_TypeDef Struct Reference
[LPC17xx_System]

Pulse-Width Modulation (PWM) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t IR
__IO uint32_t TCR
__IO uint32_t TC
__IO uint32_t PR
__IO uint32_t PC
__IO uint32_t MCR
__IO uint32_t MR0
__IO uint32_t MR1
__IO uint32_t MR2
__IO uint32_t MR3
__IO uint32_t CCR
__I uint32_t CR0
__I uint32_t CR1
__I uint32_t CR2
__I uint32_t CR3
__IO uint32_t MR4
__IO uint32_t MR5
__IO uint32_t MR6
__IO uint32_t PCR
__IO uint32_t LER
__IO uint32_t CTCR

Detailed Description

Pulse-Width Modulation (PWM) register structure definition.

Definition at line 314 of file LPC17xx.h.

Field Documentation

__IO uint32_t CCR

Offset: 0x028 (R/W) Capture Control Register

Definition at line 326 of file LPC17xx.h.

__I uint32_t CR0

Offset: 0x02C (R/ ) Capture Register 0

Definition at line 327 of file LPC17xx.h.

__I uint32_t CR1

Offset: 0x030 (R/ ) Capture Register 1

Definition at line 328 of file LPC17xx.h.

__I uint32_t CR2

Offset: 0x034 (R/ ) Capture Register 2

Definition at line 329 of file LPC17xx.h.

__I uint32_t CR3

Offset: 0x038 (R/ ) Capture Register 3

Definition at line 330 of file LPC17xx.h.

__IO uint32_t CTCR

Offset: 0x070 (R/W) Count Control Register

Definition at line 338 of file LPC17xx.h.

__IO uint32_t IR

Offset: 0x000 (R/W) Interrupt Register

Definition at line 316 of file LPC17xx.h.

__IO uint32_t LER

Offset: 0x050 (R/W) Load Enable Register

Definition at line 336 of file LPC17xx.h.

__IO uint32_t MCR

Offset: 0x014 (R/W) Match Control Register

Definition at line 321 of file LPC17xx.h.

__IO uint32_t MR0

Offset: 0x018 (R/W) Match Register 0

Definition at line 322 of file LPC17xx.h.

__IO uint32_t MR1

Offset: 0x01C (R/W) Match Register 1

Definition at line 323 of file LPC17xx.h.

__IO uint32_t MR2

Offset: 0x020 (R/W) Match Register 2

Definition at line 324 of file LPC17xx.h.

__IO uint32_t MR3

Offset: 0x024 (R/W) Match Register 3

Definition at line 325 of file LPC17xx.h.

__IO uint32_t MR4

Offset: 0x040 (R/W) Match Register 4

Definition at line 332 of file LPC17xx.h.

__IO uint32_t MR5

Offset: 0x044 (R/W) Match Register 5

Definition at line 333 of file LPC17xx.h.

__IO uint32_t MR6

Offset: 0x048 (R/W) Match Register 6

Definition at line 334 of file LPC17xx.h.

__IO uint32_t PC

Offset: 0x010 (R/W) Prescale Counter Register

Definition at line 320 of file LPC17xx.h.

__IO uint32_t PCR

Offset: 0x04C (R/W) PWM Control Register

Definition at line 335 of file LPC17xx.h.

__IO uint32_t PR

Offset: 0x00C (R/W) Prescale Register

Definition at line 319 of file LPC17xx.h.

__IO uint32_t TC

Offset: 0x008 (R/W) Timer Counter Register

Definition at line 318 of file LPC17xx.h.

__IO uint32_t TCR

Offset: 0x004 (R/W) Timer Control Register. Register

Definition at line 317 of file LPC17xx.h.

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