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LPC_I2C_TypeDef Struct Reference
Data Fields

LPC_I2C_TypeDef Struct Reference
[LPC17xx_System]

Inter-Integrated Circuit (I2C) register structure definition. More...

#include <LPC17xx.h>

Data Fields

__IO uint32_t CONSET
__I uint32_t STAT
__IO uint32_t DAT
__IO uint32_t ADR0
__IO uint32_t SCLH
__IO uint32_t SCLL
__O uint32_t CONCLR
__IO uint32_t MMCTRL
__IO uint32_t ADR1
__IO uint32_t ADR2
__IO uint32_t ADR3
__I uint32_t DATA_BUFFER
__IO uint32_t MASK0
__IO uint32_t MASK1
__IO uint32_t MASK2
__IO uint32_t MASK3

Detailed Description

Inter-Integrated Circuit (I2C) register structure definition.

Definition at line 432 of file LPC17xx.h.

Field Documentation

__IO uint32_t ADR0

Offset: 0x00C (R/W) I2C Slave Address Register 0

Definition at line 437 of file LPC17xx.h.

__IO uint32_t ADR1

Offset: 0x020 (R/W) I2C Slave Address Register 1

Definition at line 442 of file LPC17xx.h.

__IO uint32_t ADR2

Offset: 0x024 (R/W) I2C Slave Address Register 2

Definition at line 443 of file LPC17xx.h.

__IO uint32_t ADR3

Offset: 0x028 (R/W) I2C Slave Address Register 3

Definition at line 444 of file LPC17xx.h.

__O uint32_t CONCLR

Offset: 0x018 (R/W) I2C Control Clear Register

Definition at line 440 of file LPC17xx.h.

__IO uint32_t CONSET

Offset: 0x000 (R/W) I2C Control Set Register

Definition at line 434 of file LPC17xx.h.

__IO uint32_t DAT

Offset: 0x008 (R/W) I2C Data Register

Definition at line 436 of file LPC17xx.h.

__I uint32_t DATA_BUFFER

Offset: 0x02C (R/ ) Data buffer Register

Definition at line 445 of file LPC17xx.h.

__IO uint32_t MASK0

Offset: 0x030 (R/W) I2C Slave address mask register 0

Definition at line 446 of file LPC17xx.h.

__IO uint32_t MASK1

Offset: 0x034 (R/W) I2C Slave address mask register 1

Definition at line 447 of file LPC17xx.h.

__IO uint32_t MASK2

Offset: 0x038 (R/W) I2C Slave address mask register 2

Definition at line 448 of file LPC17xx.h.

__IO uint32_t MASK3

Offset: 0x03C (R/W) I2C Slave address mask register 3

Definition at line 449 of file LPC17xx.h.

__IO uint32_t MMCTRL

Offset: 0x01C (R/W) Monitor mode control register

Definition at line 441 of file LPC17xx.h.

__IO uint32_t SCLH

Offset: 0x010 (R/W) SCH Duty Cycle Register High Half Word

Definition at line 438 of file LPC17xx.h.

__IO uint32_t SCLL

Offset: 0x014 (R/W) SCL Duty Cycle Register Low Half Word

Definition at line 439 of file LPC17xx.h.

__I uint32_t STAT

Offset: 0x004 (R/ ) I2C Status Register

Definition at line 435 of file LPC17xx.h.

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