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Diff: system_LPC17xx.c
- Revision:
- 117:eefe61968528
- Parent:
- 116:66f1f0ff2dab
- Child:
- 123:6dd1df6230e9
diff -r 66f1f0ff2dab -r eefe61968528 system_LPC17xx.c --- a/system_LPC17xx.c Tue Apr 05 16:52:31 2016 +0000 +++ b/system_LPC17xx.c Wed Apr 06 13:41:25 2016 +0000 @@ -338,7 +338,8 @@ // 01 PCLK_peripheral = CCLK // 10 PCLK_peripheral = CCLK/2 // 11 PCLK_peripheral = CCLK/8, except for CAN1, CAN2, and CAN filtering when “11” selects = CCLK/6. -#define PCLKSEL0_Val 0x00000010//Peripheral clock selection for TIMER1 - CCLK, other peripherals - CCLK/4 +//#define PCLKSEL0_Val 0x00000010//Peripheral clock selection for TIMER1 - CCLK, other peripherals - CCLK/4 +#define PCLKSEL0_Val 0x00000150//Peripheral clock selection for TIMER1 - CCLK, other peripherals - CCLK/4 //Peripheral Clock Selection register 1 // 1:0 PCLK_QEI Peripheral clock selection for the Quadrature Encoder Interface.00 // 3:2 PCLK_GPIOINT Peripheral clock selection for GPIO interrupts. 00