Diff: host/Source/App/uart.h

Revision:

23:12e6183f04d4

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/host/Source/App/uart.h	Wed Feb 03 10:44:42 2016 +0300
@@ -0,0 +1,88 @@
+/****************************************************************************
+ *   $Id:: uart.h 5751 2010-11-30 23:56:11Z usb00423                        $
+ *   Project: NXP LPC17xx UART example
+ *
+ *   Description:
+ *     This file contains UART code header definition.
+ *
+ ****************************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * NXP Semiconductors assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. NXP Semiconductors
+ * reserves the right to make changes in the software without
+ * notification. NXP Semiconductors also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+****************************************************************************/
+#ifndef __UART_H 
+#define __UART_H
+
+#define SIMPLEUARTRX
+
+/*	State-machine variable to control application functionality */
+enum state_machine {
+	UNKNOWN_COMMAND,
+	WRITE4SECTOR = 101,	// actions with flash: erase
+	WAIT_ENTRANCE,		// waiting for bootloader entrance
+	WAIT_FLASHACTION = 113,   // waiting for an action with flash
+	READ_FLASH = 114,	// actions with flash: read
+	WRITE_FLASH = 119	// actions with flash: write
+
+};
+#define IER_RBR		0x01
+#define IER_THRE	0x02
+#define IER_RLS		0x04
+
+#define IIR_PEND	0x01
+#define IIR_RLS		0x03
+#define IIR_RDA		0x02
+#define IIR_CTI		0x06
+#define IIR_THRE	0x01
+
+#define LSR_RDR		0x01
+#define LSR_OE		0x02
+#define LSR_PE		0x04
+#define LSR_FE		0x08
+#define LSR_BI		0x10
+#define LSR_THRE	0x20
+#define LSR_TEMT	0x40
+#define LSR_RXFE	0x80
+
+#define BUFSIZE		0x40
+#define FIFOs_En			0x00000001
+#define RX_FIFO_Reset		0x00000002
+#define TX_FIFO_Reset		0x00000004
+#define DMA_Mode_UART		0x00000008
+#define RX_TrigLvl_1		0x00000000
+#define RX_TrigLvl_4		0x00000040
+#define RX_TrigLvl_8		0x00000080
+#define RX_TrigLvl_14		0x000000C0
+
+#define	word_length_8		0x00000003
+
+#define one_stop_bit	    0x00000000
+
+#define no_parity			0x00000000
+
+#define back_trans_dis	    0x00000000
+
+#define DLAB_access			0x00000080
+
+#define TRANS_SHIFT_BUF_EMPTY		0x00000040
+#define RecievBufNOTEmpty		0x00000001
+#define DIS_ALL_INT			0x00000000
+#define RBR_IntEnabl		0x00000001
+
+void UART2_Init(void);
+
+int UART2_SendByte (int ucData);
+
+
+
+#endif /* end __UART_H */
+/*****************************************************************************
+**                            End Of File
+******************************************************************************/