Dmitry Kovalev
/
LG2
fork
Fork of LG by
Diff: Global.c
- Revision:
- 92:c892f0311aa7
- Parent:
- 91:a2bb81eaa183
- Child:
- 95:dd51e577e114
diff -r a2bb81eaa183 -r c892f0311aa7 Global.c --- a/Global.c Thu Mar 24 14:46:58 2016 +0000 +++ b/Global.c Fri Mar 25 11:11:46 2016 +0000 @@ -109,15 +109,14 @@ - /* + Gyro.SOC_Out=0xDD; Gyro.Firmware_Version =0x15; //версия программы Gyro.GLD_Serial = 0x20; //серийный номер Gyro.My_Addres = 0; //адрес глд Gyro.Discharg = StartDischarg; Gyro.BackLight = StartBackLight; - */ - + @@ -198,6 +197,63 @@ + + + + /////////////////////////////////////////////////////// + /////////////////////////////////////////////////////// + //////////////////////////SPI////////////////////////// + /////////////////////////////////////////////////////// + Dummy = Dummy; + + /* Enable AHB clock to the SSP0, SSP1 */ + LPC_SC->PCONP |= (0x1<<21); // включение SSP0. + + /* выбор частоты для переферии используем по умолчания с делителем основной на 4 */ + LPC_SC->PCLKSEL1 &= ~(0x3<<10); //00 CLK/4; 1 CLK; 2 CLK/2; 3 CLK/8 + LPC_SC->PCLKSEL1 |= (0x0<<10); //00 CLK/4; 1 CLK; 2 CLK/2; 3 CLK/ + + // P0.15~0.18 as SSP0 + LPC_PINCON->PINSEL0 &= ~(0x3UL<<30); //установит Р 0.15 + LPC_PINCON->PINSEL0 |= (0x2UL<<30); //частота для синхронизациии Master - slave + + LPC_PINCON->PINSEL1 &= ~((0x3<<0)|(0x3<<2)|(0x3<<4)); // устанивоить Р 0.17 и Р 0.18 + LPC_PINCON->PINSEL1 |= ((0x2<<2)|(0x2<<4)); // как MISO0 и MOSI0 + + LPC_PINCON->PINMODE0 &= ~(0x3UL<<30);// ? установление на Р 0.15 режима On-Chip pull-down resistor enabled + LPC_PINCON->PINMODE0 |= (0x3UL<<30);// ? установление на Р 0.15 режима On-Chip pull-down resistor enabled + + LPC_PINCON->PINMODE1 &= ~((0x3<<2)|(0x3<<4));// ? установление на Р 0.17 и Р 0.18 режима On-Chip pull-down resistor enabled + LPC_PINCON->PINMODE1 |= ((0x3<<2)|(0x3<<4));// ? установление на Р 0.17 и Р 0.18 режима On-Chip pull-down resistor enabled + + LPC_SSP0->CR0 = ((3<<8)|(0<<7)|(0<<4) |0xF); // (0xF)-установление DSS(Data sise select) в 16-битный формат, (3<<8 scr - выбор частоты), + // низкий уровень линии тактирования между кадрами, прикрепление передачи к первому нарастанию тактового мигнала + // формат кадра TI. + + /* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */ + LPC_SSP0->CPSR = 0x2; // freq = CLK/(cpsdvr*(scr+1)) = 1.6 MHz + + /*SSP enable, master mode */ + LPC_SSP0->CR1 = SSPCR1_SSE; +// LPC_SSP1->CR1 = SSPCR1_SSE; + while (LPC_SSP0->SR & SSP_BUSY); + while (LPC_SSP0->SR & RX_SSP_notEMPT) /* clear the RxFIFO */ + Dummy = LPC_SSP0->DR; + //all pins after reset is in GPIO mode, so CS pins needn't to configure + LPC_GPIO0->FIODIR |= (1<<16); // P0.16 defined as CS for ADC + LPC_GPIO0->FIOSET |= (1<<16); // set CS for ADC + + LPC_GPIO0->FIODIR |= (1<<23); // P defined as CS for DAC + LPC_GPIO0->FIOCLR |= (1<<23); // set CS for DAC + while (LPC_SSP1->SR & RX_SSP_notEMPT) + Dummy = LPC_SSP1->DR; /* clear the RxFIFO */ +///////////////////////////////////////////////////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////////////////////////////////////////////////// + + + + ///////////////////////////////////////////////////// /////////////////инициализация ног/////////////////// ///////////////////////////////////////////////////// @@ -324,10 +380,10 @@ LPC_GPIO0->FIODIR |= (1<<16); // P0.16 defined as CS for ADC LPC_GPIO0->FIOSET |= (1<<16); // set CS for ADC - LPC_GPIO0->FIODIR |= (1<<23); // P defined as CS for DAC - LPC_GPIO0->FIOCLR |= (1<<23); // set CS for DAC -/* while (LPC_SSP1->SR & RX_SSP_notEMPT) - Dummy = LPC_SSP1->DR;*/ /* clear the RxFIFO */ + LPC_GPIO0->FIODIR |= (1<<23); // P defined as CS for DAC + LPC_GPIO0->FIOCLR |= (1<<23); // set CS for DAC + while (LPC_SSP1->SR & RX_SSP_notEMPT) + Dummy = LPC_SSP1->DR; /* clear the RxFIFO */ }