Dmitry Kovalev
fork
Diff: core_cm3.c
- Revision:
- 21:bc8c1cec3da6
- Parent:
- 11:af609f6dee46
- Child:
- 83:507b9fd33af4
--- a/core_cm3.c Tue Feb 02 17:14:25 2016 +0000
+++ b/core_cm3.c Wed Feb 03 07:19:30 2016 +0000
@@ -8,9 +8,9 @@
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
@@ -25,20 +25,20 @@
/* define compiler specific symbols */
#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
+#define __ASM __asm /*!< asm keyword for ARM Compiler */
+#define __INLINE __inline /*!< inline keyword for ARM Compiler */
#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
+#define __ASM __asm /*!< asm keyword for IAR Compiler */
+#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
+#define __ASM __asm /*!< asm keyword for GNU Compiler */
+#define __INLINE inline /*!< inline keyword for GNU Compiler */
#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
+#define __ASM __asm /*!< asm keyword for TASKING Compiler */
+#define __INLINE inline /*!< inline keyword for TASKING Compiler */
#endif
@@ -57,8 +57,8 @@
*/
__ASM uint32_t __get_PSP(void)
{
- mrs r0, psp
- bx lr
+ mrs r0, psp
+ bx lr
}
/**
@@ -66,13 +66,13 @@
*
* @param topOfProcStack Process Stack Pointer
*
- * Assign the value ProcessStackPointer to the MSP
+ * Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
__ASM void __set_PSP(uint32_t topOfProcStack)
{
- msr psp, r0
- bx lr
+ msr psp, r0
+ bx lr
}
/**
@@ -85,8 +85,8 @@
*/
__ASM uint32_t __get_MSP(void)
{
- mrs r0, msp
- bx lr
+ mrs r0, msp
+ bx lr
}
/**
@@ -94,13 +94,13 @@
*
* @param topOfMainStack Main Stack Pointer
*
- * Assign the value mainStackPointer to the MSP
+ * Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
__ASM void __set_MSP(uint32_t mainStackPointer)
{
- msr msp, r0
- bx lr
+ msr msp, r0
+ bx lr
}
/**
@@ -113,8 +113,8 @@
*/
__ASM uint32_t __REV16(uint16_t value)
{
- rev16 r0, r0
- bx lr
+ rev16 r0, r0
+ bx lr
}
/**
@@ -127,8 +127,8 @@
*/
__ASM int32_t __REVSH(int16_t value)
{
- revsh r0, r0
- bx lr
+ revsh r0, r0
+ bx lr
}
@@ -141,7 +141,7 @@
*/
__ASM void __CLREX(void)
{
- clrex
+ clrex
}
/**
@@ -153,8 +153,8 @@
*/
__ASM uint32_t __get_BASEPRI(void)
{
- mrs r0, basepri
- bx lr
+ mrs r0, basepri
+ bx lr
}
/**
@@ -166,8 +166,8 @@
*/
__ASM void __set_BASEPRI(uint32_t basePri)
{
- msr basepri, r0
- bx lr
+ msr basepri, r0
+ bx lr
}
/**
@@ -179,8 +179,8 @@
*/
__ASM uint32_t __get_PRIMASK(void)
{
- mrs r0, primask
- bx lr
+ mrs r0, primask
+ bx lr
}
/**
@@ -192,8 +192,8 @@
*/
__ASM void __set_PRIMASK(uint32_t priMask)
{
- msr primask, r0
- bx lr
+ msr primask, r0
+ bx lr
}
/**
@@ -205,8 +205,8 @@
*/
__ASM uint32_t __get_FAULTMASK(void)
{
- mrs r0, faultmask
- bx lr
+ mrs r0, faultmask
+ bx lr
}
/**
@@ -218,21 +218,21 @@
*/
__ASM void __set_FAULTMASK(uint32_t faultMask)
{
- msr faultmask, r0
- bx lr
+ msr faultmask, r0
+ bx lr
}
/**
* @brief Return the Control Register value
- *
+ *
* @return Control value
*
* Return the content of the control register
*/
__ASM uint32_t __get_CONTROL(void)
{
- mrs r0, control
- bx lr
+ mrs r0, control
+ bx lr
}
/**
@@ -244,11 +244,11 @@
*/
__ASM void __set_CONTROL(uint32_t control)
{
- msr control, r0
- bx lr
+ msr control, r0
+ bx lr
}
-#endif /* __ARMCC_VERSION */
+#endif /* __ARMCC_VERSION */
@@ -265,8 +265,8 @@
*/
uint32_t __get_PSP(void)
{
- __ASM("mrs r0, psp");
- __ASM("bx lr");
+ __ASM("mrs r0, psp");
+ __ASM("bx lr");
}
/**
@@ -274,13 +274,13 @@
*
* @param topOfProcStack Process Stack Pointer
*
- * Assign the value ProcessStackPointer to the MSP
+ * Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack)
{
- __ASM("msr psp, r0");
- __ASM("bx lr");
+ __ASM("msr psp, r0");
+ __ASM("bx lr");
}
/**
@@ -293,8 +293,8 @@
*/
uint32_t __get_MSP(void)
{
- __ASM("mrs r0, msp");
- __ASM("bx lr");
+ __ASM("mrs r0, msp");
+ __ASM("bx lr");
}
/**
@@ -302,13 +302,13 @@
*
* @param topOfMainStack Main Stack Pointer
*
- * Assign the value mainStackPointer to the MSP
+ * Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack)
{
- __ASM("msr msp, r0");
- __ASM("bx lr");
+ __ASM("msr msp, r0");
+ __ASM("bx lr");
}
/**
@@ -321,8 +321,8 @@
*/
uint32_t __REV16(uint16_t value)
{
- __ASM("rev16 r0, r0");
- __ASM("bx lr");
+ __ASM("rev16 r0, r0");
+ __ASM("bx lr");
}
/**
@@ -335,8 +335,8 @@
*/
uint32_t __RBIT(uint32_t value)
{
- __ASM("rbit r0, r0");
- __ASM("bx lr");
+ __ASM("rbit r0, r0");
+ __ASM("bx lr");
}
/**
@@ -349,8 +349,8 @@
*/
uint8_t __LDREXB(uint8_t *addr)
{
- __ASM("ldrexb r0, [r0]");
- __ASM("bx lr");
+ __ASM("ldrexb r0, [r0]");
+ __ASM("bx lr");
}
/**
@@ -363,8 +363,8 @@
*/
uint16_t __LDREXH(uint16_t *addr)
{
- __ASM("ldrexh r0, [r0]");
- __ASM("bx lr");
+ __ASM("ldrexh r0, [r0]");
+ __ASM("bx lr");
}
/**
@@ -377,8 +377,8 @@
*/
uint32_t __LDREXW(uint32_t *addr)
{
- __ASM("ldrex r0, [r0]");
- __ASM("bx lr");
+ __ASM("ldrex r0, [r0]");
+ __ASM("bx lr");
}
/**
@@ -392,8 +392,8 @@
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
- __ASM("strexb r0, r0, [r1]");
- __ASM("bx lr");
+ __ASM("strexb r0, r0, [r1]");
+ __ASM("bx lr");
}
/**
@@ -407,8 +407,8 @@
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
- __ASM("strexh r0, r0, [r1]");
- __ASM("bx lr");
+ __ASM("strexh r0, r0, [r1]");
+ __ASM("bx lr");
}
/**
@@ -422,8 +422,8 @@
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
- __ASM("strex r0, r0, [r1]");
- __ASM("bx lr");
+ __ASM("strex r0, r0, [r1]");
+ __ASM("bx lr");
}
#pragma diag_default=Pe940
@@ -442,12 +442,12 @@
uint32_t __get_PSP(void) __attribute__( ( naked ) );
uint32_t __get_PSP(void)
{
- uint32_t result=0;
+ uint32_t result=0;
- __ASM volatile ("MRS %0, psp\n\t"
- "MOV r0, %0 \n\t"
- "BX lr \n\t" : "=r" (result) );
- return(result);
+ __ASM volatile ("MRS %0, psp\n\t"
+ "MOV r0, %0 \n\t"
+ "BX lr \n\t" : "=r" (result) );
+ return(result);
}
/**
@@ -455,14 +455,14 @@
*
* @param topOfProcStack Process Stack Pointer
*
- * Assign the value ProcessStackPointer to the MSP
+ * Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*/
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
void __set_PSP(uint32_t topOfProcStack)
{
- __ASM volatile ("MSR psp, %0\n\t"
- "BX lr \n\t" : : "r" (topOfProcStack) );
+ __ASM volatile ("MSR psp, %0\n\t"
+ "BX lr \n\t" : : "r" (topOfProcStack) );
}
/**
@@ -476,12 +476,12 @@
uint32_t __get_MSP(void) __attribute__( ( naked ) );
uint32_t __get_MSP(void)
{
- uint32_t result=0;
+ uint32_t result=0;
- __ASM volatile ("MRS %0, msp\n\t"
- "MOV r0, %0 \n\t"
- "BX lr \n\t" : "=r" (result) );
- return(result);
+ __ASM volatile ("MRS %0, msp\n\t"
+ "MOV r0, %0 \n\t"
+ "BX lr \n\t" : "=r" (result) );
+ return(result);
}
/**
@@ -489,14 +489,14 @@
*
* @param topOfMainStack Main Stack Pointer
*
- * Assign the value mainStackPointer to the MSP
+ * Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*/
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
void __set_MSP(uint32_t topOfMainStack)
{
- __ASM volatile ("MSR msp, %0\n\t"
- "BX lr \n\t" : : "r" (topOfMainStack) );
+ __ASM volatile ("MSR msp, %0\n\t"
+ "BX lr \n\t" : : "r" (topOfMainStack) );
}
/**
@@ -508,10 +508,10 @@
*/
uint32_t __get_BASEPRI(void)
{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
+ return(result);
}
/**
@@ -523,7 +523,7 @@
*/
void __set_BASEPRI(uint32_t value)
{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) );
+__ASM volatile ("MSR basepri, %0" : : "r" (value) );
}
/**
@@ -535,10 +535,10 @@
*/
uint32_t __get_PRIMASK(void)
{
- uint32_t result=0;
+ uint32_t result=0;
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
+__ASM volatile ("MRS %0, primask" : "=r" (result) );
+ return(result);
}
/**
@@ -550,7 +550,7 @@
*/
void __set_PRIMASK(uint32_t priMask)
{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
+__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
}
/**
@@ -562,10 +562,10 @@
*/
uint32_t __get_FAULTMASK(void)
{
- uint32_t result=0;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+ return(result);
}
/**
@@ -577,22 +577,22 @@
*/
void __set_FAULTMASK(uint32_t faultMask)
{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
+__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
}
/**
* @brief Return the Control Register value
-*
+*
* @return Control value
*
* Return the content of the control register
*/
uint32_t __get_CONTROL(void)
{
- uint32_t result=0;
+ uint32_t result=0;
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
+__ASM volatile ("MRS %0, control" : "=r" (result) );
+ return(result);
}
/**
@@ -604,7 +604,7 @@
*/
void __set_CONTROL(uint32_t control)
{
- __ASM volatile ("MSR control, %0" : : "r" (control) );
+__ASM volatile ("MSR control, %0" : : "r" (control) );
}
@@ -618,10 +618,10 @@
*/
uint32_t __REV(uint32_t value)
{
- uint32_t result=0;
-
- __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
+ return(result);
}
/**
@@ -634,10 +634,10 @@
*/
uint32_t __REV16(uint16_t value)
{
- uint32_t result=0;
-
- __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
+ return(result);
}
/**
@@ -650,10 +650,10 @@
*/
int32_t __REVSH(int16_t value)
{
- uint32_t result=0;
-
- __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
+ return(result);
}
/**
@@ -666,10 +666,10 @@
*/
uint32_t __RBIT(uint32_t value)
{
- uint32_t result=0;
-
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+ return(result);
}
/**
@@ -683,9 +683,9 @@
uint8_t __LDREXB(uint8_t *addr)
{
uint8_t result=0;
-
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
+
+__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
+ return(result);
}
/**
@@ -699,9 +699,9 @@
uint16_t __LDREXH(uint16_t *addr)
{
uint16_t result=0;
-
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
+
+__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
+ return(result);
}
/**
@@ -715,9 +715,9 @@
uint32_t __LDREXW(uint32_t *addr)
{
uint32_t result=0;
-
- __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
+
+__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
+ return(result);
}
/**
@@ -731,10 +731,10 @@
*/
uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
- uint32_t result=0;
-
- __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
+ return(result);
}
/**
@@ -748,10 +748,10 @@
*/
uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
- uint32_t result=0;
-
- __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
+ return(result);
}
/**
@@ -765,10 +765,10 @@
*/
uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
- uint32_t result=0;
-
- __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
- return(result);
+ uint32_t result=0;
+
+__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
+ return(result);
}