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CMSIS Cortex-M3 Core Peripheral Access Layer Header File. More...
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Functions | |
uint32_t | __get_PSP (void) |
Return the Process Stack Pointer. | |
void | __set_PSP (uint32_t topOfProcStack) |
Set the Process Stack Pointer. | |
uint32_t | __get_MSP (void) |
Return the Main Stack Pointer. | |
void | __set_MSP (uint32_t topOfMainStack) |
Set the Main Stack Pointer. | |
uint32_t | __REV16 (uint16_t value) |
Reverse byte order in unsigned short value. | |
int32_t | __REVSH (int16_t value) |
Reverse byte order in signed short value with sign extension to integer. | |
void | __CLREX (void) |
Remove the exclusive lock created by ldrex. | |
uint32_t | __get_BASEPRI (void) |
Return the Base Priority value. | |
void | __set_BASEPRI (uint32_t basePri) |
Set the Base Priority value. | |
uint32_t | __get_PRIMASK (void) |
Return the Priority Mask value. | |
void | __set_PRIMASK (uint32_t priMask) |
Set the Priority Mask value. | |
uint32_t | __get_FAULTMASK (void) |
Return the Fault Mask value. | |
void | __set_FAULTMASK (uint32_t faultMask) |
Set the Fault Mask value. | |
uint32_t | __get_CONTROL (void) |
Return the Control Register value. | |
void | __set_CONTROL (uint32_t control) |
Set the Control Register value. | |
uint32_t | __RBIT (uint32_t value) |
Reverse bit order of value. | |
uint8_t | __LDREXB (uint8_t *addr) |
LDR Exclusive (8 bit) | |
uint16_t | __LDREXH (uint16_t *addr) |
LDR Exclusive (16 bit) | |
uint32_t | __LDREXW (uint32_t *addr) |
LDR Exclusive (32 bit) | |
uint32_t | __STREXB (uint8_t value, uint8_t *addr) |
STR Exclusive (8 bit) | |
uint32_t | __STREXH (uint16_t value, uint16_t *addr) |
STR Exclusive (16 bit) | |
uint32_t | __STREXW (uint32_t value, uint32_t *addr) |
STR Exclusive (32 bit) | |
uint32_t | __REV (uint32_t value) |
Reverse byte order in integer value. | |
static __INLINE void | NVIC_SetPriorityGrouping (uint32_t PriorityGroup) |
Set the Priority Grouping in NVIC Interrupt Controller. | |
static __INLINE uint32_t | NVIC_GetPriorityGrouping (void) |
Get the Priority Grouping from NVIC Interrupt Controller. | |
static __INLINE void | NVIC_EnableIRQ (IRQn_Type IRQn) |
Enable Interrupt in NVIC Interrupt Controller. | |
static __INLINE void | NVIC_DisableIRQ (IRQn_Type IRQn) |
Disable the interrupt line for external interrupt specified. | |
static __INLINE uint32_t | NVIC_GetPendingIRQ (IRQn_Type IRQn) |
Read the interrupt pending bit for a device specific interrupt source. | |
static __INLINE void | NVIC_SetPendingIRQ (IRQn_Type IRQn) |
Set the pending bit for an external interrupt. | |
static __INLINE void | NVIC_ClearPendingIRQ (IRQn_Type IRQn) |
Clear the pending bit for an external interrupt. | |
static __INLINE uint32_t | NVIC_GetActive (IRQn_Type IRQn) |
Read the active bit for an external interrupt. | |
static __INLINE void | NVIC_SetPriority (IRQn_Type IRQn, uint32_t priority) |
Set the priority for an interrupt. | |
static __INLINE uint32_t | NVIC_GetPriority (IRQn_Type IRQn) |
Read the priority for an interrupt. | |
static __INLINE uint32_t | NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) |
Encode the priority for an interrupt. | |
static __INLINE void | NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority) |
Decode the priority of an interrupt. | |
static __INLINE uint32_t | SysTick_Config (uint32_t ticks) |
Initialize and start the SysTick counter and its interrupt. | |
static __INLINE void | NVIC_SystemReset (void) |
Initiate a system reset request. | |
static __INLINE uint32_t | ITM_SendChar (uint32_t ch) |
Outputs a character via the ITM channel 0. | |
static __INLINE int | ITM_ReceiveChar (void) |
Inputs a character via variable ITM_RxBuffer. | |
static __INLINE int | ITM_CheckChar (void) |
Check if a character via variable ITM_RxBuffer is available. | |
Variables | |
volatile int | ITM_RxBuffer |
Detailed Description
CMSIS Cortex-M3 Core Peripheral Access Layer Header File.
- Version:
- V1.30
- Date:
- 30. October 2009
- Note:
- Copyright (C) 2009 ARM Limited. All rights reserved.
- ARM Limited (ARM) is supplying this software for use with Cortex-M processor based microcontrollers. This file can be freely distributed within development tools that are supporting such ARM based processors.
- THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Definition in file core_cm3.h.
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