forked
targets/TARGET_NXP/TARGET_LPC13XX/sleep.c@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Parent:
- targets/hal/TARGET_NXP/TARGET_LPC13XX/sleep.c@144:ef7eb2e8f9f7
- Child:
- 160:d5399cc887bb
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "sleep_api.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 18 | #include "mbed_interface.h" |
<> | 144:ef7eb2e8f9f7 | 19 | |
<> | 144:ef7eb2e8f9f7 | 20 | void sleep(void) { |
<> | 144:ef7eb2e8f9f7 | 21 | // PCON[PD] set to sleep |
<> | 144:ef7eb2e8f9f7 | 22 | LPC_PMU->PCON = 0x0; |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | // SRC[SLEEPDEEP] set to 0 = sleep |
<> | 144:ef7eb2e8f9f7 | 25 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; |
<> | 144:ef7eb2e8f9f7 | 26 | |
<> | 144:ef7eb2e8f9f7 | 27 | // wait for interrupt |
<> | 144:ef7eb2e8f9f7 | 28 | __WFI(); |
<> | 144:ef7eb2e8f9f7 | 29 | } |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | void deepsleep(void) { |
<> | 144:ef7eb2e8f9f7 | 32 | // PCON[PD] set to deepsleep |
<> | 144:ef7eb2e8f9f7 | 33 | LPC_PMU->PCON = 0x1; |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | // SRC[SLEEPDEEP] set to 1 = deep sleep |
<> | 144:ef7eb2e8f9f7 | 36 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | // Power up everything after powerdown |
<> | 144:ef7eb2e8f9f7 | 39 | LPC_SYSCON->PDAWAKECFG &= 0xFFFFF800; |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | // wait for interrupt |
<> | 144:ef7eb2e8f9f7 | 42 | __WFI(); |
<> | 144:ef7eb2e8f9f7 | 43 | } |