Martin Kojtal / USBHost

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Dependencies:   FATFileSystem mbed-rtos

Fork of USBHost by mbed official

targets/TARGET_NXP/USBHALHost_LPC17.cpp@39:d96aa62afc5b, 2017-07-27 (annotated)

Committer:
Kojto
Date:
Thu Jul 27 12:24:30 2017 +0100
Revision:
39:d96aa62afc5b
Update USBHost - add targets directory



This corresponds to mbed-os/master commit 9207365

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 39:d96aa62afc5b 1 /* mbed USBHost Library
Kojto 39:d96aa62afc5b 2 * Copyright (c) 2006-2013 ARM Limited
Kojto 39:d96aa62afc5b 3 *
Kojto 39:d96aa62afc5b 4 * Licensed under the Apache License, Version 2.0 (the "License");
Kojto 39:d96aa62afc5b 5 * you may not use this file except in compliance with the License.
Kojto 39:d96aa62afc5b 6 * You may obtain a copy of the License at
Kojto 39:d96aa62afc5b 7 *
Kojto 39:d96aa62afc5b 8 * http://www.apache.org/licenses/LICENSE-2.0
Kojto 39:d96aa62afc5b 9 *
Kojto 39:d96aa62afc5b 10 * Unless required by applicable law or agreed to in writing, software
Kojto 39:d96aa62afc5b 11 * distributed under the License is distributed on an "AS IS" BASIS,
Kojto 39:d96aa62afc5b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Kojto 39:d96aa62afc5b 13 * See the License for the specific language governing permissions and
Kojto 39:d96aa62afc5b 14 * limitations under the License.
Kojto 39:d96aa62afc5b 15 */
Kojto 39:d96aa62afc5b 16
Kojto 39:d96aa62afc5b 17 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2460)
Kojto 39:d96aa62afc5b 18
Kojto 39:d96aa62afc5b 19 #include "mbed.h"
Kojto 39:d96aa62afc5b 20 #include "USBHALHost.h"
Kojto 39:d96aa62afc5b 21 #include "dbg.h"
Kojto 39:d96aa62afc5b 22
Kojto 39:d96aa62afc5b 23 // bits of the USB/OTG clock control register
Kojto 39:d96aa62afc5b 24 #define HOST_CLK_EN (1<<0)
Kojto 39:d96aa62afc5b 25 #define DEV_CLK_EN (1<<1)
Kojto 39:d96aa62afc5b 26 #define PORTSEL_CLK_EN (1<<3)
Kojto 39:d96aa62afc5b 27 #define AHB_CLK_EN (1<<4)
Kojto 39:d96aa62afc5b 28
Kojto 39:d96aa62afc5b 29 // bits of the USB/OTG clock status register
Kojto 39:d96aa62afc5b 30 #define HOST_CLK_ON (1<<0)
Kojto 39:d96aa62afc5b 31 #define DEV_CLK_ON (1<<1)
Kojto 39:d96aa62afc5b 32 #define PORTSEL_CLK_ON (1<<3)
Kojto 39:d96aa62afc5b 33 #define AHB_CLK_ON (1<<4)
Kojto 39:d96aa62afc5b 34
Kojto 39:d96aa62afc5b 35 // we need host clock, OTG/portsel clock and AHB clock
Kojto 39:d96aa62afc5b 36 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
Kojto 39:d96aa62afc5b 37
Kojto 39:d96aa62afc5b 38 #define HCCA_SIZE sizeof(HCCA)
Kojto 39:d96aa62afc5b 39 #define ED_SIZE sizeof(HCED)
Kojto 39:d96aa62afc5b 40 #define TD_SIZE sizeof(HCTD)
Kojto 39:d96aa62afc5b 41
Kojto 39:d96aa62afc5b 42 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
Kojto 39:d96aa62afc5b 43
Kojto 39:d96aa62afc5b 44 static volatile uint8_t usb_buf[TOTAL_SIZE] __attribute((section("AHBSRAM1"),aligned(256))); //256 bytes aligned!
Kojto 39:d96aa62afc5b 45
Kojto 39:d96aa62afc5b 46 USBHALHost * USBHALHost::instHost;
Kojto 39:d96aa62afc5b 47
Kojto 39:d96aa62afc5b 48 USBHALHost::USBHALHost() {
Kojto 39:d96aa62afc5b 49 instHost = this;
Kojto 39:d96aa62afc5b 50 memInit();
Kojto 39:d96aa62afc5b 51 memset((void*)usb_hcca, 0, HCCA_SIZE);
Kojto 39:d96aa62afc5b 52 for (int i = 0; i < MAX_ENDPOINT; i++) {
Kojto 39:d96aa62afc5b 53 edBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 54 }
Kojto 39:d96aa62afc5b 55 for (int i = 0; i < MAX_TD; i++) {
Kojto 39:d96aa62afc5b 56 tdBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 57 }
Kojto 39:d96aa62afc5b 58 }
Kojto 39:d96aa62afc5b 59
Kojto 39:d96aa62afc5b 60 void USBHALHost::init() {
Kojto 39:d96aa62afc5b 61 NVIC_DisableIRQ(USB_IRQn);
Kojto 39:d96aa62afc5b 62
Kojto 39:d96aa62afc5b 63 //Cut power
Kojto 39:d96aa62afc5b 64 LPC_SC->PCONP &= ~(1UL<<31);
Kojto 39:d96aa62afc5b 65 wait_ms(100);
Kojto 39:d96aa62afc5b 66
Kojto 39:d96aa62afc5b 67 // turn on power for USB
Kojto 39:d96aa62afc5b 68 LPC_SC->PCONP |= (1UL<<31);
Kojto 39:d96aa62afc5b 69
Kojto 39:d96aa62afc5b 70 // Enable USB host clock, port selection and AHB clock
Kojto 39:d96aa62afc5b 71 LPC_USB->USBClkCtrl |= CLOCK_MASK;
Kojto 39:d96aa62afc5b 72
Kojto 39:d96aa62afc5b 73 // Wait for clocks to become available
Kojto 39:d96aa62afc5b 74 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK);
Kojto 39:d96aa62afc5b 75
Kojto 39:d96aa62afc5b 76 // it seems the bits[0:1] mean the following
Kojto 39:d96aa62afc5b 77 // 0: U1=device, U2=host
Kojto 39:d96aa62afc5b 78 // 1: U1=host, U2=host
Kojto 39:d96aa62afc5b 79 // 2: reserved
Kojto 39:d96aa62afc5b 80 // 3: U1=host, U2=device
Kojto 39:d96aa62afc5b 81 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
Kojto 39:d96aa62afc5b 82 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
Kojto 39:d96aa62afc5b 83 LPC_USB->OTGStCtrl |= 1;
Kojto 39:d96aa62afc5b 84
Kojto 39:d96aa62afc5b 85 // now that we've configured the ports, we can turn off the portsel clock
Kojto 39:d96aa62afc5b 86 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
Kojto 39:d96aa62afc5b 87
Kojto 39:d96aa62afc5b 88 // configure USB D+/D- pins
Kojto 39:d96aa62afc5b 89 // P0[29] = USB_D+, 01
Kojto 39:d96aa62afc5b 90 // P0[30] = USB_D-, 01
Kojto 39:d96aa62afc5b 91 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
Kojto 39:d96aa62afc5b 92 LPC_PINCON->PINSEL1 |= ((1<<26) | (1<<28));
Kojto 39:d96aa62afc5b 93
Kojto 39:d96aa62afc5b 94 LPC_USB->HcControl = 0; // HARDWARE RESET
Kojto 39:d96aa62afc5b 95 LPC_USB->HcControlHeadED = 0; // Initialize Control list head to Zero
Kojto 39:d96aa62afc5b 96 LPC_USB->HcBulkHeadED = 0; // Initialize Bulk list head to Zero
Kojto 39:d96aa62afc5b 97
Kojto 39:d96aa62afc5b 98 // Wait 100 ms before apply reset
Kojto 39:d96aa62afc5b 99 wait_ms(100);
Kojto 39:d96aa62afc5b 100
Kojto 39:d96aa62afc5b 101 // software reset
Kojto 39:d96aa62afc5b 102 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
Kojto 39:d96aa62afc5b 103
Kojto 39:d96aa62afc5b 104 // Write Fm Interval and Largest Data Packet Counter
Kojto 39:d96aa62afc5b 105 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL;
Kojto 39:d96aa62afc5b 106 LPC_USB->HcPeriodicStart = FI * 90 / 100;
Kojto 39:d96aa62afc5b 107
Kojto 39:d96aa62afc5b 108 // Put HC in operational state
Kojto 39:d96aa62afc5b 109 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
Kojto 39:d96aa62afc5b 110 // Set Global Power
Kojto 39:d96aa62afc5b 111 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC;
Kojto 39:d96aa62afc5b 112
Kojto 39:d96aa62afc5b 113 LPC_USB->HcHCCA = (uint32_t)(usb_hcca);
Kojto 39:d96aa62afc5b 114
Kojto 39:d96aa62afc5b 115 // Clear Interrrupt Status
Kojto 39:d96aa62afc5b 116 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus;
Kojto 39:d96aa62afc5b 117
Kojto 39:d96aa62afc5b 118 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
Kojto 39:d96aa62afc5b 119
Kojto 39:d96aa62afc5b 120 // Enable the USB Interrupt
Kojto 39:d96aa62afc5b 121 NVIC_SetVector(USB_IRQn, (uint32_t)(_usbisr));
Kojto 39:d96aa62afc5b 122 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
Kojto 39:d96aa62afc5b 123 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
Kojto 39:d96aa62afc5b 124
Kojto 39:d96aa62afc5b 125 NVIC_EnableIRQ(USB_IRQn);
Kojto 39:d96aa62afc5b 126
Kojto 39:d96aa62afc5b 127 // Check for any connected devices
Kojto 39:d96aa62afc5b 128 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
Kojto 39:d96aa62afc5b 129 //Device connected
Kojto 39:d96aa62afc5b 130 wait_ms(150);
Kojto 39:d96aa62afc5b 131 USB_DBG("Device connected (%08x)\n\r", LPC_USB->HcRhPortStatus1);
Kojto 39:d96aa62afc5b 132 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
Kojto 39:d96aa62afc5b 133 }
Kojto 39:d96aa62afc5b 134 }
Kojto 39:d96aa62afc5b 135
Kojto 39:d96aa62afc5b 136 uint32_t USBHALHost::controlHeadED() {
Kojto 39:d96aa62afc5b 137 return LPC_USB->HcControlHeadED;
Kojto 39:d96aa62afc5b 138 }
Kojto 39:d96aa62afc5b 139
Kojto 39:d96aa62afc5b 140 uint32_t USBHALHost::bulkHeadED() {
Kojto 39:d96aa62afc5b 141 return LPC_USB->HcBulkHeadED;
Kojto 39:d96aa62afc5b 142 }
Kojto 39:d96aa62afc5b 143
Kojto 39:d96aa62afc5b 144 uint32_t USBHALHost::interruptHeadED() {
Kojto 39:d96aa62afc5b 145 return usb_hcca->IntTable[0];
Kojto 39:d96aa62afc5b 146 }
Kojto 39:d96aa62afc5b 147
Kojto 39:d96aa62afc5b 148 void USBHALHost::updateBulkHeadED(uint32_t addr) {
Kojto 39:d96aa62afc5b 149 LPC_USB->HcBulkHeadED = addr;
Kojto 39:d96aa62afc5b 150 }
Kojto 39:d96aa62afc5b 151
Kojto 39:d96aa62afc5b 152
Kojto 39:d96aa62afc5b 153 void USBHALHost::updateControlHeadED(uint32_t addr) {
Kojto 39:d96aa62afc5b 154 LPC_USB->HcControlHeadED = addr;
Kojto 39:d96aa62afc5b 155 }
Kojto 39:d96aa62afc5b 156
Kojto 39:d96aa62afc5b 157 void USBHALHost::updateInterruptHeadED(uint32_t addr) {
Kojto 39:d96aa62afc5b 158 usb_hcca->IntTable[0] = addr;
Kojto 39:d96aa62afc5b 159 }
Kojto 39:d96aa62afc5b 160
Kojto 39:d96aa62afc5b 161
Kojto 39:d96aa62afc5b 162 void USBHALHost::enableList(ENDPOINT_TYPE type) {
Kojto 39:d96aa62afc5b 163 switch(type) {
Kojto 39:d96aa62afc5b 164 case CONTROL_ENDPOINT:
Kojto 39:d96aa62afc5b 165 LPC_USB->HcCommandStatus = OR_CMD_STATUS_CLF;
Kojto 39:d96aa62afc5b 166 LPC_USB->HcControl |= OR_CONTROL_CLE;
Kojto 39:d96aa62afc5b 167 break;
Kojto 39:d96aa62afc5b 168 case ISOCHRONOUS_ENDPOINT:
Kojto 39:d96aa62afc5b 169 break;
Kojto 39:d96aa62afc5b 170 case BULK_ENDPOINT:
Kojto 39:d96aa62afc5b 171 LPC_USB->HcCommandStatus = OR_CMD_STATUS_BLF;
Kojto 39:d96aa62afc5b 172 LPC_USB->HcControl |= OR_CONTROL_BLE;
Kojto 39:d96aa62afc5b 173 break;
Kojto 39:d96aa62afc5b 174 case INTERRUPT_ENDPOINT:
Kojto 39:d96aa62afc5b 175 LPC_USB->HcControl |= OR_CONTROL_PLE;
Kojto 39:d96aa62afc5b 176 break;
Kojto 39:d96aa62afc5b 177 }
Kojto 39:d96aa62afc5b 178 }
Kojto 39:d96aa62afc5b 179
Kojto 39:d96aa62afc5b 180
Kojto 39:d96aa62afc5b 181 bool USBHALHost::disableList(ENDPOINT_TYPE type) {
Kojto 39:d96aa62afc5b 182 switch(type) {
Kojto 39:d96aa62afc5b 183 case CONTROL_ENDPOINT:
Kojto 39:d96aa62afc5b 184 if(LPC_USB->HcControl & OR_CONTROL_CLE) {
Kojto 39:d96aa62afc5b 185 LPC_USB->HcControl &= ~OR_CONTROL_CLE;
Kojto 39:d96aa62afc5b 186 return true;
Kojto 39:d96aa62afc5b 187 }
Kojto 39:d96aa62afc5b 188 return false;
Kojto 39:d96aa62afc5b 189 case ISOCHRONOUS_ENDPOINT:
Kojto 39:d96aa62afc5b 190 return false;
Kojto 39:d96aa62afc5b 191 case BULK_ENDPOINT:
Kojto 39:d96aa62afc5b 192 if(LPC_USB->HcControl & OR_CONTROL_BLE){
Kojto 39:d96aa62afc5b 193 LPC_USB->HcControl &= ~OR_CONTROL_BLE;
Kojto 39:d96aa62afc5b 194 return true;
Kojto 39:d96aa62afc5b 195 }
Kojto 39:d96aa62afc5b 196 return false;
Kojto 39:d96aa62afc5b 197 case INTERRUPT_ENDPOINT:
Kojto 39:d96aa62afc5b 198 if(LPC_USB->HcControl & OR_CONTROL_PLE) {
Kojto 39:d96aa62afc5b 199 LPC_USB->HcControl &= ~OR_CONTROL_PLE;
Kojto 39:d96aa62afc5b 200 return true;
Kojto 39:d96aa62afc5b 201 }
Kojto 39:d96aa62afc5b 202 return false;
Kojto 39:d96aa62afc5b 203 }
Kojto 39:d96aa62afc5b 204 return false;
Kojto 39:d96aa62afc5b 205 }
Kojto 39:d96aa62afc5b 206
Kojto 39:d96aa62afc5b 207
Kojto 39:d96aa62afc5b 208 void USBHALHost::memInit() {
Kojto 39:d96aa62afc5b 209 usb_hcca = (volatile HCCA *)usb_buf;
Kojto 39:d96aa62afc5b 210 usb_edBuf = usb_buf + HCCA_SIZE;
Kojto 39:d96aa62afc5b 211 usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
Kojto 39:d96aa62afc5b 212 }
Kojto 39:d96aa62afc5b 213
Kojto 39:d96aa62afc5b 214 volatile uint8_t * USBHALHost::getED() {
Kojto 39:d96aa62afc5b 215 for (int i = 0; i < MAX_ENDPOINT; i++) {
Kojto 39:d96aa62afc5b 216 if ( !edBufAlloc[i] ) {
Kojto 39:d96aa62afc5b 217 edBufAlloc[i] = true;
Kojto 39:d96aa62afc5b 218 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
Kojto 39:d96aa62afc5b 219 }
Kojto 39:d96aa62afc5b 220 }
Kojto 39:d96aa62afc5b 221 perror("Could not allocate ED\r\n");
Kojto 39:d96aa62afc5b 222 return NULL; //Could not alloc ED
Kojto 39:d96aa62afc5b 223 }
Kojto 39:d96aa62afc5b 224
Kojto 39:d96aa62afc5b 225 volatile uint8_t * USBHALHost::getTD() {
Kojto 39:d96aa62afc5b 226 int i;
Kojto 39:d96aa62afc5b 227 for (i = 0; i < MAX_TD; i++) {
Kojto 39:d96aa62afc5b 228 if ( !tdBufAlloc[i] ) {
Kojto 39:d96aa62afc5b 229 tdBufAlloc[i] = true;
Kojto 39:d96aa62afc5b 230 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
Kojto 39:d96aa62afc5b 231 }
Kojto 39:d96aa62afc5b 232 }
Kojto 39:d96aa62afc5b 233 perror("Could not allocate TD\r\n");
Kojto 39:d96aa62afc5b 234 return NULL; //Could not alloc TD
Kojto 39:d96aa62afc5b 235 }
Kojto 39:d96aa62afc5b 236
Kojto 39:d96aa62afc5b 237
Kojto 39:d96aa62afc5b 238 void USBHALHost::freeED(volatile uint8_t * ed) {
Kojto 39:d96aa62afc5b 239 int i;
Kojto 39:d96aa62afc5b 240 i = (ed - usb_edBuf) / ED_SIZE;
Kojto 39:d96aa62afc5b 241 edBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 242 }
Kojto 39:d96aa62afc5b 243
Kojto 39:d96aa62afc5b 244 void USBHALHost::freeTD(volatile uint8_t * td) {
Kojto 39:d96aa62afc5b 245 int i;
Kojto 39:d96aa62afc5b 246 i = (td - usb_tdBuf) / TD_SIZE;
Kojto 39:d96aa62afc5b 247 tdBufAlloc[i] = false;
Kojto 39:d96aa62afc5b 248 }
Kojto 39:d96aa62afc5b 249
Kojto 39:d96aa62afc5b 250
Kojto 39:d96aa62afc5b 251 void USBHALHost::resetRootHub() {
Kojto 39:d96aa62afc5b 252 // Initiate port reset
Kojto 39:d96aa62afc5b 253 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS;
Kojto 39:d96aa62afc5b 254
Kojto 39:d96aa62afc5b 255 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS);
Kojto 39:d96aa62afc5b 256
Kojto 39:d96aa62afc5b 257 // ...and clear port reset signal
Kojto 39:d96aa62afc5b 258 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
Kojto 39:d96aa62afc5b 259 }
Kojto 39:d96aa62afc5b 260
Kojto 39:d96aa62afc5b 261
Kojto 39:d96aa62afc5b 262 void USBHALHost::_usbisr(void) {
Kojto 39:d96aa62afc5b 263 if (instHost) {
Kojto 39:d96aa62afc5b 264 instHost->UsbIrqhandler();
Kojto 39:d96aa62afc5b 265 }
Kojto 39:d96aa62afc5b 266 }
Kojto 39:d96aa62afc5b 267
Kojto 39:d96aa62afc5b 268 void USBHALHost::UsbIrqhandler() {
Kojto 39:d96aa62afc5b 269 if( LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable ) //Is there something to actually process?
Kojto 39:d96aa62afc5b 270 {
Kojto 39:d96aa62afc5b 271
Kojto 39:d96aa62afc5b 272 uint32_t int_status = LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable;
Kojto 39:d96aa62afc5b 273
Kojto 39:d96aa62afc5b 274 // Root hub status change interrupt
Kojto 39:d96aa62afc5b 275 if (int_status & OR_INTR_STATUS_RHSC) {
Kojto 39:d96aa62afc5b 276 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
Kojto 39:d96aa62afc5b 277 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
Kojto 39:d96aa62afc5b 278 // When DRWE is on, Connect Status Change
Kojto 39:d96aa62afc5b 279 // means a remote wakeup event.
Kojto 39:d96aa62afc5b 280 } else {
Kojto 39:d96aa62afc5b 281
Kojto 39:d96aa62afc5b 282 //Root device connected
Kojto 39:d96aa62afc5b 283 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
Kojto 39:d96aa62afc5b 284
Kojto 39:d96aa62afc5b 285 // wait 150ms to avoid bounce
Kojto 39:d96aa62afc5b 286 wait_ms(150);
Kojto 39:d96aa62afc5b 287
Kojto 39:d96aa62afc5b 288 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
Kojto 39:d96aa62afc5b 289 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
Kojto 39:d96aa62afc5b 290 }
Kojto 39:d96aa62afc5b 291
Kojto 39:d96aa62afc5b 292 //Root device disconnected
Kojto 39:d96aa62afc5b 293 else {
Kojto 39:d96aa62afc5b 294
Kojto 39:d96aa62afc5b 295 if (!(int_status & OR_INTR_STATUS_WDH)) {
Kojto 39:d96aa62afc5b 296 usb_hcca->DoneHead = 0;
Kojto 39:d96aa62afc5b 297 }
Kojto 39:d96aa62afc5b 298
Kojto 39:d96aa62afc5b 299 // wait 200ms to avoid bounce
Kojto 39:d96aa62afc5b 300 wait_ms(200);
Kojto 39:d96aa62afc5b 301
Kojto 39:d96aa62afc5b 302 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
Kojto 39:d96aa62afc5b 303
Kojto 39:d96aa62afc5b 304 if (int_status & OR_INTR_STATUS_WDH) {
Kojto 39:d96aa62afc5b 305 usb_hcca->DoneHead = 0;
Kojto 39:d96aa62afc5b 306 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
Kojto 39:d96aa62afc5b 307 }
Kojto 39:d96aa62afc5b 308 }
Kojto 39:d96aa62afc5b 309 }
Kojto 39:d96aa62afc5b 310 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
Kojto 39:d96aa62afc5b 311 }
Kojto 39:d96aa62afc5b 312 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
Kojto 39:d96aa62afc5b 313 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
Kojto 39:d96aa62afc5b 314 }
Kojto 39:d96aa62afc5b 315 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_RHSC;
Kojto 39:d96aa62afc5b 316 }
Kojto 39:d96aa62afc5b 317
Kojto 39:d96aa62afc5b 318 // Writeback Done Head interrupt
Kojto 39:d96aa62afc5b 319 if (int_status & OR_INTR_STATUS_WDH) {
Kojto 39:d96aa62afc5b 320 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
Kojto 39:d96aa62afc5b 321 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
Kojto 39:d96aa62afc5b 322 }
Kojto 39:d96aa62afc5b 323 }
Kojto 39:d96aa62afc5b 324 }
Kojto 39:d96aa62afc5b 325 #endif