Example program for CN0535-FMCZ.
Dependencies: platform_drivers AD77681
cn0535_init_params.h@1:f3b5e79a8488, 2021-03-15 (annotated)
- Committer:
- jngarlitos
- Date:
- Mon Mar 15 07:12:29 2021 +0000
- Revision:
- 1:f3b5e79a8488
- Child:
- 2:998f1de78dae
Initial Commit for EVAL-CN0535-FMCZ Program Files
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
jngarlitos | 1:f3b5e79a8488 | 1 | #ifndef _CN0353_INIT_PARAMS_H_ |
jngarlitos | 1:f3b5e79a8488 | 2 | #define _CN0353_INIT_PARAMS_H_ |
jngarlitos | 1:f3b5e79a8488 | 3 | |
jngarlitos | 1:f3b5e79a8488 | 4 | #ifdef __cplusplus |
jngarlitos | 1:f3b5e79a8488 | 5 | extern "C" |
jngarlitos | 1:f3b5e79a8488 | 6 | { |
jngarlitos | 1:f3b5e79a8488 | 7 | #endif |
jngarlitos | 1:f3b5e79a8488 | 8 | #include <mbed.h> |
jngarlitos | 1:f3b5e79a8488 | 9 | #include <stdint.h> |
jngarlitos | 1:f3b5e79a8488 | 10 | #include "platform_drivers.h" |
jngarlitos | 1:f3b5e79a8488 | 11 | #include "platform_support.h" |
jngarlitos | 1:f3b5e79a8488 | 12 | #include "spi_extra.h" |
jngarlitos | 1:f3b5e79a8488 | 13 | #include "gpio.h" |
jngarlitos | 1:f3b5e79a8488 | 14 | #include "ad77681.h" |
jngarlitos | 1:f3b5e79a8488 | 15 | |
jngarlitos | 1:f3b5e79a8488 | 16 | |
jngarlitos | 1:f3b5e79a8488 | 17 | /******************************************************************************/ |
jngarlitos | 1:f3b5e79a8488 | 18 | /********************** Macros and Constants Definitions **********************/ |
jngarlitos | 1:f3b5e79a8488 | 19 | /******************************************************************************/ |
jngarlitos | 1:f3b5e79a8488 | 20 | |
jngarlitos | 1:f3b5e79a8488 | 21 | |
jngarlitos | 1:f3b5e79a8488 | 22 | #define DRDY_PIN D2 |
jngarlitos | 1:f3b5e79a8488 | 23 | #define ADC_RST_PIN D3 |
jngarlitos | 1:f3b5e79a8488 | 24 | |
jngarlitos | 1:f3b5e79a8488 | 25 | // Init params |
jngarlitos | 1:f3b5e79a8488 | 26 | |
jngarlitos | 1:f3b5e79a8488 | 27 | // Init SPI extra parameters structure |
jngarlitos | 1:f3b5e79a8488 | 28 | mbed_spi_init_param spi_init_extra_params = { |
jngarlitos | 1:f3b5e79a8488 | 29 | .spi_clk_pin = SPI_SCK, |
jngarlitos | 1:f3b5e79a8488 | 30 | .spi_miso_pin = SPI_MISO, |
jngarlitos | 1:f3b5e79a8488 | 31 | .spi_mosi_pin = SPI_MOSI |
jngarlitos | 1:f3b5e79a8488 | 32 | }; |
jngarlitos | 1:f3b5e79a8488 | 33 | // SPI bus init parameters |
jngarlitos | 1:f3b5e79a8488 | 34 | spi_init_param spi_params = { |
jngarlitos | 1:f3b5e79a8488 | 35 | 20000000, // SPI Speed |
jngarlitos | 1:f3b5e79a8488 | 36 | SPI_CS, // SPI CS select index |
jngarlitos | 1:f3b5e79a8488 | 37 | SPI_MODE_3, // SPI Mode |
jngarlitos | 1:f3b5e79a8488 | 38 | &spi_init_extra_params, // SPI extra configurations |
jngarlitos | 1:f3b5e79a8488 | 39 | }; |
jngarlitos | 1:f3b5e79a8488 | 40 | |
jngarlitos | 1:f3b5e79a8488 | 41 | // Initial parameters for the ADC AD7768-1 |
jngarlitos | 1:f3b5e79a8488 | 42 | ad77681_init_param init_params = { |
jngarlitos | 1:f3b5e79a8488 | 43 | |
jngarlitos | 1:f3b5e79a8488 | 44 | spi_params, // SPI parameters |
jngarlitos | 1:f3b5e79a8488 | 45 | AD77681_ECO, // power_mode |
jngarlitos | 1:f3b5e79a8488 | 46 | AD77681_MCLK_DIV_16, // mclk_div |
jngarlitos | 1:f3b5e79a8488 | 47 | AD77681_CONV_CONTINUOUS, // conv_mode |
jngarlitos | 1:f3b5e79a8488 | 48 | AD77681_AIN_SHORT, // diag_mux_sel |
jngarlitos | 1:f3b5e79a8488 | 49 | false, // conv_diag_sel |
jngarlitos | 1:f3b5e79a8488 | 50 | AD77681_CONV_24BIT, // conv_len |
jngarlitos | 1:f3b5e79a8488 | 51 | AD77681_NO_CRC, // crc_sel |
jngarlitos | 1:f3b5e79a8488 | 52 | 0, // status bit |
jngarlitos | 1:f3b5e79a8488 | 53 | AD77681_VCM_HALF_VCC, // VCM setup |
jngarlitos | 1:f3b5e79a8488 | 54 | AD77681_AINn_ENABLED, // AIN- precharge buffer |
jngarlitos | 1:f3b5e79a8488 | 55 | AD77681_AINp_ENABLED, // AIN+ precharge buffer |
jngarlitos | 1:f3b5e79a8488 | 56 | AD77681_BUFn_ENABLED, // REF- buffer |
jngarlitos | 1:f3b5e79a8488 | 57 | AD77681_BUFp_ENABLED, // REF+ buffer |
jngarlitos | 1:f3b5e79a8488 | 58 | AD77681_FIR, // FIR Filter |
jngarlitos | 1:f3b5e79a8488 | 59 | AD77681_SINC5_FIR_DECx32, // Decimate by 32 |
jngarlitos | 1:f3b5e79a8488 | 60 | 0, // OS ratio of SINC3 |
jngarlitos | 1:f3b5e79a8488 | 61 | 4096, // Reference voltage |
jngarlitos | 1:f3b5e79a8488 | 62 | 16384, // MCLK in kHz |
jngarlitos | 1:f3b5e79a8488 | 63 | 32000, // Sample rate in Hz |
jngarlitos | 1:f3b5e79a8488 | 64 | 1, // Data frame bytes |
jngarlitos | 1:f3b5e79a8488 | 65 | }; |
jngarlitos | 1:f3b5e79a8488 | 66 | |
jngarlitos | 1:f3b5e79a8488 | 67 | // Inital params of a GPIO, to which the DRDY signal of the ADC is connected |
jngarlitos | 1:f3b5e79a8488 | 68 | gpio_desc gpio_drdy = { |
jngarlitos | 1:f3b5e79a8488 | 69 | DRDY_PIN, // GPIO pin |
jngarlitos | 1:f3b5e79a8488 | 70 | NULL, |
jngarlitos | 1:f3b5e79a8488 | 71 | }; |
jngarlitos | 1:f3b5e79a8488 | 72 | |
jngarlitos | 1:f3b5e79a8488 | 73 | // Inital params of a GPIO, to which the RST signal of the ADC is connected |
jngarlitos | 1:f3b5e79a8488 | 74 | gpio_desc gpio_reset = { |
jngarlitos | 1:f3b5e79a8488 | 75 | ADC_RST_PIN, // GPIO pin |
jngarlitos | 1:f3b5e79a8488 | 76 | NULL, |
jngarlitos | 1:f3b5e79a8488 | 77 | }; |
jngarlitos | 1:f3b5e79a8488 | 78 | |
jngarlitos | 1:f3b5e79a8488 | 79 | /* |
jngarlitos | 1:f3b5e79a8488 | 80 | * User-defined coefficients for programmable FIR filter, max 56 coeffs |
jngarlitos | 1:f3b5e79a8488 | 81 | * |
jngarlitos | 1:f3b5e79a8488 | 82 | * Please note that, inserted coefficiets will be mirrored afterwards, |
jngarlitos | 1:f3b5e79a8488 | 83 | * so you must insert only one half of all the coefficients. |
jngarlitos | 1:f3b5e79a8488 | 84 | * |
jngarlitos | 1:f3b5e79a8488 | 85 | * Please note your original filer must have ODD count of coefficients, |
jngarlitos | 1:f3b5e79a8488 | 86 | * allowing internal ADC circuitry to mirror the coefficients properly. |
jngarlitos | 1:f3b5e79a8488 | 87 | * |
jngarlitos | 1:f3b5e79a8488 | 88 | * In case of usage lower count of coeffs than 56, please make sure, that |
jngarlitos | 1:f3b5e79a8488 | 89 | * the variable 'count_of_active_coeffs' bellow, carries the correct number |
jngarlitos | 1:f3b5e79a8488 | 90 | * of coeficients, allowing to fill the rest of the coeffs by zeroes |
jngarlitos | 1:f3b5e79a8488 | 91 | * |
jngarlitos | 1:f3b5e79a8488 | 92 | * Default coeffs: |
jngarlitos | 1:f3b5e79a8488 | 93 | **/ |
jngarlitos | 1:f3b5e79a8488 | 94 | const uint8_t count_of_active_coeffs = 56; |
jngarlitos | 1:f3b5e79a8488 | 95 | |
jngarlitos | 1:f3b5e79a8488 | 96 | const float programmable_FIR[56] = { |
jngarlitos | 1:f3b5e79a8488 | 97 | |
jngarlitos | 1:f3b5e79a8488 | 98 | -0.000064967, |
jngarlitos | 1:f3b5e79a8488 | 99 | 0.000216258, |
jngarlitos | 1:f3b5e79a8488 | 100 | 0.000437060, |
jngarlitos | 1:f3b5e79a8488 | 101 | 0.000513474, |
jngarlitos | 1:f3b5e79a8488 | 102 | 0.000396842, |
jngarlitos | 1:f3b5e79a8488 | 103 | 0.000097234, |
jngarlitos | 1:f3b5e79a8488 | 104 | -0.000304613, |
jngarlitos | 1:f3b5e79a8488 | 105 | -0.000667916, |
jngarlitos | 1:f3b5e79a8488 | 106 | -0.000831172, |
jngarlitos | 1:f3b5e79a8488 | 107 | -0.000674257, |
jngarlitos | 1:f3b5e79a8488 | 108 | -0.000182842, |
jngarlitos | 1:f3b5e79a8488 | 109 | 0.000514726, |
jngarlitos | 1:f3b5e79a8488 | 110 | 0.001164754, |
jngarlitos | 1:f3b5e79a8488 | 111 | 0.001468219, |
jngarlitos | 1:f3b5e79a8488 | 112 | 0.001203813, |
jngarlitos | 1:f3b5e79a8488 | 113 | 0.000347908, |
jngarlitos | 1:f3b5e79a8488 | 114 | -0.000865494, |
jngarlitos | 1:f3b5e79a8488 | 115 | -0.001987698, |
jngarlitos | 1:f3b5e79a8488 | 116 | -0.002506034, |
jngarlitos | 1:f3b5e79a8488 | 117 | -0.002058142, |
jngarlitos | 1:f3b5e79a8488 | 118 | -0.000626378, |
jngarlitos | 1:f3b5e79a8488 | 119 | 0.001379936, |
jngarlitos | 1:f3b5e79a8488 | 120 | 0.003214906, |
jngarlitos | 1:f3b5e79a8488 | 121 | 0.004053861, |
jngarlitos | 1:f3b5e79a8488 | 122 | 0.003337280, |
jngarlitos | 1:f3b5e79a8488 | 123 | 0.001065705, |
jngarlitos | 1:f3b5e79a8488 | 124 | -0.002092961, |
jngarlitos | 1:f3b5e79a8488 | 125 | -0.004965216, |
jngarlitos | 1:f3b5e79a8488 | 126 | -0.006281280, |
jngarlitos | 1:f3b5e79a8488 | 127 | -0.005199392, |
jngarlitos | 1:f3b5e79a8488 | 128 | -0.001740302, |
jngarlitos | 1:f3b5e79a8488 | 129 | 0.003068791, |
jngarlitos | 1:f3b5e79a8488 | 130 | 0.007451037, |
jngarlitos | 1:f3b5e79a8488 | 131 | 0.009496076, |
jngarlitos | 1:f3b5e79a8488 | 132 | 0.007936363, |
jngarlitos | 1:f3b5e79a8488 | 133 | 0.002786057, |
jngarlitos | 1:f3b5e79a8488 | 134 | -0.004444805, |
jngarlitos | 1:f3b5e79a8488 | 135 | -0.011117611, |
jngarlitos | 1:f3b5e79a8488 | 136 | -0.014356987, |
jngarlitos | 1:f3b5e79a8488 | 137 | -0.012188594, |
jngarlitos | 1:f3b5e79a8488 | 138 | -0.004503385, |
jngarlitos | 1:f3b5e79a8488 | 139 | 0.006564770, |
jngarlitos | 1:f3b5e79a8488 | 140 | 0.017091120, |
jngarlitos | 1:f3b5e79a8488 | 141 | 0.022597229, |
jngarlitos | 1:f3b5e79a8488 | 142 | 0.019721226, |
jngarlitos | 1:f3b5e79a8488 | 143 | 0.007756722, |
jngarlitos | 1:f3b5e79a8488 | 144 | -0.010529983, |
jngarlitos | 1:f3b5e79a8488 | 145 | -0.029205128, |
jngarlitos | 1:f3b5e79a8488 | 146 | -0.040639396, |
jngarlitos | 1:f3b5e79a8488 | 147 | -0.037782094, |
jngarlitos | 1:f3b5e79a8488 | 148 | -0.016555659, |
jngarlitos | 1:f3b5e79a8488 | 149 | 0.022417307, |
jngarlitos | 1:f3b5e79a8488 | 150 | 0.073383876, |
jngarlitos | 1:f3b5e79a8488 | 151 | 0.126572621, |
jngarlitos | 1:f3b5e79a8488 | 152 | 0.170602851, |
jngarlitos | 1:f3b5e79a8488 | 153 | 0.195514282, |
jngarlitos | 1:f3b5e79a8488 | 154 | |
jngarlitos | 1:f3b5e79a8488 | 155 | }; |
jngarlitos | 1:f3b5e79a8488 | 156 | |
jngarlitos | 1:f3b5e79a8488 | 157 | #ifdef __cplusplus |
jngarlitos | 1:f3b5e79a8488 | 158 | } |
jngarlitos | 1:f3b5e79a8488 | 159 | #endif // __cplusplus |
jngarlitos | 1:f3b5e79a8488 | 160 | #endif // !_CN0353_INIT_PARAMS_H_ |
jngarlitos | 1:f3b5e79a8488 | 161 |