James Kiwic
/
RT2_P3_students
Fertig
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Diff: main.cpp
- Revision:
- 1:a30512c3ac73
- Parent:
- 0:78ca29b4c49e
- Child:
- 2:d7b497824b17
- Child:
- 3:769ce5f06d3e
diff -r 78ca29b4c49e -r a30512c3ac73 main.cpp --- a/main.cpp Tue Apr 03 08:47:41 2018 +0000 +++ b/main.cpp Mon Apr 09 05:50:04 2018 +0000 @@ -44,6 +44,7 @@ AnalogOut out(PA_5); // Analog OUT on PA_5 1.6 V -> 0A 3.2A -> 2A (see ESCON) float out_value = 1.6f; // set voltage on 1.6 V (0 A current) float w_soll = 10.0f; // desired velocity +float Ts = 0.002f; // sample time of main loops //------------------------------------------ // ... here define variables like gains etc. //------------------------------------------