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TARGET_MAX32600MBED/flc_regs.h@101:7cff1c4259d7, 2015-06-09 (annotated)

Committer:
Kojto
Date:
Tue Jun 09 14:29:26 2015 +0100
Revision:
101:7cff1c4259d7
Release 101 of the mbed library



Changes:

- new platform: APPNEARME_MICRONFCBOARD, MTS_DRAGONFLY_F411RE, MAX32600MBED, WIZwiki_W7500

- Silabs memory optimization in gpio, pwm fixes

- SPI  - ssel documentation fixes and its use

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /*******************************************************************************
Kojto 101:7cff1c4259d7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
Kojto 101:7cff1c4259d7 3 *
Kojto 101:7cff1c4259d7 4 * Permission is hereby granted, free of charge, to any person obtaining a
Kojto 101:7cff1c4259d7 5 * copy of this software and associated documentation files (the "Software"),
Kojto 101:7cff1c4259d7 6 * to deal in the Software without restriction, including without limitation
Kojto 101:7cff1c4259d7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
Kojto 101:7cff1c4259d7 8 * and/or sell copies of the Software, and to permit persons to whom the
Kojto 101:7cff1c4259d7 9 * Software is furnished to do so, subject to the following conditions:
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * The above copyright notice and this permission notice shall be included
Kojto 101:7cff1c4259d7 12 * in all copies or substantial portions of the Software.
Kojto 101:7cff1c4259d7 13 *
Kojto 101:7cff1c4259d7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
Kojto 101:7cff1c4259d7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
Kojto 101:7cff1c4259d7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
Kojto 101:7cff1c4259d7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
Kojto 101:7cff1c4259d7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
Kojto 101:7cff1c4259d7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
Kojto 101:7cff1c4259d7 20 * OTHER DEALINGS IN THE SOFTWARE.
Kojto 101:7cff1c4259d7 21 *
Kojto 101:7cff1c4259d7 22 * Except as contained in this notice, the name of Maxim Integrated
Kojto 101:7cff1c4259d7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
Kojto 101:7cff1c4259d7 24 * Products, Inc. Branding Policy.
Kojto 101:7cff1c4259d7 25 *
Kojto 101:7cff1c4259d7 26 * The mere transfer of this software does not imply any licenses
Kojto 101:7cff1c4259d7 27 * of trade secrets, proprietary technology, copyrights, patents,
Kojto 101:7cff1c4259d7 28 * trademarks, maskwork rights, or any other form of intellectual
Kojto 101:7cff1c4259d7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
Kojto 101:7cff1c4259d7 30 * ownership rights.
Kojto 101:7cff1c4259d7 31 *******************************************************************************
Kojto 101:7cff1c4259d7 32 */
Kojto 101:7cff1c4259d7 33
Kojto 101:7cff1c4259d7 34 #ifndef _MXC_FLC_REGS_H
Kojto 101:7cff1c4259d7 35 #define _MXC_FLC_REGS_H
Kojto 101:7cff1c4259d7 36
Kojto 101:7cff1c4259d7 37 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 38 extern "C" {
Kojto 101:7cff1c4259d7 39 #endif
Kojto 101:7cff1c4259d7 40
Kojto 101:7cff1c4259d7 41 #include <stdint.h>
Kojto 101:7cff1c4259d7 42
Kojto 101:7cff1c4259d7 43 /**
Kojto 101:7cff1c4259d7 44 * @file flc_regs.h
Kojto 101:7cff1c4259d7 45 * @addtogroup flc FLC
Kojto 101:7cff1c4259d7 46 * @{
Kojto 101:7cff1c4259d7 47 */
Kojto 101:7cff1c4259d7 48 /* Offset Register Description
Kojto 101:7cff1c4259d7 49 ====== ======================================================= */
Kojto 101:7cff1c4259d7 50 typedef struct {
Kojto 101:7cff1c4259d7 51 __IO uint32_t faddr; /* 0x0000 Flash Operation Address */
Kojto 101:7cff1c4259d7 52 __IO uint32_t fckdiv; /* 0x0004 Flash Clock Rate Divisor */
Kojto 101:7cff1c4259d7 53 __IO uint32_t ctrl; /* 0x0008 Flash Control Register */
Kojto 101:7cff1c4259d7 54 __I uint32_t rsv000C[6]; /* 0x000C */
Kojto 101:7cff1c4259d7 55 __IO uint32_t intr; /* 0x0024 Flash Controller Interrupt Flags and Enable/Disable 0 */
Kojto 101:7cff1c4259d7 56 __I uint32_t rsv0028[2]; /* 0x0028 */
Kojto 101:7cff1c4259d7 57 __IO uint32_t fdata; /* 0x0030 Flash Operation Data Register */
Kojto 101:7cff1c4259d7 58 __I uint32_t rsv0034[7]; /* 0x0034 */
Kojto 101:7cff1c4259d7 59 __IO uint32_t perform; /* 0x0050 Flash Performance Settings */
Kojto 101:7cff1c4259d7 60 __I uint32_t rsv0054[11]; /* 0x0054 */
Kojto 101:7cff1c4259d7 61 __IO uint32_t status; /* 0x0080 Security Status Flags */
Kojto 101:7cff1c4259d7 62 __I uint32_t rsv0084; /* 0x0084 */
Kojto 101:7cff1c4259d7 63 __IO uint32_t security; /* 0x0088 Flash Controller Security Settings */
Kojto 101:7cff1c4259d7 64 __I uint32_t rsv008C[4]; /* 0x008C */
Kojto 101:7cff1c4259d7 65 __IO uint32_t bypass; /* 0x009C Status Flags for DSB Operations */
Kojto 101:7cff1c4259d7 66 __IO uint32_t user_option; /* 0x0100 Used to set DSB Access code and Auto-Lock in info block */
Kojto 101:7cff1c4259d7 67 __I uint32_t rsv0104[15]; /* 0x0104 */
Kojto 101:7cff1c4259d7 68 __IO uint32_t ctrl2; /* 0x0140 Flash Control Register 2 */
Kojto 101:7cff1c4259d7 69 __IO uint32_t intfl1; /* 0x0144 Interrupt Flags Register 1 */
Kojto 101:7cff1c4259d7 70 __IO uint32_t inten1; /* 0x0148 Interrupt Enable/Disable Register 1 */
Kojto 101:7cff1c4259d7 71 __I uint32_t rsv014C; /* 0x014C */
Kojto 101:7cff1c4259d7 72 __IO uint32_t disable_xr0; /* 0x0150 Disable Flash Page Exec/Read Register 0 */
Kojto 101:7cff1c4259d7 73 __IO uint32_t disable_xr1; /* 0x0154 Disable Flash Page Exec/Read Register 1 */
Kojto 101:7cff1c4259d7 74 __IO uint32_t disable_xr2; /* 0x0158 Disable Flash Page Exec/Read Register 2 */
Kojto 101:7cff1c4259d7 75 __IO uint32_t disable_xr3; /* 0x015C Disable Flash Page Exec/Read Register 3 */
Kojto 101:7cff1c4259d7 76 __IO uint32_t disable_we0; /* 0x0160 Disable Flash Page Write/Erase Register 0 */
Kojto 101:7cff1c4259d7 77 __IO uint32_t disable_we1; /* 0x0164 Disable Flash Page Write/Erase Register 1 */
Kojto 101:7cff1c4259d7 78 __IO uint32_t disable_we2; /* 0x0168 Disable Flash Page Write/Erase Register 2 */
Kojto 101:7cff1c4259d7 79 __IO uint32_t disable_we3; /* 0x016C Disable Flash Page Write/Erase Register 3 */
Kojto 101:7cff1c4259d7 80 } mxc_flc_regs_t;
Kojto 101:7cff1c4259d7 81
Kojto 101:7cff1c4259d7 82 /*
Kojto 101:7cff1c4259d7 83 Register offsets for module FLC.
Kojto 101:7cff1c4259d7 84 */
Kojto 101:7cff1c4259d7 85 #define MXC_R_FLC_OFFS_FADDR ((uint32_t)0x00000000UL)
Kojto 101:7cff1c4259d7 86 #define MXC_R_FLC_OFFS_FCKDIV ((uint32_t)0x00000004UL)
Kojto 101:7cff1c4259d7 87 #define MXC_R_FLC_OFFS_CTRL ((uint32_t)0x00000008UL)
Kojto 101:7cff1c4259d7 88 #define MXC_R_FLC_OFFS_INTR ((uint32_t)0x00000024UL)
Kojto 101:7cff1c4259d7 89 #define MXC_R_FLC_OFFS_FDATA ((uint32_t)0x00000030UL)
Kojto 101:7cff1c4259d7 90 #define MXC_R_FLC_OFFS_PERFORM ((uint32_t)0x00000050UL)
Kojto 101:7cff1c4259d7 91 #define MXC_R_FLC_OFFS_STATUS ((uint32_t)0x00000080UL)
Kojto 101:7cff1c4259d7 92 #define MXC_R_FLC_OFFS_SECURITY ((uint32_t)0x00000088UL)
Kojto 101:7cff1c4259d7 93 #define MXC_R_FLC_OFFS_BYPASS ((uint32_t)0x0000009CUL)
Kojto 101:7cff1c4259d7 94 #define MXC_R_FLC_OFFS_USER_OPTION ((uint32_t)0x00000100UL)
Kojto 101:7cff1c4259d7 95 #define MXC_R_FLC_OFFS_CTRL2 ((uint32_t)0x00000140UL)
Kojto 101:7cff1c4259d7 96 #define MXC_R_FLC_OFFS_INTFL1 ((uint32_t)0x00000144UL)
Kojto 101:7cff1c4259d7 97 #define MXC_R_FLC_OFFS_INTEN1 ((uint32_t)0x00000148UL)
Kojto 101:7cff1c4259d7 98 #define MXC_R_FLC_OFFS_DISABLE_XR0 ((uint32_t)0x00000150UL)
Kojto 101:7cff1c4259d7 99 #define MXC_R_FLC_OFFS_DISABLE_XR1 ((uint32_t)0x00000154UL)
Kojto 101:7cff1c4259d7 100 #define MXC_R_FLC_OFFS_DISABLE_XR2 ((uint32_t)0x00000158UL)
Kojto 101:7cff1c4259d7 101 #define MXC_R_FLC_OFFS_DISABLE_XR3 ((uint32_t)0x0000015CUL)
Kojto 101:7cff1c4259d7 102 #define MXC_R_FLC_OFFS_DISABLE_WE0 ((uint32_t)0x00000160UL)
Kojto 101:7cff1c4259d7 103 #define MXC_R_FLC_OFFS_DISABLE_WE1 ((uint32_t)0x00000164UL)
Kojto 101:7cff1c4259d7 104 #define MXC_R_FLC_OFFS_DISABLE_WE2 ((uint32_t)0x00000168UL)
Kojto 101:7cff1c4259d7 105 #define MXC_R_FLC_OFFS_DISABLE_WE3 ((uint32_t)0x0000016CUL)
Kojto 101:7cff1c4259d7 106
Kojto 101:7cff1c4259d7 107 #define MXC_V_FLC_ERASE_CODE_PAGE_ERASE ((uint8_t)0x55)
Kojto 101:7cff1c4259d7 108 #define MXC_V_FLC_ERASE_CODE_MASS_ERASE ((uint8_t)0xAA)
Kojto 101:7cff1c4259d7 109
Kojto 101:7cff1c4259d7 110 #define MXC_V_FLC_FLSH_UNLOCK_KEY ((uint8_t)0x2)
Kojto 101:7cff1c4259d7 111
Kojto 101:7cff1c4259d7 112 /*
Kojto 101:7cff1c4259d7 113 Field positions and masks for module FLC.
Kojto 101:7cff1c4259d7 114 */
Kojto 101:7cff1c4259d7 115 #define MXC_F_FLC_FADDR_FADDR_POS 0
Kojto 101:7cff1c4259d7 116 #define MXC_F_FLC_FADDR_FADDR ((uint32_t)(0x0003FFFFUL << MXC_F_FLC_FADDR_FADDR_POS))
Kojto 101:7cff1c4259d7 117
Kojto 101:7cff1c4259d7 118 #define MXC_F_FLC_FCKDIV_FCKDIV_POS 0
Kojto 101:7cff1c4259d7 119 #define MXC_F_FLC_FCKDIV_FCKDIV ((uint32_t)(0x0000001FUL << MXC_F_FLC_FCKDIV_FCKDIV_POS))
Kojto 101:7cff1c4259d7 120
Kojto 101:7cff1c4259d7 121 #define MXC_F_FLC_CTRL_WRITE_POS 0
Kojto 101:7cff1c4259d7 122 #define MXC_F_FLC_CTRL_WRITE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_POS))
Kojto 101:7cff1c4259d7 123 #define MXC_F_FLC_CTRL_MASS_ERASE_POS 1
Kojto 101:7cff1c4259d7 124 #define MXC_F_FLC_CTRL_MASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_MASS_ERASE_POS))
Kojto 101:7cff1c4259d7 125 #define MXC_F_FLC_CTRL_PAGE_ERASE_POS 2
Kojto 101:7cff1c4259d7 126 #define MXC_F_FLC_CTRL_PAGE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PAGE_ERASE_POS))
Kojto 101:7cff1c4259d7 127 #define MXC_F_FLC_CTRL_ERASE_CODE_POS 8
Kojto 101:7cff1c4259d7 128 #define MXC_F_FLC_CTRL_ERASE_CODE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL_ERASE_CODE_POS))
Kojto 101:7cff1c4259d7 129 #define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS 16
Kojto 101:7cff1c4259d7 130 #define MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_UNLOCK_POS))
Kojto 101:7cff1c4259d7 131 #define MXC_F_FLC_CTRL_WRITE_ENABLE_POS 17
Kojto 101:7cff1c4259d7 132 #define MXC_F_FLC_CTRL_WRITE_ENABLE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_WRITE_ENABLE_POS))
Kojto 101:7cff1c4259d7 133 #define MXC_F_FLC_CTRL_PENDING_POS 24
Kojto 101:7cff1c4259d7 134 #define MXC_F_FLC_CTRL_PENDING ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_PENDING_POS))
Kojto 101:7cff1c4259d7 135 #define MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS 25
Kojto 101:7cff1c4259d7 136 #define MXC_F_FLC_CTRL_INFO_BLOCK_VALID ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_INFO_BLOCK_VALID_POS))
Kojto 101:7cff1c4259d7 137 #define MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS 27
Kojto 101:7cff1c4259d7 138 #define MXC_F_FLC_CTRL_AUTO_INCRE_MODE ((uint32_t)(0x00000001UL << MXC_F_FLC_CTRL_AUTO_INCRE_MODE_POS))
Kojto 101:7cff1c4259d7 139 #define MXC_F_FLC_CTRL_FLSH_UNLOCK_POS 28
Kojto 101:7cff1c4259d7 140 #define MXC_F_FLC_CTRL_FLSH_UNLOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_CTRL_FLSH_UNLOCK_POS))
Kojto 101:7cff1c4259d7 141
Kojto 101:7cff1c4259d7 142 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS 0
Kojto 101:7cff1c4259d7 143 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IF_POS))
Kojto 101:7cff1c4259d7 144 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS 1
Kojto 101:7cff1c4259d7 145 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IF ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IF_POS))
Kojto 101:7cff1c4259d7 146 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS 9
Kojto 101:7cff1c4259d7 147 #define MXC_F_FLC_INTR_FLASH_OP_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_DONE_IE_POS))
Kojto 101:7cff1c4259d7 148 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS 10
Kojto 101:7cff1c4259d7 149 #define MXC_F_FLC_INTR_FLASH_OP_FAILED_IE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTR_FLASH_OP_FAILED_IE_POS))
Kojto 101:7cff1c4259d7 150
Kojto 101:7cff1c4259d7 151 #define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS 8
Kojto 101:7cff1c4259d7 152 #define MXC_F_FLC_PERFORM_FAST_READ_MODE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_FAST_READ_MODE_EN_POS))
Kojto 101:7cff1c4259d7 153 #define MXC_F_FLC_PERFORM_DELAY_SE_EN_POS 0
Kojto 101:7cff1c4259d7 154 #define MXC_F_FLC_PERFORM_DELAY_SE_EN ((uint32_t)(0x00000001UL << MXC_F_FLC_PERFORM_DELAY_SE_EN_POS))
Kojto 101:7cff1c4259d7 155
Kojto 101:7cff1c4259d7 156 #define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS 0
Kojto 101:7cff1c4259d7 157 #define MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_WINDOW_POS))
Kojto 101:7cff1c4259d7 158 #define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS 1
Kojto 101:7cff1c4259d7 159 #define MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_DEBUG_LOCK_STATIC_POS))
Kojto 101:7cff1c4259d7 160 #define MXC_F_FLC_STATUS_AUTO_LOCK_POS 3
Kojto 101:7cff1c4259d7 161 #define MXC_F_FLC_STATUS_AUTO_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_STATUS_AUTO_LOCK_POS))
Kojto 101:7cff1c4259d7 162
Kojto 101:7cff1c4259d7 163 #define MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS 0
Kojto 101:7cff1c4259d7 164 #define MXC_F_FLC_SECURITY_DEBUG_DISABLE ((uint32_t)(0x000000FFUL << MXC_F_FLC_SECURITY_DEBUG_DISABLE_POS))
Kojto 101:7cff1c4259d7 165 #define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS 8
Kojto 101:7cff1c4259d7 166 #define MXC_F_FLC_SECURITY_MASS_ERASE_LOCK ((uint32_t)(0x0000000FUL << MXC_F_FLC_SECURITY_MASS_ERASE_LOCK_POS))
Kojto 101:7cff1c4259d7 167 #define MXC_F_FLC_SECURITY_SECURITY_LOCK_POS 31
Kojto 101:7cff1c4259d7 168 #define MXC_F_FLC_SECURITY_SECURITY_LOCK ((uint32_t)(0x00000001UL << MXC_F_FLC_SECURITY_SECURITY_LOCK_POS))
Kojto 101:7cff1c4259d7 169
Kojto 101:7cff1c4259d7 170 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS 0
Kojto 101:7cff1c4259d7 171 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_ERASE_POS))
Kojto 101:7cff1c4259d7 172 #define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS 1
Kojto 101:7cff1c4259d7 173 #define MXC_F_FLC_BYPASS_SUPERWIPE_ERASE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_ERASE_POS))
Kojto 101:7cff1c4259d7 174 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS 2
Kojto 101:7cff1c4259d7 175 #define MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_DESTRUCT_BYPASS_COMPLETE_POS))
Kojto 101:7cff1c4259d7 176 #define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS 3
Kojto 101:7cff1c4259d7 177 #define MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE ((uint32_t)(0x00000001UL << MXC_F_FLC_BYPASS_SUPERWIPE_COMPLETE_POS))
Kojto 101:7cff1c4259d7 178
Kojto 101:7cff1c4259d7 179 #define MXC_F_FLC_CTRL2_FLASH_LVE_POS 0
Kojto 101:7cff1c4259d7 180 #define MXC_F_FLC_CTRL2_FLASH_LVE ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_FLASH_LVE_POS))
Kojto 101:7cff1c4259d7 181 #define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS 8
Kojto 101:7cff1c4259d7 182 #define MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL ((uint32_t)(0x000000FFUL << MXC_F_FLC_CTRL2_BYPASS_AHB_FAIL_POS))
Kojto 101:7cff1c4259d7 183
Kojto 101:7cff1c4259d7 184 #define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS 0
Kojto 101:7cff1c4259d7 185 #define MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_SRAM_ADDR_WRAPPED_POS))
Kojto 101:7cff1c4259d7 186 #define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS 1
Kojto 101:7cff1c4259d7 187 #define MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_INVALID_FLASH_ADDR_POS))
Kojto 101:7cff1c4259d7 188 #define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS 2
Kojto 101:7cff1c4259d7 189 #define MXC_F_FLC_INTFL1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_FLASH_READ_LOCKED_POS))
Kojto 101:7cff1c4259d7 190 #define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS 3
Kojto 101:7cff1c4259d7 191 #define MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTFL1_TRIM_UPDATE_DONE_POS))
Kojto 101:7cff1c4259d7 192
Kojto 101:7cff1c4259d7 193 #define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS 0
Kojto 101:7cff1c4259d7 194 #define MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_SRAM_ADDR_WRAPPED_POS))
Kojto 101:7cff1c4259d7 195 #define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS 1
Kojto 101:7cff1c4259d7 196 #define MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_INVALID_FLASH_ADDR_POS))
Kojto 101:7cff1c4259d7 197 #define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS 2
Kojto 101:7cff1c4259d7 198 #define MXC_F_FLC_INTEN1_FLASH_READ_LOCKED ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_FLASH_READ_LOCKED_POS))
Kojto 101:7cff1c4259d7 199 #define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS 3
Kojto 101:7cff1c4259d7 200 #define MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE ((uint32_t)(0x00000001UL << MXC_F_FLC_INTEN1_TRIM_UPDATE_DONE_POS))
Kojto 101:7cff1c4259d7 201
Kojto 101:7cff1c4259d7 202 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 203 }
Kojto 101:7cff1c4259d7 204 #endif
Kojto 101:7cff1c4259d7 205
Kojto 101:7cff1c4259d7 206 /**
Kojto 101:7cff1c4259d7 207 * @}
Kojto 101:7cff1c4259d7 208 */
Kojto 101:7cff1c4259d7 209
Kojto 101:7cff1c4259d7 210 #endif /* _MXC_FLC_REGS_H_ */