mbed-dev - added prescaler for 16 bit pwm in LPC1347 target

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added prescaler for 16 bit pwm in LPC1347 target
Diff: targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rmu.c

Revision:: 50:a417edff4437
Parent:: 0:9b334a45a8ff
Child:: 144:ef7eb2e8f9f7
diff -r 57ac6e3cdfd3 -r a417edff4437 targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rmu.c
--- a/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rmu.c	Wed Jan 13 12:45:11 2016 +0000
+++ b/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rmu.c	Fri Jan 15 07:45:16 2016 +0000
@@ -2,10 +2,10 @@
  * @file em_rmu.c
  * @brief Reset Management Unit (RMU) peripheral module peripheral API
  *
- * @version 3.20.12
+ * @version 4.2.1
  *******************************************************************************
  * @section License
- * <b>(C) Copyright 2014 Silicon Labs, http://www.silabs.com</b>
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
  *******************************************************************************
  *
  * Permission is granted to anyone to use this software for any purpose,
@@ -31,12 +31,12 @@
  *
  ******************************************************************************/
 
-
 #include "em_rmu.h"
 #if defined(RMU_COUNT) && (RMU_COUNT > 0)
 
+#include "em_common.h"
 #include "em_emu.h"
-#include "em_bitband.h"
+#include "em_bus.h"
 
 /***************************************************************************//**
  * @addtogroup EM_Library
@@ -57,6 +57,7 @@
 
 /* Reset cause "don't care" definitions.
    1's mark the bits that must be zero, zeros are "don't cares". */
+#if (_RMU_RSTCAUSE_MASK == 0x0000007FUL)
 #define RMU_RSTCAUSE_PORST_XMASK         (0x00000000) /**0b0000000000000000  < Power On Reset */
 #define RMU_RSTCAUSE_BODUNREGRST_XMASK   (0x00000081) /**0b0000000010000001  < Brown Out Detector Unregulated Domain Reset */
 #define RMU_RSTCAUSE_BODREGRST_XMASK     (0x00000091) /**0b0000000010010001  < Brown Out Detector Regulated Domain Reset */
@@ -65,22 +66,54 @@
 #define RMU_RSTCAUSE_LOCKUPRST_XMASK     (0x0000EFDF) /**0b1110111111011111  < LOCKUP Reset */
 #define RMU_RSTCAUSE_SYSREQRST_XMASK     (0x0000EF9F) /**0b1110111110011111  < System Request Reset */
 #define NUM_RSTCAUSES                             (7)
-#ifndef _EFM32_GECKO_FAMILY
+
+#elif (_RMU_RSTCAUSE_MASK == 0x000007FFUL)
+#define RMU_RSTCAUSE_PORST_XMASK         (0x00000000) /**0b0000000000000000  < Power On Reset */
+#define RMU_RSTCAUSE_BODUNREGRST_XMASK   (0x00000081) /**0b0000000010000001  < Brown Out Detector Unregulated Domain Reset */
+#define RMU_RSTCAUSE_BODREGRST_XMASK     (0x00000091) /**0b0000000010010001  < Brown Out Detector Regulated Domain Reset */
+#define RMU_RSTCAUSE_EXTRST_XMASK        (0x00000001) /**0b0000000000000001  < External Pin Reset */
+#define RMU_RSTCAUSE_WDOGRST_XMASK       (0x00000003) /**0b0000000000000011  < Watchdog Reset */
+#define RMU_RSTCAUSE_LOCKUPRST_XMASK     (0x0000EFDF) /**0b1110111111011111  < LOCKUP Reset */
+#define RMU_RSTCAUSE_SYSREQRST_XMASK     (0x0000EF9F) /**0b1110111110011111  < System Request Reset */
 #define RMU_RSTCAUSE_EM4RST_XMASK        (0x00000719) /**0b0000011100011001  < EM4 Reset */
 #define RMU_RSTCAUSE_EM4WURST_XMASK      (0x00000619) /**0b0000011000011001  < EM4 Wake-up Reset */
 #define RMU_RSTCAUSE_BODAVDD0_XMASK      (0x0000041F) /**0b0000010000011111  < AVDD0 Bod Reset. */
 #define RMU_RSTCAUSE_BODAVDD1_XMASK      (0x0000021F) /**0b0000001000011111  < AVDD1 Bod Reset. */
-#undef NUM_RSTCAUSES
 #define NUM_RSTCAUSES                            (11)
-#endif
-#ifdef BU_PRESENT
+
+#elif (_RMU_RSTCAUSE_MASK == 0x0000FFFFUL)
+#define RMU_RSTCAUSE_PORST_XMASK         (0x00000000) /**0b0000000000000000  < Power On Reset */
+#define RMU_RSTCAUSE_BODUNREGRST_XMASK   (0x00000081) /**0b0000000010000001  < Brown Out Detector Unregulated Domain Reset */
+#define RMU_RSTCAUSE_BODREGRST_XMASK     (0x00000091) /**0b0000000010010001  < Brown Out Detector Regulated Domain Reset */
+#define RMU_RSTCAUSE_EXTRST_XMASK        (0x00000001) /**0b0000000000000001  < External Pin Reset */
+#define RMU_RSTCAUSE_WDOGRST_XMASK       (0x00000003) /**0b0000000000000011  < Watchdog Reset */
+#define RMU_RSTCAUSE_LOCKUPRST_XMASK     (0x0000EFDF) /**0b1110111111011111  < LOCKUP Reset */
+#define RMU_RSTCAUSE_SYSREQRST_XMASK     (0x0000EF9F) /**0b1110111110011111  < System Request Reset */
+#define RMU_RSTCAUSE_EM4RST_XMASK        (0x00000719) /**0b0000011100011001  < EM4 Reset */
+#define RMU_RSTCAUSE_EM4WURST_XMASK      (0x00000619) /**0b0000011000011001  < EM4 Wake-up Reset */
+#define RMU_RSTCAUSE_BODAVDD0_XMASK      (0x0000041F) /**0b0000010000011111  < AVDD0 Bod Reset */
+#define RMU_RSTCAUSE_BODAVDD1_XMASK      (0x0000021F) /**0b0000001000011111  < AVDD1 Bod Reset */
 #define RMU_RSTCAUSE_BUBODVDDDREG_XMASK  (0x00000001) /**0b0000000000000001  < Backup Brown Out Detector, VDD_DREG */
 #define RMU_RSTCAUSE_BUBODBUVIN_XMASK    (0x00000001) /**0b0000000000000001  < Backup Brown Out Detector, BU_VIN */
 #define RMU_RSTCAUSE_BUBODUNREG_XMASK    (0x00000001) /**0b0000000000000001  < Backup Brown Out Detector Unregulated Domain */
 #define RMU_RSTCAUSE_BUBODREG_XMASK      (0x00000001) /**0b0000000000000001  < Backup Brown Out Detector Regulated Domain */
 #define RMU_RSTCAUSE_BUMODERST_XMASK     (0x00000001) /**0b0000000000000001  < Backup mode reset */
-#undef NUM_RSTCAUSES
 #define NUM_RSTCAUSES                            (16)
+
+#elif ((_RMU_RSTCAUSE_MASK & 0x0FFFFFFF) == 0x00010F1DUL)
+#define RMU_RSTCAUSE_PORST_XMASK         (0x00000000) /**0b0000000000000000  < Power On Reset */
+#define RMU_RSTCAUSE_BODAVDD_XMASK       (0x00000001) /**0b0000000000000001  < AVDD Bod Reset */
+#define RMU_RSTCAUSE_BODDVDD_XMASK       (0x00000003) /**0b0000000000000011  < DVDD Bod Reset */
+#define RMU_RSTCAUSE_BODREGRST_XMASK     (0x0000000F) /**0b0000000000001111  < Brown Out Detector Regulated Domain Reset */
+#define RMU_RSTCAUSE_EXTRST_XMASK        (0x0000000F) /**0b0000000000001111  < External Pin Reset */
+#define RMU_RSTCAUSE_LOCKUPRST_XMASK     (0x0000001F) /**0b0000000000011111  < LOCKUP Reset */
+#define RMU_RSTCAUSE_SYSREQRST_XMASK     (0x0000001F) /**0b0000000000011111  < System Request Reset */
+#define RMU_RSTCAUSE_WDOGRST_XMASK       (0x0000001F) /**0b0000000000011111  < Watchdog Reset */
+#define RMU_RSTCAUSE_EM4RST_XMASK        (0x00000003) /**0b0000000000000011  < EM4H/S Reset */
+#define NUM_RSTCAUSES                             (9)
+
+#else
+#warning "RMU_RSTCAUSE XMASKs are not defined for this family."
 #endif
 
 /*******************************************************************************
@@ -90,8 +123,8 @@
 /** Reset cause mask type. */
 typedef struct
 {
-  uint32_t    resetCauseMask;
-  uint32_t    dontCareMask;
+  uint32_t resetCauseMask;
+  uint32_t dontCareMask;
 } RMU_ResetCauseMasks_Typedef;
 
 
@@ -103,19 +136,38 @@
 static const RMU_ResetCauseMasks_Typedef  resetCauseMasks[NUM_RSTCAUSES] =
   {
     { RMU_RSTCAUSE_PORST,        RMU_RSTCAUSE_PORST_XMASK },
+#if defined(RMU_RSTCAUSE_BODUNREGRST)
     { RMU_RSTCAUSE_BODUNREGRST,  RMU_RSTCAUSE_BODUNREGRST_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_BODREGRST)
     { RMU_RSTCAUSE_BODREGRST,    RMU_RSTCAUSE_BODREGRST_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_AVDDBOD)
+    { RMU_RSTCAUSE_AVDDBOD,      RMU_RSTCAUSE_BODAVDD_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_DVDDBOD)
+    { RMU_RSTCAUSE_DVDDBOD,      RMU_RSTCAUSE_BODDVDD_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_DECBOD)
+    { RMU_RSTCAUSE_DECBOD,       RMU_RSTCAUSE_BODREGRST_XMASK },
+#endif
     { RMU_RSTCAUSE_EXTRST,       RMU_RSTCAUSE_EXTRST_XMASK },
     { RMU_RSTCAUSE_WDOGRST,      RMU_RSTCAUSE_WDOGRST_XMASK },
     { RMU_RSTCAUSE_LOCKUPRST,    RMU_RSTCAUSE_LOCKUPRST_XMASK },
     { RMU_RSTCAUSE_SYSREQRST,    RMU_RSTCAUSE_SYSREQRST_XMASK },
-#ifndef _EFM32_GECKO_FAMILY
+#if defined(RMU_RSTCAUSE_EM4RST)
     { RMU_RSTCAUSE_EM4RST,       RMU_RSTCAUSE_EM4RST_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_EM4WURST)
     { RMU_RSTCAUSE_EM4WURST,     RMU_RSTCAUSE_EM4WURST_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_BODAVDD0)
     { RMU_RSTCAUSE_BODAVDD0,     RMU_RSTCAUSE_BODAVDD0_XMASK },
+#endif
+#if defined(RMU_RSTCAUSE_BODAVDD1)
     { RMU_RSTCAUSE_BODAVDD1,     RMU_RSTCAUSE_BODAVDD1_XMASK },
 #endif
-#ifdef BU_PRESENT
+#if defined(BU_PRESENT)
     { RMU_RSTCAUSE_BUBODVDDDREG, RMU_RSTCAUSE_BUBODVDDDREG_XMASK },
     { RMU_RSTCAUSE_BUBODBUVIN,   RMU_RSTCAUSE_BUBODBUVIN_XMASK },
     { RMU_RSTCAUSE_BUBODUNREG,   RMU_RSTCAUSE_BUBODUNREG_XMASK },
@@ -128,7 +180,7 @@
 /*******************************************************************************
  ********************************     TEST     ********************************
  ******************************************************************************/
-#ifdef EMLIB_REGRESSION_TEST
+#if defined(EMLIB_REGRESSION_TEST)
 /* Test variable that replaces the RSTCAUSE cause register when testing
    the RMU_ResetCauseGet function. */
 extern uint32_t rstCause;
@@ -147,13 +199,23 @@
  *
  * @param[in] reset Reset types to enable/disable
  *
- * @param[in] enable
- *   @li false - Disable reset signal or flag
- *   @li true - Enable reset signal or flag
+ * @param[in] mode  Reset mode
  ******************************************************************************/
-void RMU_ResetControl(RMU_Reset_TypeDef reset, bool enable)
+void RMU_ResetControl(RMU_Reset_TypeDef reset, RMU_ResetMode_TypeDef mode)
 {
-  BITBAND_Peripheral(&(RMU->CTRL), (uint32_t)reset, (uint32_t)enable);
+  /* Note that the RMU supports bit-band access, but not peripheral bit-field set/clear */
+#if defined(_RMU_CTRL_PINRMODE_MASK)
+  uint32_t val;
+#endif
+  uint32_t shift;
+
+  shift = EFM32_CTZ((uint32_t)reset);
+#if defined(_RMU_CTRL_PINRMODE_MASK)
+  val = (uint32_t)mode << shift;
+  RMU->CTRL = (RMU->CTRL & ~reset) | val;
+#else
+  BUS_RegBitWrite(&RMU->CTRL, (uint32_t)shift, mode ? 1 : 0);
+#endif
 }
 
 
@@ -168,25 +230,29 @@
  ******************************************************************************/
 void RMU_ResetCauseClear(void)
 {
-  uint32_t locked;
-
   RMU->CMD = RMU_CMD_RCCLR;
 
-  /* Clear some reset causes not cleared with RMU CMD register */
-  /* (If EMU registers locked, they must be unlocked first) */
-  locked = EMU->LOCK & EMU_LOCK_LOCKKEY_LOCKED;
-  if (locked)
+#if defined(EMU_AUXCTRL_HRCCLR)
   {
-    EMU_Unlock();
-  }
+    uint32_t locked;
 
-  BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 1);
-  BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 0);
+    /* Clear some reset causes not cleared with RMU CMD register */
+    /* (If EMU registers locked, they must be unlocked first) */
+    locked = EMU->LOCK & EMU_LOCK_LOCKKEY_LOCKED;
+    if (locked)
+    {
+      EMU_Unlock();
+    }
 
-  if (locked)
-  {
-    EMU_Lock();
+    BUS_RegBitWrite(&(EMU->AUXCTRL), _EMU_AUXCTRL_HRCCLR_SHIFT, 1);
+    BUS_RegBitWrite(&(EMU->AUXCTRL), _EMU_AUXCTRL_HRCCLR_SHIFT, 0);
+
+    if (locked)
+    {
+      EMU_Lock();
+    }
   }
+#endif
 }
 
 
@@ -195,49 +261,33 @@
  *   Get the cause of the last reset.
  *
  * @details
- *   In order to be useful, the reset cause must be cleared by SW before a new
+ *   In order to be useful, the reset cause must be cleared by software before a new
  *   reset occurs, otherwise reset causes may accumulate. See @ref
  *   RMU_ResetCauseClear(). This function call will return the main cause for
  *   reset, which can be a bit mask (several causes), and clear away "noise".
  *
  * @return
- *   The reset cause, a bit mask of (typically, but not always, only one) of:
- *   @li RMU_RSTCAUSE_PORST - Power on reset
- *   @li RMU_RSTCAUSE_BODUNREGRST - Brown out detector, unregulated power
- *   @li RMU_RSTCAUSE_BODREGRST - Brown out detector, regulated power
- *   @li RMU_RSTCAUSE_EXTRST - External reset
- *   @li RMU_RSTCAUSE_WDOGRST - Watchdog reset
- *   @li RMU_RSTCAUSE_LOCKUPRST - Cortex-M3 lockup reset
- *   @li RMU_RSTCAUSE_SYSREQRST - Cortex-M3 system request reset
- *   @li RMU_RSTCAUSE_EM4RST - Set if the system has been in EM4
- *   @li RMU_RSTCAUSE_EM4WURST - Set if the system woke up on a pin from EM4
- *   @li RMU_RSTCAUSE_BODAVDD0 - Analog power domain 0 brown out detector reset
- *   @li RMU_RSTCAUSE_BODAVDD1 - Analog power domain 1 brown out detector reset
- *   @li RMU_RSTCAUSE_BUBODVDDDREG - Backup BOD on VDDD_REG triggered
- *   @li RMU_RSTCAUSE_BUBODBUVIN - Backup BOD on BU_VIN triggered
- *   @li RMU_RSTCAUSE_BUBODUNREG - Backup BOD on unregulated power triggered
- *   @li RMU_RSTCAUSE_BUBODREG - Backup BOD on regulated powered has triggered
- *   @li RMU_RSTCAUSE_BUMODERST - System has been in Backup mode
+ *   Reset cause mask. Please consult the reference manual for description
+ *   of the reset cause mask.
  ******************************************************************************/
 uint32_t RMU_ResetCauseGet(void)
 {
-#ifndef EMLIB_REGRESSION_TEST
-  uint32_t rstCause      = RMU->RSTCAUSE;
+#if !defined(EMLIB_REGRESSION_TEST)
+  uint32_t rstCause = RMU->RSTCAUSE;
 #endif
   uint32_t validRstCause = 0;
-  int      i;
-  
-  for (i=0; i<NUM_RSTCAUSES; i++)
+  uint32_t i;
+
+  for (i = 0; i < NUM_RSTCAUSES; i++)
   {
-    //Checks to see if rstCause matches a RSTCAUSE and is not excluded by the X-mask
-    if ((rstCause & resetCauseMasks[i].resetCauseMask) &&
-        !(rstCause & resetCauseMasks[i].dontCareMask))
+    /* Checks to see if rstCause matches a RSTCAUSE and is not excluded by the X-mask */
+    if ((rstCause & resetCauseMasks[i].resetCauseMask)
+        && !(rstCause & resetCauseMasks[i].dontCareMask))
     {
-      //Adds the reset-cause to list of real reset-causes
+      /* Adds the reset-cause to list of real reset-causes */
       validRstCause |= resetCauseMasks[i].resetCauseMask;
     }
   }
-  
   return validRstCause;
 }
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Type:	Library
Created:	10 Sep 2016
Imports:	1
Forks:	0
Commits:	148
Dependents:	0
Dependencies:	0
Followers:	1
Diff: targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_rmu.c

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