added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_leuart.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 50:a417edff4437
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file em_leuart.c |
<> | 144:ef7eb2e8f9f7 | 3 | * @brief Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) |
<> | 144:ef7eb2e8f9f7 | 4 | * Peripheral API |
<> | 144:ef7eb2e8f9f7 | 5 | * @version 4.2.1 |
<> | 144:ef7eb2e8f9f7 | 6 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 7 | * @section License |
<> | 144:ef7eb2e8f9f7 | 8 | * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b> |
<> | 144:ef7eb2e8f9f7 | 9 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * Permission is granted to anyone to use this software for any purpose, |
<> | 144:ef7eb2e8f9f7 | 12 | * including commercial applications, and to alter it and redistribute it |
<> | 144:ef7eb2e8f9f7 | 13 | * freely, subject to the following restrictions: |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. The origin of this software must not be misrepresented; you must not |
<> | 144:ef7eb2e8f9f7 | 16 | * claim that you wrote the original software. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Altered source versions must be plainly marked as such, and must not be |
<> | 144:ef7eb2e8f9f7 | 18 | * misrepresented as being the original software. |
<> | 144:ef7eb2e8f9f7 | 19 | * 3. This notice may not be removed or altered from any source distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * |
<> | 144:ef7eb2e8f9f7 | 21 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no |
<> | 144:ef7eb2e8f9f7 | 22 | * obligation to support this Software. Silicon Labs is providing the |
<> | 144:ef7eb2e8f9f7 | 23 | * Software "AS IS", with no express or implied warranties of any kind, |
<> | 144:ef7eb2e8f9f7 | 24 | * including, but not limited to, any implied warranties of merchantability |
<> | 144:ef7eb2e8f9f7 | 25 | * or fitness for any particular purpose or warranties against infringement |
<> | 144:ef7eb2e8f9f7 | 26 | * of any proprietary rights of a third party. |
<> | 144:ef7eb2e8f9f7 | 27 | * |
<> | 144:ef7eb2e8f9f7 | 28 | * Silicon Labs will not be liable for any consequential, incidental, or |
<> | 144:ef7eb2e8f9f7 | 29 | * special damages, or any other relief, or for any claim by any third party, |
<> | 144:ef7eb2e8f9f7 | 30 | * arising from your use of this Software. |
<> | 144:ef7eb2e8f9f7 | 31 | * |
<> | 144:ef7eb2e8f9f7 | 32 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | #include "em_leuart.h" |
<> | 144:ef7eb2e8f9f7 | 35 | #if defined(LEUART_COUNT) && (LEUART_COUNT > 0) |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | #include "em_cmu.h" |
<> | 144:ef7eb2e8f9f7 | 38 | #include "em_assert.h" |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 41 | * @addtogroup EM_Library |
<> | 144:ef7eb2e8f9f7 | 42 | * @{ |
<> | 144:ef7eb2e8f9f7 | 43 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 44 | |
<> | 144:ef7eb2e8f9f7 | 45 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 46 | * @addtogroup LEUART |
<> | 144:ef7eb2e8f9f7 | 47 | * @brief Low Energy Universal Asynchronous Receiver/Transmitter (LEUART) |
<> | 144:ef7eb2e8f9f7 | 48 | * Peripheral API |
<> | 144:ef7eb2e8f9f7 | 49 | * @{ |
<> | 144:ef7eb2e8f9f7 | 50 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 53 | ******************************* DEFINES *********************************** |
<> | 144:ef7eb2e8f9f7 | 54 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | |
<> | 144:ef7eb2e8f9f7 | 59 | /** Validation of LEUART register block pointer reference |
<> | 144:ef7eb2e8f9f7 | 60 | * for assert statements. */ |
<> | 144:ef7eb2e8f9f7 | 61 | #if (LEUART_COUNT == 1) |
<> | 144:ef7eb2e8f9f7 | 62 | #define LEUART_REF_VALID(ref) ((ref) == LEUART0) |
<> | 144:ef7eb2e8f9f7 | 63 | #elif (LEUART_COUNT == 2) |
<> | 144:ef7eb2e8f9f7 | 64 | #define LEUART_REF_VALID(ref) (((ref) == LEUART0) || ((ref) == LEUART1)) |
<> | 144:ef7eb2e8f9f7 | 65 | #else |
<> | 144:ef7eb2e8f9f7 | 66 | #error "Undefined number of low energy UARTs (LEUART)." |
<> | 144:ef7eb2e8f9f7 | 67 | #endif |
<> | 144:ef7eb2e8f9f7 | 68 | |
<> | 144:ef7eb2e8f9f7 | 69 | /** @endcond */ |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 72 | ************************** LOCAL FUNCTIONS ******************************** |
<> | 144:ef7eb2e8f9f7 | 73 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ |
<> | 144:ef7eb2e8f9f7 | 76 | |
<> | 144:ef7eb2e8f9f7 | 77 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 78 | * @brief |
<> | 144:ef7eb2e8f9f7 | 79 | * Wait for ongoing sync of register(s) to low frequency domain to complete. |
<> | 144:ef7eb2e8f9f7 | 80 | * |
<> | 144:ef7eb2e8f9f7 | 81 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 82 | * Pointer to LEUART peripheral register block |
<> | 144:ef7eb2e8f9f7 | 83 | * |
<> | 144:ef7eb2e8f9f7 | 84 | * @param[in] mask |
<> | 144:ef7eb2e8f9f7 | 85 | * Bitmask corresponding to SYNCBUSY register defined bits, indicating |
<> | 144:ef7eb2e8f9f7 | 86 | * registers that must complete any ongoing synchronization. |
<> | 144:ef7eb2e8f9f7 | 87 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 88 | __STATIC_INLINE void LEUART_Sync(LEUART_TypeDef *leuart, uint32_t mask) |
<> | 144:ef7eb2e8f9f7 | 89 | { |
<> | 144:ef7eb2e8f9f7 | 90 | /* Avoid deadlock if modifying the same register twice when freeze mode is */ |
<> | 144:ef7eb2e8f9f7 | 91 | /* activated. */ |
<> | 144:ef7eb2e8f9f7 | 92 | if (leuart->FREEZE & LEUART_FREEZE_REGFREEZE) |
<> | 144:ef7eb2e8f9f7 | 93 | { |
<> | 144:ef7eb2e8f9f7 | 94 | return; |
<> | 144:ef7eb2e8f9f7 | 95 | } |
<> | 144:ef7eb2e8f9f7 | 96 | |
<> | 144:ef7eb2e8f9f7 | 97 | /* Wait for any pending previous write operation to have been completed */ |
<> | 144:ef7eb2e8f9f7 | 98 | /* in low frequency domain */ |
<> | 144:ef7eb2e8f9f7 | 99 | while (leuart->SYNCBUSY & mask) |
<> | 144:ef7eb2e8f9f7 | 100 | ; |
<> | 144:ef7eb2e8f9f7 | 101 | } |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | /** @endcond */ |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 106 | ************************** GLOBAL FUNCTIONS ******************************* |
<> | 144:ef7eb2e8f9f7 | 107 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 108 | |
<> | 144:ef7eb2e8f9f7 | 109 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 110 | * @brief |
<> | 144:ef7eb2e8f9f7 | 111 | * Calculate baudrate for LEUART given reference frequency and clock division. |
<> | 144:ef7eb2e8f9f7 | 112 | * |
<> | 144:ef7eb2e8f9f7 | 113 | * @details |
<> | 144:ef7eb2e8f9f7 | 114 | * This function returns the baudrate that a LEUART module will use if |
<> | 144:ef7eb2e8f9f7 | 115 | * configured with the given frequency and clock divisor. Notice that |
<> | 144:ef7eb2e8f9f7 | 116 | * this function will not use actual HW configuration. It can be used |
<> | 144:ef7eb2e8f9f7 | 117 | * to determinate if a given configuration is sufficiently accurate for the |
<> | 144:ef7eb2e8f9f7 | 118 | * application. |
<> | 144:ef7eb2e8f9f7 | 119 | * |
<> | 144:ef7eb2e8f9f7 | 120 | * @param[in] refFreq |
<> | 144:ef7eb2e8f9f7 | 121 | * LEUART peripheral frequency used. |
<> | 144:ef7eb2e8f9f7 | 122 | * |
<> | 144:ef7eb2e8f9f7 | 123 | * @param[in] clkdiv |
<> | 144:ef7eb2e8f9f7 | 124 | * Clock division factor to be used. |
<> | 144:ef7eb2e8f9f7 | 125 | * |
<> | 144:ef7eb2e8f9f7 | 126 | * @return |
<> | 144:ef7eb2e8f9f7 | 127 | * Baudrate with given settings. |
<> | 144:ef7eb2e8f9f7 | 128 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 129 | uint32_t LEUART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv) |
<> | 144:ef7eb2e8f9f7 | 130 | { |
<> | 144:ef7eb2e8f9f7 | 131 | uint32_t divisor; |
<> | 144:ef7eb2e8f9f7 | 132 | uint32_t remainder; |
<> | 144:ef7eb2e8f9f7 | 133 | uint32_t quotient; |
<> | 144:ef7eb2e8f9f7 | 134 | uint32_t br; |
<> | 144:ef7eb2e8f9f7 | 135 | |
<> | 144:ef7eb2e8f9f7 | 136 | /* Mask out unused bits */ |
<> | 144:ef7eb2e8f9f7 | 137 | clkdiv &= _LEUART_CLKDIV_MASK; |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | /* We want to use integer division to avoid forcing in float division */ |
<> | 144:ef7eb2e8f9f7 | 140 | /* utils, and yet keep rounding effect errors to a minimum. */ |
<> | 144:ef7eb2e8f9f7 | 141 | |
<> | 144:ef7eb2e8f9f7 | 142 | /* |
<> | 144:ef7eb2e8f9f7 | 143 | * Baudrate is given by: |
<> | 144:ef7eb2e8f9f7 | 144 | * |
<> | 144:ef7eb2e8f9f7 | 145 | * br = fLEUARTn/(1 + (CLKDIV / 256)) |
<> | 144:ef7eb2e8f9f7 | 146 | * |
<> | 144:ef7eb2e8f9f7 | 147 | * which can be rewritten to |
<> | 144:ef7eb2e8f9f7 | 148 | * |
<> | 144:ef7eb2e8f9f7 | 149 | * br = (256 * fLEUARTn)/(256 + CLKDIV) |
<> | 144:ef7eb2e8f9f7 | 150 | * |
<> | 144:ef7eb2e8f9f7 | 151 | * Normally, with fLEUARTn appr 32768Hz, there is no problem with overflow |
<> | 144:ef7eb2e8f9f7 | 152 | * if using 32 bit arithmetic. However, since fLEUARTn may be derived from |
<> | 144:ef7eb2e8f9f7 | 153 | * HFCORECLK as well, we must consider overflow when using integer arithmetic. |
<> | 144:ef7eb2e8f9f7 | 154 | */ |
<> | 144:ef7eb2e8f9f7 | 155 | |
<> | 144:ef7eb2e8f9f7 | 156 | /* |
<> | 144:ef7eb2e8f9f7 | 157 | * The basic problem with integer division in the above formula is that |
<> | 144:ef7eb2e8f9f7 | 158 | * the dividend (256 * fLEUARTn) may become higher than max 32 bit |
<> | 144:ef7eb2e8f9f7 | 159 | * integer. Yet we want to evaluate dividend first before dividing in |
<> | 144:ef7eb2e8f9f7 | 160 | * order to get as small rounding effects as possible. We do not want |
<> | 144:ef7eb2e8f9f7 | 161 | * to make too harsh restrictions on max fLEUARTn value either. |
<> | 144:ef7eb2e8f9f7 | 162 | * |
<> | 144:ef7eb2e8f9f7 | 163 | * For division a/b, we can write |
<> | 144:ef7eb2e8f9f7 | 164 | * |
<> | 144:ef7eb2e8f9f7 | 165 | * a = qb + r |
<> | 144:ef7eb2e8f9f7 | 166 | * |
<> | 144:ef7eb2e8f9f7 | 167 | * where q is the quotient and r is the remainder, both integers. |
<> | 144:ef7eb2e8f9f7 | 168 | * |
<> | 144:ef7eb2e8f9f7 | 169 | * The orignal baudrate formula can be rewritten as |
<> | 144:ef7eb2e8f9f7 | 170 | * |
<> | 144:ef7eb2e8f9f7 | 171 | * br = 256a / b = 256(qb + r)/b = 256q + 256r/b |
<> | 144:ef7eb2e8f9f7 | 172 | * |
<> | 144:ef7eb2e8f9f7 | 173 | * where a is 'refFreq' and b is 'divisor', referring to variable names. |
<> | 144:ef7eb2e8f9f7 | 174 | */ |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | divisor = 256 + clkdiv; |
<> | 144:ef7eb2e8f9f7 | 177 | quotient = refFreq / divisor; |
<> | 144:ef7eb2e8f9f7 | 178 | remainder = refFreq % divisor; |
<> | 144:ef7eb2e8f9f7 | 179 | |
<> | 144:ef7eb2e8f9f7 | 180 | /* Since divisor >= 256, the below cannot exceed max 32 bit value. */ |
<> | 144:ef7eb2e8f9f7 | 181 | br = 256 * quotient; |
<> | 144:ef7eb2e8f9f7 | 182 | |
<> | 144:ef7eb2e8f9f7 | 183 | /* |
<> | 144:ef7eb2e8f9f7 | 184 | * Remainder < (256 + clkdiv), which means dividend (256 * remainder) worst case is |
<> | 144:ef7eb2e8f9f7 | 185 | * 256*(256 + 0x7ff8) = 0x80F800. |
<> | 144:ef7eb2e8f9f7 | 186 | */ |
<> | 144:ef7eb2e8f9f7 | 187 | br += (256 * remainder) / divisor; |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | return br; |
<> | 144:ef7eb2e8f9f7 | 190 | } |
<> | 144:ef7eb2e8f9f7 | 191 | |
<> | 144:ef7eb2e8f9f7 | 192 | |
<> | 144:ef7eb2e8f9f7 | 193 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 194 | * @brief |
<> | 144:ef7eb2e8f9f7 | 195 | * Get current baudrate for LEUART. |
<> | 144:ef7eb2e8f9f7 | 196 | * |
<> | 144:ef7eb2e8f9f7 | 197 | * @details |
<> | 144:ef7eb2e8f9f7 | 198 | * This function returns the actual baudrate (not considering oscillator |
<> | 144:ef7eb2e8f9f7 | 199 | * inaccuracies) used by a LEUART peripheral. |
<> | 144:ef7eb2e8f9f7 | 200 | * |
<> | 144:ef7eb2e8f9f7 | 201 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 202 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 203 | * |
<> | 144:ef7eb2e8f9f7 | 204 | * @return |
<> | 144:ef7eb2e8f9f7 | 205 | * Current baudrate. |
<> | 144:ef7eb2e8f9f7 | 206 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 207 | uint32_t LEUART_BaudrateGet(LEUART_TypeDef *leuart) |
<> | 144:ef7eb2e8f9f7 | 208 | { |
<> | 144:ef7eb2e8f9f7 | 209 | uint32_t freq; |
<> | 144:ef7eb2e8f9f7 | 210 | CMU_Clock_TypeDef clock; |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | /* Get current frequency */ |
<> | 144:ef7eb2e8f9f7 | 213 | if (leuart == LEUART0) |
<> | 144:ef7eb2e8f9f7 | 214 | { |
<> | 144:ef7eb2e8f9f7 | 215 | clock = cmuClock_LEUART0; |
<> | 144:ef7eb2e8f9f7 | 216 | } |
<> | 144:ef7eb2e8f9f7 | 217 | #if (LEUART_COUNT > 1) |
<> | 144:ef7eb2e8f9f7 | 218 | else if (leuart == LEUART1) |
<> | 144:ef7eb2e8f9f7 | 219 | { |
<> | 144:ef7eb2e8f9f7 | 220 | clock = cmuClock_LEUART1; |
<> | 144:ef7eb2e8f9f7 | 221 | } |
<> | 144:ef7eb2e8f9f7 | 222 | #endif |
<> | 144:ef7eb2e8f9f7 | 223 | else |
<> | 144:ef7eb2e8f9f7 | 224 | { |
<> | 144:ef7eb2e8f9f7 | 225 | EFM_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 226 | return 0; |
<> | 144:ef7eb2e8f9f7 | 227 | } |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | freq = CMU_ClockFreqGet(clock); |
<> | 144:ef7eb2e8f9f7 | 230 | |
<> | 144:ef7eb2e8f9f7 | 231 | return LEUART_BaudrateCalc(freq, leuart->CLKDIV); |
<> | 144:ef7eb2e8f9f7 | 232 | } |
<> | 144:ef7eb2e8f9f7 | 233 | |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 236 | * @brief |
<> | 144:ef7eb2e8f9f7 | 237 | * Configure baudrate (or as close as possible to specified baudrate). |
<> | 144:ef7eb2e8f9f7 | 238 | * |
<> | 144:ef7eb2e8f9f7 | 239 | * @note |
<> | 144:ef7eb2e8f9f7 | 240 | * The setting of a baudrate requires synchronization into the |
<> | 144:ef7eb2e8f9f7 | 241 | * low frequency domain. If the same register is modified before a previous |
<> | 144:ef7eb2e8f9f7 | 242 | * update has completed, this function will stall until the previous |
<> | 144:ef7eb2e8f9f7 | 243 | * synchronization has completed. |
<> | 144:ef7eb2e8f9f7 | 244 | * |
<> | 144:ef7eb2e8f9f7 | 245 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 246 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 247 | * |
<> | 144:ef7eb2e8f9f7 | 248 | * @param[in] refFreq |
<> | 144:ef7eb2e8f9f7 | 249 | * LEUART reference clock frequency in Hz that will be used. If set to 0, |
<> | 144:ef7eb2e8f9f7 | 250 | * the currently configured reference clock is assumed. |
<> | 144:ef7eb2e8f9f7 | 251 | * |
<> | 144:ef7eb2e8f9f7 | 252 | * @param[in] baudrate |
<> | 144:ef7eb2e8f9f7 | 253 | * Baudrate to try to achieve for LEUART. |
<> | 144:ef7eb2e8f9f7 | 254 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 255 | void LEUART_BaudrateSet(LEUART_TypeDef *leuart, |
<> | 144:ef7eb2e8f9f7 | 256 | uint32_t refFreq, |
<> | 144:ef7eb2e8f9f7 | 257 | uint32_t baudrate) |
<> | 144:ef7eb2e8f9f7 | 258 | { |
<> | 144:ef7eb2e8f9f7 | 259 | uint32_t clkdiv; |
<> | 144:ef7eb2e8f9f7 | 260 | CMU_Clock_TypeDef clock; |
<> | 144:ef7eb2e8f9f7 | 261 | |
<> | 144:ef7eb2e8f9f7 | 262 | /* Inhibit divide by 0 */ |
<> | 144:ef7eb2e8f9f7 | 263 | EFM_ASSERT(baudrate); |
<> | 144:ef7eb2e8f9f7 | 264 | |
<> | 144:ef7eb2e8f9f7 | 265 | /* |
<> | 144:ef7eb2e8f9f7 | 266 | * We want to use integer division to avoid forcing in float division |
<> | 144:ef7eb2e8f9f7 | 267 | * utils, and yet keep rounding effect errors to a minimum. |
<> | 144:ef7eb2e8f9f7 | 268 | * |
<> | 144:ef7eb2e8f9f7 | 269 | * CLKDIV in asynchronous mode is given by: |
<> | 144:ef7eb2e8f9f7 | 270 | * |
<> | 144:ef7eb2e8f9f7 | 271 | * CLKDIV = 256*(fLEUARTn/br - 1) = ((256*fLEUARTn)/br) - 256 |
<> | 144:ef7eb2e8f9f7 | 272 | * |
<> | 144:ef7eb2e8f9f7 | 273 | * Normally, with fLEUARTn appr 32768Hz, there is no problem with overflow |
<> | 144:ef7eb2e8f9f7 | 274 | * if using 32 bit arithmetic. However, since fLEUARTn may be derived from |
<> | 144:ef7eb2e8f9f7 | 275 | * HFCORECLK as well, we must consider overflow when using integer arithmetic. |
<> | 144:ef7eb2e8f9f7 | 276 | * |
<> | 144:ef7eb2e8f9f7 | 277 | * The basic problem with integer division in the above formula is that |
<> | 144:ef7eb2e8f9f7 | 278 | * the dividend (256 * fLEUARTn) may become higher than max 32 bit |
<> | 144:ef7eb2e8f9f7 | 279 | * integer. Yet, we want to evaluate dividend first before dividing in |
<> | 144:ef7eb2e8f9f7 | 280 | * order to get as small rounding effects as possible. We do not want |
<> | 144:ef7eb2e8f9f7 | 281 | * to make too harsh restrictions on max fLEUARTn value either. |
<> | 144:ef7eb2e8f9f7 | 282 | * |
<> | 144:ef7eb2e8f9f7 | 283 | * Since the last 3 bits of CLKDIV are don't care, we can base our |
<> | 144:ef7eb2e8f9f7 | 284 | * integer arithmetic on the below formula |
<> | 144:ef7eb2e8f9f7 | 285 | * |
<> | 144:ef7eb2e8f9f7 | 286 | * CLKDIV/8 = ((32*fLEUARTn)/br) - 32 |
<> | 144:ef7eb2e8f9f7 | 287 | * |
<> | 144:ef7eb2e8f9f7 | 288 | * and calculate 1/8 of CLKDIV first. This allows for fLEUARTn |
<> | 144:ef7eb2e8f9f7 | 289 | * up to 128MHz without overflowing a 32 bit value! |
<> | 144:ef7eb2e8f9f7 | 290 | */ |
<> | 144:ef7eb2e8f9f7 | 291 | |
<> | 144:ef7eb2e8f9f7 | 292 | /* Get current frequency? */ |
<> | 144:ef7eb2e8f9f7 | 293 | if (!refFreq) |
<> | 144:ef7eb2e8f9f7 | 294 | { |
<> | 144:ef7eb2e8f9f7 | 295 | if (leuart == LEUART0) |
<> | 144:ef7eb2e8f9f7 | 296 | { |
<> | 144:ef7eb2e8f9f7 | 297 | clock = cmuClock_LEUART0; |
<> | 144:ef7eb2e8f9f7 | 298 | } |
<> | 144:ef7eb2e8f9f7 | 299 | #if (LEUART_COUNT > 1) |
<> | 144:ef7eb2e8f9f7 | 300 | else if (leuart == LEUART1) |
<> | 144:ef7eb2e8f9f7 | 301 | { |
<> | 144:ef7eb2e8f9f7 | 302 | clock = cmuClock_LEUART1; |
<> | 144:ef7eb2e8f9f7 | 303 | } |
<> | 144:ef7eb2e8f9f7 | 304 | #endif |
<> | 144:ef7eb2e8f9f7 | 305 | else |
<> | 144:ef7eb2e8f9f7 | 306 | { |
<> | 144:ef7eb2e8f9f7 | 307 | EFM_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 308 | return; |
<> | 144:ef7eb2e8f9f7 | 309 | } |
<> | 144:ef7eb2e8f9f7 | 310 | |
<> | 144:ef7eb2e8f9f7 | 311 | refFreq = CMU_ClockFreqGet(clock); |
<> | 144:ef7eb2e8f9f7 | 312 | } |
<> | 144:ef7eb2e8f9f7 | 313 | |
<> | 144:ef7eb2e8f9f7 | 314 | /* Calculate and set CLKDIV with fractional bits */ |
<> | 144:ef7eb2e8f9f7 | 315 | clkdiv = (32 * refFreq) / baudrate; |
<> | 144:ef7eb2e8f9f7 | 316 | clkdiv -= 32; |
<> | 144:ef7eb2e8f9f7 | 317 | clkdiv *= 8; |
<> | 144:ef7eb2e8f9f7 | 318 | |
<> | 144:ef7eb2e8f9f7 | 319 | /* Verify that resulting clock divider is within limits */ |
<> | 144:ef7eb2e8f9f7 | 320 | EFM_ASSERT(clkdiv <= _LEUART_CLKDIV_MASK); |
<> | 144:ef7eb2e8f9f7 | 321 | |
<> | 144:ef7eb2e8f9f7 | 322 | /* If EFM_ASSERT is not enabled, make sure we don't write to reserved bits */ |
<> | 144:ef7eb2e8f9f7 | 323 | clkdiv &= _LEUART_CLKDIV_MASK; |
<> | 144:ef7eb2e8f9f7 | 324 | |
<> | 144:ef7eb2e8f9f7 | 325 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 326 | LEUART_Sync(leuart, LEUART_SYNCBUSY_CLKDIV); |
<> | 144:ef7eb2e8f9f7 | 327 | |
<> | 144:ef7eb2e8f9f7 | 328 | leuart->CLKDIV = clkdiv; |
<> | 144:ef7eb2e8f9f7 | 329 | } |
<> | 144:ef7eb2e8f9f7 | 330 | |
<> | 144:ef7eb2e8f9f7 | 331 | |
<> | 144:ef7eb2e8f9f7 | 332 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 333 | * @brief |
<> | 144:ef7eb2e8f9f7 | 334 | * Enable/disable LEUART receiver and/or transmitter. |
<> | 144:ef7eb2e8f9f7 | 335 | * |
<> | 144:ef7eb2e8f9f7 | 336 | * @details |
<> | 144:ef7eb2e8f9f7 | 337 | * Notice that this function does not do any configuration. Enabling should |
<> | 144:ef7eb2e8f9f7 | 338 | * normally be done after initialization is done (if not enabled as part |
<> | 144:ef7eb2e8f9f7 | 339 | * of init). |
<> | 144:ef7eb2e8f9f7 | 340 | * |
<> | 144:ef7eb2e8f9f7 | 341 | * @note |
<> | 144:ef7eb2e8f9f7 | 342 | * Enabling/disabling requires synchronization into the low frequency domain. |
<> | 144:ef7eb2e8f9f7 | 343 | * If the same register is modified before a previous update has completed, |
<> | 144:ef7eb2e8f9f7 | 344 | * this function will stall until the previous synchronization has completed. |
<> | 144:ef7eb2e8f9f7 | 345 | * |
<> | 144:ef7eb2e8f9f7 | 346 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 347 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 348 | * |
<> | 144:ef7eb2e8f9f7 | 349 | * @param[in] enable |
<> | 144:ef7eb2e8f9f7 | 350 | * Select status for receiver/transmitter. |
<> | 144:ef7eb2e8f9f7 | 351 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 352 | void LEUART_Enable(LEUART_TypeDef *leuart, LEUART_Enable_TypeDef enable) |
<> | 144:ef7eb2e8f9f7 | 353 | { |
<> | 144:ef7eb2e8f9f7 | 354 | uint32_t tmp; |
<> | 144:ef7eb2e8f9f7 | 355 | |
<> | 144:ef7eb2e8f9f7 | 356 | /* Make sure the module exists on the selected chip */ |
<> | 144:ef7eb2e8f9f7 | 357 | EFM_ASSERT(LEUART_REF_VALID(leuart)); |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | /* Disable as specified */ |
<> | 144:ef7eb2e8f9f7 | 360 | tmp = ~((uint32_t)(enable)); |
<> | 144:ef7eb2e8f9f7 | 361 | tmp &= (_LEUART_CMD_RXEN_MASK | _LEUART_CMD_TXEN_MASK); |
<> | 144:ef7eb2e8f9f7 | 362 | tmp <<= 1; |
<> | 144:ef7eb2e8f9f7 | 363 | /* Enable as specified */ |
<> | 144:ef7eb2e8f9f7 | 364 | tmp |= (uint32_t)(enable); |
<> | 144:ef7eb2e8f9f7 | 365 | |
<> | 144:ef7eb2e8f9f7 | 366 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 367 | LEUART_Sync(leuart, LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 368 | |
<> | 144:ef7eb2e8f9f7 | 369 | leuart->CMD = tmp; |
<> | 144:ef7eb2e8f9f7 | 370 | } |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | |
<> | 144:ef7eb2e8f9f7 | 373 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 374 | * @brief |
<> | 144:ef7eb2e8f9f7 | 375 | * LEUART register synchronization freeze control. |
<> | 144:ef7eb2e8f9f7 | 376 | * |
<> | 144:ef7eb2e8f9f7 | 377 | * @details |
<> | 144:ef7eb2e8f9f7 | 378 | * Some LEUART registers require synchronization into the low frequency (LF) |
<> | 144:ef7eb2e8f9f7 | 379 | * domain. The freeze feature allows for several such registers to be |
<> | 144:ef7eb2e8f9f7 | 380 | * modified before passing them to the LF domain simultaneously (which |
<> | 144:ef7eb2e8f9f7 | 381 | * takes place when the freeze mode is disabled). |
<> | 144:ef7eb2e8f9f7 | 382 | * |
<> | 144:ef7eb2e8f9f7 | 383 | * @note |
<> | 144:ef7eb2e8f9f7 | 384 | * When enabling freeze mode, this function will wait for all current |
<> | 144:ef7eb2e8f9f7 | 385 | * ongoing LEUART synchronization to LF domain to complete (Normally |
<> | 144:ef7eb2e8f9f7 | 386 | * synchronization will not be in progress.) However for this reason, when |
<> | 144:ef7eb2e8f9f7 | 387 | * using freeze mode, modifications of registers requiring LF synchronization |
<> | 144:ef7eb2e8f9f7 | 388 | * should be done within one freeze enable/disable block to avoid unecessary |
<> | 144:ef7eb2e8f9f7 | 389 | * stalling. |
<> | 144:ef7eb2e8f9f7 | 390 | * |
<> | 144:ef7eb2e8f9f7 | 391 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 392 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 393 | * |
<> | 144:ef7eb2e8f9f7 | 394 | * @param[in] enable |
<> | 144:ef7eb2e8f9f7 | 395 | * @li true - enable freeze, modified registers are not propagated to the |
<> | 144:ef7eb2e8f9f7 | 396 | * LF domain |
<> | 144:ef7eb2e8f9f7 | 397 | * @li false - disables freeze, modified registers are propagated to LF |
<> | 144:ef7eb2e8f9f7 | 398 | * domain |
<> | 144:ef7eb2e8f9f7 | 399 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 400 | void LEUART_FreezeEnable(LEUART_TypeDef *leuart, bool enable) |
<> | 144:ef7eb2e8f9f7 | 401 | { |
<> | 144:ef7eb2e8f9f7 | 402 | if (enable) |
<> | 144:ef7eb2e8f9f7 | 403 | { |
<> | 144:ef7eb2e8f9f7 | 404 | /* |
<> | 144:ef7eb2e8f9f7 | 405 | * Wait for any ongoing LF synchronization to complete. This is just to |
<> | 144:ef7eb2e8f9f7 | 406 | * protect against the rare case when a user |
<> | 144:ef7eb2e8f9f7 | 407 | * - modifies a register requiring LF sync |
<> | 144:ef7eb2e8f9f7 | 408 | * - then enables freeze before LF sync completed |
<> | 144:ef7eb2e8f9f7 | 409 | * - then modifies the same register again |
<> | 144:ef7eb2e8f9f7 | 410 | * since modifying a register while it is in sync progress should be |
<> | 144:ef7eb2e8f9f7 | 411 | * avoided. |
<> | 144:ef7eb2e8f9f7 | 412 | */ |
<> | 144:ef7eb2e8f9f7 | 413 | while (leuart->SYNCBUSY) |
<> | 144:ef7eb2e8f9f7 | 414 | ; |
<> | 144:ef7eb2e8f9f7 | 415 | |
<> | 144:ef7eb2e8f9f7 | 416 | leuart->FREEZE = LEUART_FREEZE_REGFREEZE; |
<> | 144:ef7eb2e8f9f7 | 417 | } |
<> | 144:ef7eb2e8f9f7 | 418 | else |
<> | 144:ef7eb2e8f9f7 | 419 | { |
<> | 144:ef7eb2e8f9f7 | 420 | leuart->FREEZE = 0; |
<> | 144:ef7eb2e8f9f7 | 421 | } |
<> | 144:ef7eb2e8f9f7 | 422 | } |
<> | 144:ef7eb2e8f9f7 | 423 | |
<> | 144:ef7eb2e8f9f7 | 424 | |
<> | 144:ef7eb2e8f9f7 | 425 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 426 | * @brief |
<> | 144:ef7eb2e8f9f7 | 427 | * Init LEUART. |
<> | 144:ef7eb2e8f9f7 | 428 | * |
<> | 144:ef7eb2e8f9f7 | 429 | * @details |
<> | 144:ef7eb2e8f9f7 | 430 | * This function will configure basic settings in order to operate in normal |
<> | 144:ef7eb2e8f9f7 | 431 | * asynchronous mode. Consider using LEUART_Reset() prior to this function if |
<> | 144:ef7eb2e8f9f7 | 432 | * state of configuration is not known, since only configuration settings |
<> | 144:ef7eb2e8f9f7 | 433 | * specified by @p init are set. |
<> | 144:ef7eb2e8f9f7 | 434 | * |
<> | 144:ef7eb2e8f9f7 | 435 | * Special control setup not covered by this function may be done either |
<> | 144:ef7eb2e8f9f7 | 436 | * before or after using this function (but normally before enabling) |
<> | 144:ef7eb2e8f9f7 | 437 | * by direct modification of the CTRL register. |
<> | 144:ef7eb2e8f9f7 | 438 | * |
<> | 144:ef7eb2e8f9f7 | 439 | * Notice that pins used by the LEUART module must be properly configured |
<> | 144:ef7eb2e8f9f7 | 440 | * by the user explicitly, in order for the LEUART to work as intended. |
<> | 144:ef7eb2e8f9f7 | 441 | * (When configuring pins, one should remember to consider the sequence of |
<> | 144:ef7eb2e8f9f7 | 442 | * configuration, in order to avoid unintended pulses/glitches on output |
<> | 144:ef7eb2e8f9f7 | 443 | * pins.) |
<> | 144:ef7eb2e8f9f7 | 444 | * |
<> | 144:ef7eb2e8f9f7 | 445 | * @note |
<> | 144:ef7eb2e8f9f7 | 446 | * Initializing requires synchronization into the low frequency domain. |
<> | 144:ef7eb2e8f9f7 | 447 | * If the same register is modified before a previous update has completed, |
<> | 144:ef7eb2e8f9f7 | 448 | * this function will stall until the previous synchronization has completed. |
<> | 144:ef7eb2e8f9f7 | 449 | * |
<> | 144:ef7eb2e8f9f7 | 450 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 451 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 452 | * |
<> | 144:ef7eb2e8f9f7 | 453 | * @param[in] init |
<> | 144:ef7eb2e8f9f7 | 454 | * Pointer to initialization structure used to configure basic async setup. |
<> | 144:ef7eb2e8f9f7 | 455 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 456 | void LEUART_Init(LEUART_TypeDef *leuart, LEUART_Init_TypeDef const *init) |
<> | 144:ef7eb2e8f9f7 | 457 | { |
<> | 144:ef7eb2e8f9f7 | 458 | /* Make sure the module exists on the selected chip */ |
<> | 144:ef7eb2e8f9f7 | 459 | EFM_ASSERT(LEUART_REF_VALID(leuart)); |
<> | 144:ef7eb2e8f9f7 | 460 | |
<> | 144:ef7eb2e8f9f7 | 461 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 462 | LEUART_Sync(leuart, LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 463 | |
<> | 144:ef7eb2e8f9f7 | 464 | /* Ensure disabled while doing config */ |
<> | 144:ef7eb2e8f9f7 | 465 | leuart->CMD = LEUART_CMD_RXDIS | LEUART_CMD_TXDIS; |
<> | 144:ef7eb2e8f9f7 | 466 | |
<> | 144:ef7eb2e8f9f7 | 467 | /* Freeze registers to avoid stalling for LF synchronization */ |
<> | 144:ef7eb2e8f9f7 | 468 | LEUART_FreezeEnable(leuart, true); |
<> | 144:ef7eb2e8f9f7 | 469 | |
<> | 144:ef7eb2e8f9f7 | 470 | /* Configure databits and stopbits */ |
<> | 144:ef7eb2e8f9f7 | 471 | leuart->CTRL = (leuart->CTRL & ~(_LEUART_CTRL_PARITY_MASK |
<> | 144:ef7eb2e8f9f7 | 472 | | _LEUART_CTRL_STOPBITS_MASK)) |
<> | 144:ef7eb2e8f9f7 | 473 | | (uint32_t)(init->databits) |
<> | 144:ef7eb2e8f9f7 | 474 | | (uint32_t)(init->parity) |
<> | 144:ef7eb2e8f9f7 | 475 | | (uint32_t)(init->stopbits); |
<> | 144:ef7eb2e8f9f7 | 476 | |
<> | 144:ef7eb2e8f9f7 | 477 | /* Configure baudrate */ |
<> | 144:ef7eb2e8f9f7 | 478 | LEUART_BaudrateSet(leuart, init->refFreq, init->baudrate); |
<> | 144:ef7eb2e8f9f7 | 479 | |
<> | 144:ef7eb2e8f9f7 | 480 | /* Finally enable (as specified) */ |
<> | 144:ef7eb2e8f9f7 | 481 | leuart->CMD = (uint32_t)init->enable; |
<> | 144:ef7eb2e8f9f7 | 482 | |
<> | 144:ef7eb2e8f9f7 | 483 | /* Unfreeze registers, pass new settings on to LEUART */ |
<> | 144:ef7eb2e8f9f7 | 484 | LEUART_FreezeEnable(leuart, false); |
<> | 144:ef7eb2e8f9f7 | 485 | } |
<> | 144:ef7eb2e8f9f7 | 486 | |
<> | 144:ef7eb2e8f9f7 | 487 | |
<> | 144:ef7eb2e8f9f7 | 488 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 489 | * @brief |
<> | 144:ef7eb2e8f9f7 | 490 | * Reset LEUART to same state as after a HW reset. |
<> | 144:ef7eb2e8f9f7 | 491 | * |
<> | 144:ef7eb2e8f9f7 | 492 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 493 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 494 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 495 | void LEUART_Reset(LEUART_TypeDef *leuart) |
<> | 144:ef7eb2e8f9f7 | 496 | { |
<> | 144:ef7eb2e8f9f7 | 497 | /* Make sure the module exists on the selected chip */ |
<> | 144:ef7eb2e8f9f7 | 498 | EFM_ASSERT(LEUART_REF_VALID(leuart)); |
<> | 144:ef7eb2e8f9f7 | 499 | |
<> | 144:ef7eb2e8f9f7 | 500 | /* Freeze registers to avoid stalling for LF synchronization */ |
<> | 144:ef7eb2e8f9f7 | 501 | LEUART_FreezeEnable(leuart, true); |
<> | 144:ef7eb2e8f9f7 | 502 | |
<> | 144:ef7eb2e8f9f7 | 503 | /* Make sure disabled first, before resetting other registers */ |
<> | 144:ef7eb2e8f9f7 | 504 | leuart->CMD = LEUART_CMD_RXDIS | LEUART_CMD_TXDIS | LEUART_CMD_RXBLOCKDIS |
<> | 144:ef7eb2e8f9f7 | 505 | | LEUART_CMD_CLEARTX | LEUART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 506 | leuart->CTRL = _LEUART_CTRL_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 507 | leuart->CLKDIV = _LEUART_CLKDIV_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 508 | leuart->STARTFRAME = _LEUART_STARTFRAME_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 509 | leuart->SIGFRAME = _LEUART_SIGFRAME_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 510 | leuart->IEN = _LEUART_IEN_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 511 | leuart->IFC = _LEUART_IFC_MASK; |
<> | 144:ef7eb2e8f9f7 | 512 | leuart->PULSECTRL = _LEUART_PULSECTRL_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 513 | #if defined(_LEUART_ROUTEPEN_MASK) |
<> | 144:ef7eb2e8f9f7 | 514 | leuart->ROUTEPEN = _LEUART_ROUTEPEN_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 515 | leuart->ROUTELOC0 = _LEUART_ROUTELOC0_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 516 | #else |
<> | 144:ef7eb2e8f9f7 | 517 | leuart->ROUTE = _LEUART_ROUTE_RESETVALUE; |
<> | 144:ef7eb2e8f9f7 | 518 | #endif |
<> | 144:ef7eb2e8f9f7 | 519 | |
<> | 144:ef7eb2e8f9f7 | 520 | /* Unfreeze registers, pass new settings on to LEUART */ |
<> | 144:ef7eb2e8f9f7 | 521 | LEUART_FreezeEnable(leuart, false); |
<> | 144:ef7eb2e8f9f7 | 522 | } |
<> | 144:ef7eb2e8f9f7 | 523 | |
<> | 144:ef7eb2e8f9f7 | 524 | |
<> | 144:ef7eb2e8f9f7 | 525 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 526 | * @brief |
<> | 144:ef7eb2e8f9f7 | 527 | * Receive one 8 bit frame, (or part of 9 bit frame). |
<> | 144:ef7eb2e8f9f7 | 528 | * |
<> | 144:ef7eb2e8f9f7 | 529 | * @details |
<> | 144:ef7eb2e8f9f7 | 530 | * This function is normally used to receive one frame when operating with |
<> | 144:ef7eb2e8f9f7 | 531 | * frame length 8 bits. Please refer to LEUART_RxExt() for reception of |
<> | 144:ef7eb2e8f9f7 | 532 | * 9 bit frames. |
<> | 144:ef7eb2e8f9f7 | 533 | * |
<> | 144:ef7eb2e8f9f7 | 534 | * Notice that possible parity/stop bits are not considered part of specified |
<> | 144:ef7eb2e8f9f7 | 535 | * frame bit length. |
<> | 144:ef7eb2e8f9f7 | 536 | * |
<> | 144:ef7eb2e8f9f7 | 537 | * @note |
<> | 144:ef7eb2e8f9f7 | 538 | * This function will stall if buffer is empty, until data is received. |
<> | 144:ef7eb2e8f9f7 | 539 | * |
<> | 144:ef7eb2e8f9f7 | 540 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 541 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 542 | * |
<> | 144:ef7eb2e8f9f7 | 543 | * @return |
<> | 144:ef7eb2e8f9f7 | 544 | * Data received. |
<> | 144:ef7eb2e8f9f7 | 545 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 546 | uint8_t LEUART_Rx(LEUART_TypeDef *leuart) |
<> | 144:ef7eb2e8f9f7 | 547 | { |
<> | 144:ef7eb2e8f9f7 | 548 | while (!(leuart->STATUS & LEUART_STATUS_RXDATAV)) |
<> | 144:ef7eb2e8f9f7 | 549 | ; |
<> | 144:ef7eb2e8f9f7 | 550 | |
<> | 144:ef7eb2e8f9f7 | 551 | return (uint8_t)leuart->RXDATA; |
<> | 144:ef7eb2e8f9f7 | 552 | } |
<> | 144:ef7eb2e8f9f7 | 553 | |
<> | 144:ef7eb2e8f9f7 | 554 | |
<> | 144:ef7eb2e8f9f7 | 555 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 556 | * @brief |
<> | 144:ef7eb2e8f9f7 | 557 | * Receive one 8-9 bit frame, with extended information. |
<> | 144:ef7eb2e8f9f7 | 558 | * |
<> | 144:ef7eb2e8f9f7 | 559 | * @details |
<> | 144:ef7eb2e8f9f7 | 560 | * This function is normally used to receive one frame and additional RX |
<> | 144:ef7eb2e8f9f7 | 561 | * status information is required. |
<> | 144:ef7eb2e8f9f7 | 562 | * |
<> | 144:ef7eb2e8f9f7 | 563 | * @note |
<> | 144:ef7eb2e8f9f7 | 564 | * This function will stall if buffer is empty, until data is received. |
<> | 144:ef7eb2e8f9f7 | 565 | * |
<> | 144:ef7eb2e8f9f7 | 566 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 567 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 568 | * |
<> | 144:ef7eb2e8f9f7 | 569 | * @return |
<> | 144:ef7eb2e8f9f7 | 570 | * Data received. |
<> | 144:ef7eb2e8f9f7 | 571 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 572 | uint16_t LEUART_RxExt(LEUART_TypeDef *leuart) |
<> | 144:ef7eb2e8f9f7 | 573 | { |
<> | 144:ef7eb2e8f9f7 | 574 | while (!(leuart->STATUS & LEUART_STATUS_RXDATAV)) |
<> | 144:ef7eb2e8f9f7 | 575 | ; |
<> | 144:ef7eb2e8f9f7 | 576 | |
<> | 144:ef7eb2e8f9f7 | 577 | return (uint16_t)leuart->RXDATAX; |
<> | 144:ef7eb2e8f9f7 | 578 | } |
<> | 144:ef7eb2e8f9f7 | 579 | |
<> | 144:ef7eb2e8f9f7 | 580 | |
<> | 144:ef7eb2e8f9f7 | 581 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 582 | * @brief |
<> | 144:ef7eb2e8f9f7 | 583 | * Transmit one frame. |
<> | 144:ef7eb2e8f9f7 | 584 | * |
<> | 144:ef7eb2e8f9f7 | 585 | * @details |
<> | 144:ef7eb2e8f9f7 | 586 | * Depending on frame length configuration, 8 (least significant) bits from |
<> | 144:ef7eb2e8f9f7 | 587 | * @p data are transmitted. If frame length is 9, 8 bits are transmitted from |
<> | 144:ef7eb2e8f9f7 | 588 | * @p data and one bit as specified by CTRL register, BIT8DV field. Please |
<> | 144:ef7eb2e8f9f7 | 589 | * refer to LEUART_TxExt() for transmitting 9 bit frame with full control of |
<> | 144:ef7eb2e8f9f7 | 590 | * all 9 bits. |
<> | 144:ef7eb2e8f9f7 | 591 | * |
<> | 144:ef7eb2e8f9f7 | 592 | * Notice that possible parity/stop bits in asynchronous mode are not |
<> | 144:ef7eb2e8f9f7 | 593 | * considered part of specified frame bit length. |
<> | 144:ef7eb2e8f9f7 | 594 | * |
<> | 144:ef7eb2e8f9f7 | 595 | * @note |
<> | 144:ef7eb2e8f9f7 | 596 | * This function will stall if buffer is full, until buffer becomes available. |
<> | 144:ef7eb2e8f9f7 | 597 | * |
<> | 144:ef7eb2e8f9f7 | 598 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 599 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 600 | * |
<> | 144:ef7eb2e8f9f7 | 601 | * @param[in] data |
<> | 144:ef7eb2e8f9f7 | 602 | * Data to transmit. See details above for further info. |
<> | 144:ef7eb2e8f9f7 | 603 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 604 | void LEUART_Tx(LEUART_TypeDef *leuart, uint8_t data) |
<> | 144:ef7eb2e8f9f7 | 605 | { |
<> | 144:ef7eb2e8f9f7 | 606 | /* Check that transmit buffer is empty */ |
<> | 144:ef7eb2e8f9f7 | 607 | while (!(leuart->STATUS & LEUART_STATUS_TXBL)) |
<> | 144:ef7eb2e8f9f7 | 608 | ; |
<> | 144:ef7eb2e8f9f7 | 609 | |
<> | 144:ef7eb2e8f9f7 | 610 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 611 | LEUART_Sync(leuart, LEUART_SYNCBUSY_TXDATA); |
<> | 144:ef7eb2e8f9f7 | 612 | |
<> | 144:ef7eb2e8f9f7 | 613 | leuart->TXDATA = (uint32_t)data; |
<> | 144:ef7eb2e8f9f7 | 614 | } |
<> | 144:ef7eb2e8f9f7 | 615 | |
<> | 144:ef7eb2e8f9f7 | 616 | |
<> | 144:ef7eb2e8f9f7 | 617 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 618 | * @brief |
<> | 144:ef7eb2e8f9f7 | 619 | * Transmit one 8-9 bit frame with extended control. |
<> | 144:ef7eb2e8f9f7 | 620 | * |
<> | 144:ef7eb2e8f9f7 | 621 | * @details |
<> | 144:ef7eb2e8f9f7 | 622 | * Notice that possible parity/stop bits in asynchronous mode are not |
<> | 144:ef7eb2e8f9f7 | 623 | * considered part of specified frame bit length. |
<> | 144:ef7eb2e8f9f7 | 624 | * |
<> | 144:ef7eb2e8f9f7 | 625 | * @note |
<> | 144:ef7eb2e8f9f7 | 626 | * This function will stall if buffer is full, until buffer becomes available. |
<> | 144:ef7eb2e8f9f7 | 627 | * |
<> | 144:ef7eb2e8f9f7 | 628 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 629 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 630 | * |
<> | 144:ef7eb2e8f9f7 | 631 | * @param[in] data |
<> | 144:ef7eb2e8f9f7 | 632 | * Data to transmit with extended control. Least significant bits contains |
<> | 144:ef7eb2e8f9f7 | 633 | * frame bits, and additional control bits are available as documented in |
<> | 144:ef7eb2e8f9f7 | 634 | * the reference manual (set to 0 if not used). |
<> | 144:ef7eb2e8f9f7 | 635 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 636 | void LEUART_TxExt(LEUART_TypeDef *leuart, uint16_t data) |
<> | 144:ef7eb2e8f9f7 | 637 | { |
<> | 144:ef7eb2e8f9f7 | 638 | /* Check that transmit buffer is empty */ |
<> | 144:ef7eb2e8f9f7 | 639 | while (!(leuart->STATUS & LEUART_STATUS_TXBL)) |
<> | 144:ef7eb2e8f9f7 | 640 | ; |
<> | 144:ef7eb2e8f9f7 | 641 | |
<> | 144:ef7eb2e8f9f7 | 642 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 643 | LEUART_Sync(leuart, LEUART_SYNCBUSY_TXDATAX); |
<> | 144:ef7eb2e8f9f7 | 644 | |
<> | 144:ef7eb2e8f9f7 | 645 | leuart->TXDATAX = (uint32_t)data; |
<> | 144:ef7eb2e8f9f7 | 646 | } |
<> | 144:ef7eb2e8f9f7 | 647 | |
<> | 144:ef7eb2e8f9f7 | 648 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 649 | * @brief |
<> | 144:ef7eb2e8f9f7 | 650 | * Enables handling of LEUART TX by DMA in EM2 |
<> | 144:ef7eb2e8f9f7 | 651 | * |
<> | 144:ef7eb2e8f9f7 | 652 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 653 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 654 | * |
<> | 144:ef7eb2e8f9f7 | 655 | * @param[in] enable |
<> | 144:ef7eb2e8f9f7 | 656 | * true - enables functionality |
<> | 144:ef7eb2e8f9f7 | 657 | * false - disables functionality |
<> | 144:ef7eb2e8f9f7 | 658 | * |
<> | 144:ef7eb2e8f9f7 | 659 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 660 | void LEUART_TxDmaInEM2Enable(LEUART_TypeDef *leuart, bool enable) |
<> | 144:ef7eb2e8f9f7 | 661 | { |
<> | 144:ef7eb2e8f9f7 | 662 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 663 | LEUART_Sync(leuart, LEUART_SYNCBUSY_CTRL); |
<> | 144:ef7eb2e8f9f7 | 664 | |
<> | 144:ef7eb2e8f9f7 | 665 | if (enable) |
<> | 144:ef7eb2e8f9f7 | 666 | { |
<> | 144:ef7eb2e8f9f7 | 667 | leuart->CTRL |= LEUART_CTRL_TXDMAWU; |
<> | 144:ef7eb2e8f9f7 | 668 | } |
<> | 144:ef7eb2e8f9f7 | 669 | else |
<> | 144:ef7eb2e8f9f7 | 670 | { |
<> | 144:ef7eb2e8f9f7 | 671 | leuart->CTRL &= ~LEUART_CTRL_TXDMAWU; |
<> | 144:ef7eb2e8f9f7 | 672 | } |
<> | 144:ef7eb2e8f9f7 | 673 | } |
<> | 144:ef7eb2e8f9f7 | 674 | |
<> | 144:ef7eb2e8f9f7 | 675 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 676 | * @brief |
<> | 144:ef7eb2e8f9f7 | 677 | * Enables handling of LEUART RX by DMA in EM2 |
<> | 144:ef7eb2e8f9f7 | 678 | * |
<> | 144:ef7eb2e8f9f7 | 679 | * @param[in] leuart |
<> | 144:ef7eb2e8f9f7 | 680 | * Pointer to LEUART peripheral register block. |
<> | 144:ef7eb2e8f9f7 | 681 | * |
<> | 144:ef7eb2e8f9f7 | 682 | * @param[in] enable |
<> | 144:ef7eb2e8f9f7 | 683 | * true - enables functionality |
<> | 144:ef7eb2e8f9f7 | 684 | * false - disables functionality |
<> | 144:ef7eb2e8f9f7 | 685 | * |
<> | 144:ef7eb2e8f9f7 | 686 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 687 | void LEUART_RxDmaInEM2Enable(LEUART_TypeDef *leuart, bool enable) |
<> | 144:ef7eb2e8f9f7 | 688 | { |
<> | 144:ef7eb2e8f9f7 | 689 | /* LF register about to be modified require sync. busy check */ |
<> | 144:ef7eb2e8f9f7 | 690 | LEUART_Sync(leuart, LEUART_SYNCBUSY_CTRL); |
<> | 144:ef7eb2e8f9f7 | 691 | |
<> | 144:ef7eb2e8f9f7 | 692 | if (enable) |
<> | 144:ef7eb2e8f9f7 | 693 | { |
<> | 144:ef7eb2e8f9f7 | 694 | leuart->CTRL |= LEUART_CTRL_RXDMAWU; |
<> | 144:ef7eb2e8f9f7 | 695 | } |
<> | 144:ef7eb2e8f9f7 | 696 | else |
<> | 144:ef7eb2e8f9f7 | 697 | { |
<> | 144:ef7eb2e8f9f7 | 698 | leuart->CTRL &= ~LEUART_CTRL_RXDMAWU; |
<> | 144:ef7eb2e8f9f7 | 699 | } |
<> | 144:ef7eb2e8f9f7 | 700 | } |
<> | 144:ef7eb2e8f9f7 | 701 | |
<> | 144:ef7eb2e8f9f7 | 702 | |
<> | 144:ef7eb2e8f9f7 | 703 | /** @} (end addtogroup LEUART) */ |
<> | 144:ef7eb2e8f9f7 | 704 | /** @} (end addtogroup EM_Library) */ |
<> | 144:ef7eb2e8f9f7 | 705 | #endif /* defined(LEUART_COUNT) && (LEUART_COUNT > 0) */ |