added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #include "fsl_flexio.h"
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 /*******************************************************************************
<> 144:ef7eb2e8f9f7 34 * Definitions
<> 144:ef7eb2e8f9f7 35 ******************************************************************************/
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /*< @brief user configurable flexio handle count. */
<> 144:ef7eb2e8f9f7 38 #define FLEXIO_HANDLE_COUNT 2
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /*******************************************************************************
<> 144:ef7eb2e8f9f7 41 * Variables
<> 144:ef7eb2e8f9f7 42 ******************************************************************************/
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /*< @brief pointer to array of FLEXIO handle. */
<> 144:ef7eb2e8f9f7 45 static void *s_flexioHandle[FLEXIO_HANDLE_COUNT];
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /*< @brief pointer to array of FLEXIO IP types. */
<> 144:ef7eb2e8f9f7 48 static void *s_flexioType[FLEXIO_HANDLE_COUNT];
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /*< @brief pointer to array of FLEXIO Isr. */
<> 144:ef7eb2e8f9f7 51 static flexio_isr_t s_flexioIsr[FLEXIO_HANDLE_COUNT];
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /*******************************************************************************
<> 144:ef7eb2e8f9f7 54 * Codes
<> 144:ef7eb2e8f9f7 55 ******************************************************************************/
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)
<> 144:ef7eb2e8f9f7 58 {
<> 144:ef7eb2e8f9f7 59 uint32_t ctrlReg = 0;
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 CLOCK_EnableClock(kCLOCK_Flexio0);
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 FLEXIO_Reset(base);
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 ctrlReg = base->CTRL;
<> 144:ef7eb2e8f9f7 66 ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CTRL_FLEXEN_MASK);
<> 144:ef7eb2e8f9f7 67 ctrlReg |= (FLEXIO_CTRL_DOZEN(userConfig->enableInDoze) | FLEXIO_CTRL_DBGE(userConfig->enableInDebug) |
<> 144:ef7eb2e8f9f7 68 FLEXIO_CTRL_FASTACC(userConfig->enableFastAccess) | FLEXIO_CTRL_FLEXEN(userConfig->enableFlexio));
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 base->CTRL = ctrlReg;
<> 144:ef7eb2e8f9f7 71 }
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 void FLEXIO_Deinit(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 74 {
<> 144:ef7eb2e8f9f7 75 FLEXIO_Enable(base, false);
<> 144:ef7eb2e8f9f7 76 CLOCK_DisableClock(kCLOCK_Flexio0);
<> 144:ef7eb2e8f9f7 77 }
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)
<> 144:ef7eb2e8f9f7 80 {
<> 144:ef7eb2e8f9f7 81 assert(userConfig);
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 userConfig->enableFlexio = true;
<> 144:ef7eb2e8f9f7 84 userConfig->enableInDoze = false;
<> 144:ef7eb2e8f9f7 85 userConfig->enableInDebug = true;
<> 144:ef7eb2e8f9f7 86 userConfig->enableFastAccess = false;
<> 144:ef7eb2e8f9f7 87 }
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 void FLEXIO_Reset(FLEXIO_Type *base)
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 /*do software reset, software reset operation affect all other FLEXIO registers except CTRL*/
<> 144:ef7eb2e8f9f7 92 base->CTRL |= FLEXIO_CTRL_SWRST_MASK;
<> 144:ef7eb2e8f9f7 93 base->CTRL = 0;
<> 144:ef7eb2e8f9f7 94 }
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)
<> 144:ef7eb2e8f9f7 97 {
<> 144:ef7eb2e8f9f7 98 assert(index < FLEXIO_SHIFTBUF_COUNT);
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 uint32_t address = 0;
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 switch (type)
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 case kFLEXIO_ShifterBuffer:
<> 144:ef7eb2e8f9f7 105 address = (uint32_t) & (base->SHIFTBUF[index]);
<> 144:ef7eb2e8f9f7 106 break;
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 case kFLEXIO_ShifterBufferBitSwapped:
<> 144:ef7eb2e8f9f7 109 address = (uint32_t) & (base->SHIFTBUFBIS[index]);
<> 144:ef7eb2e8f9f7 110 break;
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 case kFLEXIO_ShifterBufferByteSwapped:
<> 144:ef7eb2e8f9f7 113 address = (uint32_t) & (base->SHIFTBUFBYS[index]);
<> 144:ef7eb2e8f9f7 114 break;
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 case kFLEXIO_ShifterBufferBitByteSwapped:
<> 144:ef7eb2e8f9f7 117 address = (uint32_t) & (base->SHIFTBUFBBS[index]);
<> 144:ef7eb2e8f9f7 118 break;
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP
<> 144:ef7eb2e8f9f7 121 case kFLEXIO_ShifterBufferNibbleByteSwapped:
<> 144:ef7eb2e8f9f7 122 address = (uint32_t) & (base->SHIFTBUFNBS[index]);
<> 144:ef7eb2e8f9f7 123 break;
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 #endif
<> 144:ef7eb2e8f9f7 126 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP
<> 144:ef7eb2e8f9f7 127 case kFLEXIO_ShifterBufferHalfWordSwapped:
<> 144:ef7eb2e8f9f7 128 address = (uint32_t) & (base->SHIFTBUFHWS[index]);
<> 144:ef7eb2e8f9f7 129 break;
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 #endif
<> 144:ef7eb2e8f9f7 132 #if defined(FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP) && FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP
<> 144:ef7eb2e8f9f7 133 case kFLEXIO_ShifterBufferNibbleSwapped:
<> 144:ef7eb2e8f9f7 134 address = (uint32_t) & (base->SHIFTBUFNIS[index]);
<> 144:ef7eb2e8f9f7 135 break;
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 #endif
<> 144:ef7eb2e8f9f7 138 default:
<> 144:ef7eb2e8f9f7 139 break;
<> 144:ef7eb2e8f9f7 140 }
<> 144:ef7eb2e8f9f7 141 return address;
<> 144:ef7eb2e8f9f7 142 }
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)
<> 144:ef7eb2e8f9f7 145 {
<> 144:ef7eb2e8f9f7 146 base->SHIFTCFG[index] = FLEXIO_SHIFTCFG_INSRC(shifterConfig->inputSource)
<> 144:ef7eb2e8f9f7 147 #if FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH
<> 144:ef7eb2e8f9f7 148 | FLEXIO_SHIFTCFG_PWIDTH(shifterConfig->parallelWidth)
<> 144:ef7eb2e8f9f7 149 #endif /* FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH */
<> 144:ef7eb2e8f9f7 150 | FLEXIO_SHIFTCFG_SSTOP(shifterConfig->shifterStop) |
<> 144:ef7eb2e8f9f7 151 FLEXIO_SHIFTCFG_SSTART(shifterConfig->shifterStart);
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 base->SHIFTCTL[index] =
<> 144:ef7eb2e8f9f7 154 FLEXIO_SHIFTCTL_TIMSEL(shifterConfig->timerSelect) | FLEXIO_SHIFTCTL_TIMPOL(shifterConfig->timerPolarity) |
<> 144:ef7eb2e8f9f7 155 FLEXIO_SHIFTCTL_PINCFG(shifterConfig->pinConfig) | FLEXIO_SHIFTCTL_PINSEL(shifterConfig->pinSelect) |
<> 144:ef7eb2e8f9f7 156 FLEXIO_SHIFTCTL_PINPOL(shifterConfig->pinPolarity) | FLEXIO_SHIFTCTL_SMOD(shifterConfig->shifterMode);
<> 144:ef7eb2e8f9f7 157 }
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 base->TIMCFG[index] =
<> 144:ef7eb2e8f9f7 162 FLEXIO_TIMCFG_TIMOUT(timerConfig->timerOutput) | FLEXIO_TIMCFG_TIMDEC(timerConfig->timerDecrement) |
<> 144:ef7eb2e8f9f7 163 FLEXIO_TIMCFG_TIMRST(timerConfig->timerReset) | FLEXIO_TIMCFG_TIMDIS(timerConfig->timerDisable) |
<> 144:ef7eb2e8f9f7 164 FLEXIO_TIMCFG_TIMENA(timerConfig->timerEnable) | FLEXIO_TIMCFG_TSTOP(timerConfig->timerStop) |
<> 144:ef7eb2e8f9f7 165 FLEXIO_TIMCFG_TSTART(timerConfig->timerStart);
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 base->TIMCMP[index] = FLEXIO_TIMCMP_CMP(timerConfig->timerCompare);
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 base->TIMCTL[index] = FLEXIO_TIMCTL_TRGSEL(timerConfig->triggerSelect) |
<> 144:ef7eb2e8f9f7 170 FLEXIO_TIMCTL_TRGPOL(timerConfig->triggerPolarity) |
<> 144:ef7eb2e8f9f7 171 FLEXIO_TIMCTL_TRGSRC(timerConfig->triggerSource) |
<> 144:ef7eb2e8f9f7 172 FLEXIO_TIMCTL_PINCFG(timerConfig->pinConfig) | FLEXIO_TIMCTL_PINSEL(timerConfig->pinSelect) |
<> 144:ef7eb2e8f9f7 173 FLEXIO_TIMCTL_PINPOL(timerConfig->pinPolarity) | FLEXIO_TIMCTL_TIMOD(timerConfig->timerMode);
<> 144:ef7eb2e8f9f7 174 }
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)
<> 144:ef7eb2e8f9f7 177 {
<> 144:ef7eb2e8f9f7 178 assert(base);
<> 144:ef7eb2e8f9f7 179 assert(handle);
<> 144:ef7eb2e8f9f7 180 assert(isr);
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 uint8_t index = 0;
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Find the an empty handle pointer to store the handle. */
<> 144:ef7eb2e8f9f7 185 for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
<> 144:ef7eb2e8f9f7 186 {
<> 144:ef7eb2e8f9f7 187 if (s_flexioHandle[index] == NULL)
<> 144:ef7eb2e8f9f7 188 {
<> 144:ef7eb2e8f9f7 189 /* Register FLEXIO simulated driver base, handle and isr. */
<> 144:ef7eb2e8f9f7 190 s_flexioType[index] = base;
<> 144:ef7eb2e8f9f7 191 s_flexioHandle[index] = handle;
<> 144:ef7eb2e8f9f7 192 s_flexioIsr[index] = isr;
<> 144:ef7eb2e8f9f7 193 break;
<> 144:ef7eb2e8f9f7 194 }
<> 144:ef7eb2e8f9f7 195 }
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 if (index == FLEXIO_HANDLE_COUNT)
<> 144:ef7eb2e8f9f7 198 {
<> 144:ef7eb2e8f9f7 199 return kStatus_OutOfRange;
<> 144:ef7eb2e8f9f7 200 }
<> 144:ef7eb2e8f9f7 201 else
<> 144:ef7eb2e8f9f7 202 {
<> 144:ef7eb2e8f9f7 203 return kStatus_Success;
<> 144:ef7eb2e8f9f7 204 }
<> 144:ef7eb2e8f9f7 205 }
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 status_t FLEXIO_UnregisterHandleIRQ(void *base)
<> 144:ef7eb2e8f9f7 208 {
<> 144:ef7eb2e8f9f7 209 assert(base);
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 uint8_t index = 0;
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /* Find the index from base address mappings. */
<> 144:ef7eb2e8f9f7 214 for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
<> 144:ef7eb2e8f9f7 215 {
<> 144:ef7eb2e8f9f7 216 if (s_flexioType[index] == base)
<> 144:ef7eb2e8f9f7 217 {
<> 144:ef7eb2e8f9f7 218 /* Unregister FLEXIO simulated driver handle and isr. */
<> 144:ef7eb2e8f9f7 219 s_flexioType[index] = NULL;
<> 144:ef7eb2e8f9f7 220 s_flexioHandle[index] = NULL;
<> 144:ef7eb2e8f9f7 221 s_flexioIsr[index] = NULL;
<> 144:ef7eb2e8f9f7 222 break;
<> 144:ef7eb2e8f9f7 223 }
<> 144:ef7eb2e8f9f7 224 }
<> 144:ef7eb2e8f9f7 225
<> 144:ef7eb2e8f9f7 226 if (index == FLEXIO_HANDLE_COUNT)
<> 144:ef7eb2e8f9f7 227 {
<> 144:ef7eb2e8f9f7 228 return kStatus_OutOfRange;
<> 144:ef7eb2e8f9f7 229 }
<> 144:ef7eb2e8f9f7 230 else
<> 144:ef7eb2e8f9f7 231 {
<> 144:ef7eb2e8f9f7 232 return kStatus_Success;
<> 144:ef7eb2e8f9f7 233 }
<> 144:ef7eb2e8f9f7 234 }
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 void FLEXIO_CommonIRQHandler(void)
<> 144:ef7eb2e8f9f7 237 {
<> 144:ef7eb2e8f9f7 238 uint8_t index;
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 for (index = 0; index < FLEXIO_HANDLE_COUNT; index++)
<> 144:ef7eb2e8f9f7 241 {
<> 144:ef7eb2e8f9f7 242 if (s_flexioHandle[index])
<> 144:ef7eb2e8f9f7 243 {
<> 144:ef7eb2e8f9f7 244 s_flexioIsr[index](s_flexioType[index], s_flexioHandle[index]);
<> 144:ef7eb2e8f9f7 245 }
<> 144:ef7eb2e8f9f7 246 }
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 void FLEXIO_DriverIRQHandler(void)
<> 144:ef7eb2e8f9f7 250 {
<> 144:ef7eb2e8f9f7 251 FLEXIO_CommonIRQHandler();
<> 144:ef7eb2e8f9f7 252 }
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 void FLEXIO0_DriverIRQHandler(void)
<> 144:ef7eb2e8f9f7 255 {
<> 144:ef7eb2e8f9f7 256 FLEXIO_CommonIRQHandler();
<> 144:ef7eb2e8f9f7 257 }
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 void UART2_FLEXIO_DriverIRQHandler(void)
<> 144:ef7eb2e8f9f7 260 {
<> 144:ef7eb2e8f9f7 261 FLEXIO_CommonIRQHandler();
<> 144:ef7eb2e8f9f7 262 }