added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_uart_edma.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 144:ef7eb2e8f9f7 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 144:ef7eb2e8f9f7 | 13 | * other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 144:ef7eb2e8f9f7 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 144:ef7eb2e8f9f7 | 17 | * software without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 18 | * |
<> | 144:ef7eb2e8f9f7 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | #include "fsl_uart_edma.h" |
<> | 144:ef7eb2e8f9f7 | 32 | #include "fsl_dmamux.h" |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 35 | * Definitions |
<> | 144:ef7eb2e8f9f7 | 36 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Array of UART handle. */ |
<> | 144:ef7eb2e8f9f7 | 39 | #if (defined(UART5)) |
<> | 144:ef7eb2e8f9f7 | 40 | #define UART_HANDLE_ARRAY_SIZE 6 |
<> | 144:ef7eb2e8f9f7 | 41 | #else /* UART5 */ |
<> | 144:ef7eb2e8f9f7 | 42 | #if (defined(UART4)) |
<> | 144:ef7eb2e8f9f7 | 43 | #define UART_HANDLE_ARRAY_SIZE 5 |
<> | 144:ef7eb2e8f9f7 | 44 | #else /* UART4 */ |
<> | 144:ef7eb2e8f9f7 | 45 | #if (defined(UART3)) |
<> | 144:ef7eb2e8f9f7 | 46 | #define UART_HANDLE_ARRAY_SIZE 4 |
<> | 144:ef7eb2e8f9f7 | 47 | #else /* UART3 */ |
<> | 144:ef7eb2e8f9f7 | 48 | #if (defined(UART2)) |
<> | 144:ef7eb2e8f9f7 | 49 | #define UART_HANDLE_ARRAY_SIZE 3 |
<> | 144:ef7eb2e8f9f7 | 50 | #else /* UART2 */ |
<> | 144:ef7eb2e8f9f7 | 51 | #if (defined(UART1)) |
<> | 144:ef7eb2e8f9f7 | 52 | #define UART_HANDLE_ARRAY_SIZE 2 |
<> | 144:ef7eb2e8f9f7 | 53 | #else /* UART1 */ |
<> | 144:ef7eb2e8f9f7 | 54 | #if (defined(UART0)) |
<> | 144:ef7eb2e8f9f7 | 55 | #define UART_HANDLE_ARRAY_SIZE 1 |
<> | 144:ef7eb2e8f9f7 | 56 | #else /* UART0 */ |
<> | 144:ef7eb2e8f9f7 | 57 | #error No UART instance. |
<> | 144:ef7eb2e8f9f7 | 58 | #endif /* UART 0 */ |
<> | 144:ef7eb2e8f9f7 | 59 | #endif /* UART 1 */ |
<> | 144:ef7eb2e8f9f7 | 60 | #endif /* UART 2 */ |
<> | 144:ef7eb2e8f9f7 | 61 | #endif /* UART 3 */ |
<> | 144:ef7eb2e8f9f7 | 62 | #endif /* UART 4 */ |
<> | 144:ef7eb2e8f9f7 | 63 | #endif /* UART 5 */ |
<> | 144:ef7eb2e8f9f7 | 64 | |
<> | 144:ef7eb2e8f9f7 | 65 | /*<! Structure definition for uart_edma_private_handle_t. The structure is private. */ |
<> | 144:ef7eb2e8f9f7 | 66 | typedef struct _uart_edma_private_handle |
<> | 144:ef7eb2e8f9f7 | 67 | { |
<> | 144:ef7eb2e8f9f7 | 68 | UART_Type *base; |
<> | 144:ef7eb2e8f9f7 | 69 | uart_edma_handle_t *handle; |
<> | 144:ef7eb2e8f9f7 | 70 | } uart_edma_private_handle_t; |
<> | 144:ef7eb2e8f9f7 | 71 | |
<> | 144:ef7eb2e8f9f7 | 72 | /* UART EDMA transfer handle. */ |
<> | 144:ef7eb2e8f9f7 | 73 | enum _uart_edma_tansfer_states |
<> | 144:ef7eb2e8f9f7 | 74 | { |
<> | 144:ef7eb2e8f9f7 | 75 | kUART_TxIdle, /* TX idle. */ |
<> | 144:ef7eb2e8f9f7 | 76 | kUART_TxBusy, /* TX busy. */ |
<> | 144:ef7eb2e8f9f7 | 77 | kUART_RxIdle, /* RX idle. */ |
<> | 144:ef7eb2e8f9f7 | 78 | kUART_RxBusy /* RX busy. */ |
<> | 144:ef7eb2e8f9f7 | 79 | }; |
<> | 144:ef7eb2e8f9f7 | 80 | |
<> | 144:ef7eb2e8f9f7 | 81 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 82 | * Definitions |
<> | 144:ef7eb2e8f9f7 | 83 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | /*<! Private handle only used for internally. */ |
<> | 144:ef7eb2e8f9f7 | 86 | static uart_edma_private_handle_t s_edmaPrivateHandle[UART_HANDLE_ARRAY_SIZE]; |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 89 | * Prototypes |
<> | 144:ef7eb2e8f9f7 | 90 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | /*! |
<> | 144:ef7eb2e8f9f7 | 93 | * @brief UART EDMA send finished callback function. |
<> | 144:ef7eb2e8f9f7 | 94 | * |
<> | 144:ef7eb2e8f9f7 | 95 | * This function is called when UART EDMA send finished. It disables the UART |
<> | 144:ef7eb2e8f9f7 | 96 | * TX EDMA request and sends @ref kStatus_UART_TxIdle to UART callback. |
<> | 144:ef7eb2e8f9f7 | 97 | * |
<> | 144:ef7eb2e8f9f7 | 98 | * @param handle The EDMA handle. |
<> | 144:ef7eb2e8f9f7 | 99 | * @param param Callback function parameter. |
<> | 144:ef7eb2e8f9f7 | 100 | */ |
<> | 144:ef7eb2e8f9f7 | 101 | static void UART_SendEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds); |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | /*! |
<> | 144:ef7eb2e8f9f7 | 104 | * @brief UART EDMA receive finished callback function. |
<> | 144:ef7eb2e8f9f7 | 105 | * |
<> | 144:ef7eb2e8f9f7 | 106 | * This function is called when UART EDMA receive finished. It disables the UART |
<> | 144:ef7eb2e8f9f7 | 107 | * RX EDMA request and sends @ref kStatus_UART_RxIdle to UART callback. |
<> | 144:ef7eb2e8f9f7 | 108 | * |
<> | 144:ef7eb2e8f9f7 | 109 | * @param handle The EDMA handle. |
<> | 144:ef7eb2e8f9f7 | 110 | * @param param Callback function parameter. |
<> | 144:ef7eb2e8f9f7 | 111 | */ |
<> | 144:ef7eb2e8f9f7 | 112 | static void UART_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds); |
<> | 144:ef7eb2e8f9f7 | 113 | |
<> | 144:ef7eb2e8f9f7 | 114 | /*! |
<> | 144:ef7eb2e8f9f7 | 115 | * @brief Get the UART instance from peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 116 | * |
<> | 144:ef7eb2e8f9f7 | 117 | * @param base UART peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 118 | * @return UART instance. |
<> | 144:ef7eb2e8f9f7 | 119 | */ |
<> | 144:ef7eb2e8f9f7 | 120 | extern uint32_t UART_GetInstance(UART_Type *base); |
<> | 144:ef7eb2e8f9f7 | 121 | |
<> | 144:ef7eb2e8f9f7 | 122 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 123 | * Code |
<> | 144:ef7eb2e8f9f7 | 124 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | static void UART_SendEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds) |
<> | 144:ef7eb2e8f9f7 | 127 | { |
<> | 144:ef7eb2e8f9f7 | 128 | uart_edma_private_handle_t *uartPrivateHandle = (uart_edma_private_handle_t *)param; |
<> | 144:ef7eb2e8f9f7 | 129 | |
<> | 144:ef7eb2e8f9f7 | 130 | /* Avoid the warning for unused variables. */ |
<> | 144:ef7eb2e8f9f7 | 131 | handle = handle; |
<> | 144:ef7eb2e8f9f7 | 132 | tcds = tcds; |
<> | 144:ef7eb2e8f9f7 | 133 | |
<> | 144:ef7eb2e8f9f7 | 134 | if (transferDone) |
<> | 144:ef7eb2e8f9f7 | 135 | { |
<> | 144:ef7eb2e8f9f7 | 136 | UART_TransferAbortSendEDMA(uartPrivateHandle->base, uartPrivateHandle->handle); |
<> | 144:ef7eb2e8f9f7 | 137 | |
<> | 144:ef7eb2e8f9f7 | 138 | if (uartPrivateHandle->handle->callback) |
<> | 144:ef7eb2e8f9f7 | 139 | { |
<> | 144:ef7eb2e8f9f7 | 140 | uartPrivateHandle->handle->callback(uartPrivateHandle->base, uartPrivateHandle->handle, kStatus_UART_TxIdle, |
<> | 144:ef7eb2e8f9f7 | 141 | uartPrivateHandle->handle->userData); |
<> | 144:ef7eb2e8f9f7 | 142 | } |
<> | 144:ef7eb2e8f9f7 | 143 | } |
<> | 144:ef7eb2e8f9f7 | 144 | } |
<> | 144:ef7eb2e8f9f7 | 145 | |
<> | 144:ef7eb2e8f9f7 | 146 | static void UART_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds) |
<> | 144:ef7eb2e8f9f7 | 147 | { |
<> | 144:ef7eb2e8f9f7 | 148 | uart_edma_private_handle_t *uartPrivateHandle = (uart_edma_private_handle_t *)param; |
<> | 144:ef7eb2e8f9f7 | 149 | |
<> | 144:ef7eb2e8f9f7 | 150 | /* Avoid warning for unused parameters. */ |
<> | 144:ef7eb2e8f9f7 | 151 | handle = handle; |
<> | 144:ef7eb2e8f9f7 | 152 | tcds = tcds; |
<> | 144:ef7eb2e8f9f7 | 153 | |
<> | 144:ef7eb2e8f9f7 | 154 | if (transferDone) |
<> | 144:ef7eb2e8f9f7 | 155 | { |
<> | 144:ef7eb2e8f9f7 | 156 | /* Disable transfer. */ |
<> | 144:ef7eb2e8f9f7 | 157 | UART_TransferAbortReceiveEDMA(uartPrivateHandle->base, uartPrivateHandle->handle); |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | if (uartPrivateHandle->handle->callback) |
<> | 144:ef7eb2e8f9f7 | 160 | { |
<> | 144:ef7eb2e8f9f7 | 161 | uartPrivateHandle->handle->callback(uartPrivateHandle->base, uartPrivateHandle->handle, kStatus_UART_RxIdle, |
<> | 144:ef7eb2e8f9f7 | 162 | uartPrivateHandle->handle->userData); |
<> | 144:ef7eb2e8f9f7 | 163 | } |
<> | 144:ef7eb2e8f9f7 | 164 | } |
<> | 144:ef7eb2e8f9f7 | 165 | } |
<> | 144:ef7eb2e8f9f7 | 166 | |
<> | 144:ef7eb2e8f9f7 | 167 | void UART_TransferCreateHandleEDMA(UART_Type *base, |
<> | 144:ef7eb2e8f9f7 | 168 | uart_edma_handle_t *handle, |
<> | 144:ef7eb2e8f9f7 | 169 | uart_edma_transfer_callback_t callback, |
<> | 144:ef7eb2e8f9f7 | 170 | void *userData, |
<> | 144:ef7eb2e8f9f7 | 171 | edma_handle_t *txEdmaHandle, |
<> | 144:ef7eb2e8f9f7 | 172 | edma_handle_t *rxEdmaHandle) |
<> | 144:ef7eb2e8f9f7 | 173 | { |
<> | 144:ef7eb2e8f9f7 | 174 | assert(handle); |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | uint32_t instance = UART_GetInstance(base); |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | s_edmaPrivateHandle[instance].base = base; |
<> | 144:ef7eb2e8f9f7 | 179 | s_edmaPrivateHandle[instance].handle = handle; |
<> | 144:ef7eb2e8f9f7 | 180 | |
<> | 144:ef7eb2e8f9f7 | 181 | memset(handle, 0, sizeof(*handle)); |
<> | 144:ef7eb2e8f9f7 | 182 | |
<> | 144:ef7eb2e8f9f7 | 183 | handle->rxState = kUART_RxIdle; |
<> | 144:ef7eb2e8f9f7 | 184 | handle->txState = kUART_TxIdle; |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | handle->rxEdmaHandle = rxEdmaHandle; |
<> | 144:ef7eb2e8f9f7 | 187 | handle->txEdmaHandle = txEdmaHandle; |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | handle->callback = callback; |
<> | 144:ef7eb2e8f9f7 | 190 | handle->userData = userData; |
<> | 144:ef7eb2e8f9f7 | 191 | |
<> | 144:ef7eb2e8f9f7 | 192 | #if defined(FSL_FEATURE_UART_HAS_FIFO) && FSL_FEATURE_UART_HAS_FIFO |
<> | 144:ef7eb2e8f9f7 | 193 | /* Note: |
<> | 144:ef7eb2e8f9f7 | 194 | Take care of the RX FIFO, EDMA request only assert when received bytes |
<> | 144:ef7eb2e8f9f7 | 195 | equal or more than RX water mark, there is potential issue if RX water |
<> | 144:ef7eb2e8f9f7 | 196 | mark larger than 1. |
<> | 144:ef7eb2e8f9f7 | 197 | For example, if RX FIFO water mark is 2, upper layer needs 5 bytes and |
<> | 144:ef7eb2e8f9f7 | 198 | 5 bytes are received. the last byte will be saved in FIFO but not trigger |
<> | 144:ef7eb2e8f9f7 | 199 | EDMA transfer because the water mark is 2. |
<> | 144:ef7eb2e8f9f7 | 200 | */ |
<> | 144:ef7eb2e8f9f7 | 201 | if (rxEdmaHandle) |
<> | 144:ef7eb2e8f9f7 | 202 | { |
<> | 144:ef7eb2e8f9f7 | 203 | base->RWFIFO = 1U; |
<> | 144:ef7eb2e8f9f7 | 204 | } |
<> | 144:ef7eb2e8f9f7 | 205 | #endif |
<> | 144:ef7eb2e8f9f7 | 206 | |
<> | 144:ef7eb2e8f9f7 | 207 | /* Configure TX. */ |
<> | 144:ef7eb2e8f9f7 | 208 | if (txEdmaHandle) |
<> | 144:ef7eb2e8f9f7 | 209 | { |
<> | 144:ef7eb2e8f9f7 | 210 | EDMA_SetCallback(handle->txEdmaHandle, UART_SendEDMACallback, &s_edmaPrivateHandle[instance]); |
<> | 144:ef7eb2e8f9f7 | 211 | } |
<> | 144:ef7eb2e8f9f7 | 212 | |
<> | 144:ef7eb2e8f9f7 | 213 | /* Configure RX. */ |
<> | 144:ef7eb2e8f9f7 | 214 | if (rxEdmaHandle) |
<> | 144:ef7eb2e8f9f7 | 215 | { |
<> | 144:ef7eb2e8f9f7 | 216 | EDMA_SetCallback(handle->rxEdmaHandle, UART_ReceiveEDMACallback, &s_edmaPrivateHandle[instance]); |
<> | 144:ef7eb2e8f9f7 | 217 | } |
<> | 144:ef7eb2e8f9f7 | 218 | } |
<> | 144:ef7eb2e8f9f7 | 219 | |
<> | 144:ef7eb2e8f9f7 | 220 | status_t UART_SendEDMA(UART_Type *base, uart_edma_handle_t *handle, uart_transfer_t *xfer) |
<> | 144:ef7eb2e8f9f7 | 221 | { |
<> | 144:ef7eb2e8f9f7 | 222 | assert(handle->txEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | edma_transfer_config_t xferConfig; |
<> | 144:ef7eb2e8f9f7 | 225 | status_t status; |
<> | 144:ef7eb2e8f9f7 | 226 | |
<> | 144:ef7eb2e8f9f7 | 227 | /* Return error if xfer invalid. */ |
<> | 144:ef7eb2e8f9f7 | 228 | if ((0U == xfer->dataSize) || (NULL == xfer->data)) |
<> | 144:ef7eb2e8f9f7 | 229 | { |
<> | 144:ef7eb2e8f9f7 | 230 | return kStatus_InvalidArgument; |
<> | 144:ef7eb2e8f9f7 | 231 | } |
<> | 144:ef7eb2e8f9f7 | 232 | |
<> | 144:ef7eb2e8f9f7 | 233 | /* If previous TX not finished. */ |
<> | 144:ef7eb2e8f9f7 | 234 | if (kUART_TxBusy == handle->txState) |
<> | 144:ef7eb2e8f9f7 | 235 | { |
<> | 144:ef7eb2e8f9f7 | 236 | status = kStatus_UART_TxBusy; |
<> | 144:ef7eb2e8f9f7 | 237 | } |
<> | 144:ef7eb2e8f9f7 | 238 | else |
<> | 144:ef7eb2e8f9f7 | 239 | { |
<> | 144:ef7eb2e8f9f7 | 240 | handle->txState = kUART_TxBusy; |
<> | 144:ef7eb2e8f9f7 | 241 | handle->txDataSizeAll = xfer->dataSize; |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | /* Prepare transfer. */ |
<> | 144:ef7eb2e8f9f7 | 244 | EDMA_PrepareTransfer(&xferConfig, xfer->data, sizeof(uint8_t), (void *)UART_GetDataRegisterAddress(base), |
<> | 144:ef7eb2e8f9f7 | 245 | sizeof(uint8_t), sizeof(uint8_t), xfer->dataSize, kEDMA_MemoryToPeripheral); |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /* Submit transfer. */ |
<> | 144:ef7eb2e8f9f7 | 248 | EDMA_SubmitTransfer(handle->txEdmaHandle, &xferConfig); |
<> | 144:ef7eb2e8f9f7 | 249 | EDMA_StartTransfer(handle->txEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 250 | |
<> | 144:ef7eb2e8f9f7 | 251 | /* Enable UART TX EDMA. */ |
<> | 144:ef7eb2e8f9f7 | 252 | UART_EnableTxDMA(base, true); |
<> | 144:ef7eb2e8f9f7 | 253 | |
<> | 144:ef7eb2e8f9f7 | 254 | status = kStatus_Success; |
<> | 144:ef7eb2e8f9f7 | 255 | } |
<> | 144:ef7eb2e8f9f7 | 256 | |
<> | 144:ef7eb2e8f9f7 | 257 | return status; |
<> | 144:ef7eb2e8f9f7 | 258 | } |
<> | 144:ef7eb2e8f9f7 | 259 | |
<> | 144:ef7eb2e8f9f7 | 260 | status_t UART_ReceiveEDMA(UART_Type *base, uart_edma_handle_t *handle, uart_transfer_t *xfer) |
<> | 144:ef7eb2e8f9f7 | 261 | { |
<> | 144:ef7eb2e8f9f7 | 262 | assert(handle->rxEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 263 | |
<> | 144:ef7eb2e8f9f7 | 264 | edma_transfer_config_t xferConfig; |
<> | 144:ef7eb2e8f9f7 | 265 | status_t status; |
<> | 144:ef7eb2e8f9f7 | 266 | |
<> | 144:ef7eb2e8f9f7 | 267 | /* Return error if xfer invalid. */ |
<> | 144:ef7eb2e8f9f7 | 268 | if ((0U == xfer->dataSize) || (NULL == xfer->data)) |
<> | 144:ef7eb2e8f9f7 | 269 | { |
<> | 144:ef7eb2e8f9f7 | 270 | return kStatus_InvalidArgument; |
<> | 144:ef7eb2e8f9f7 | 271 | } |
<> | 144:ef7eb2e8f9f7 | 272 | |
<> | 144:ef7eb2e8f9f7 | 273 | /* If previous RX not finished. */ |
<> | 144:ef7eb2e8f9f7 | 274 | if (kUART_RxBusy == handle->rxState) |
<> | 144:ef7eb2e8f9f7 | 275 | { |
<> | 144:ef7eb2e8f9f7 | 276 | status = kStatus_UART_RxBusy; |
<> | 144:ef7eb2e8f9f7 | 277 | } |
<> | 144:ef7eb2e8f9f7 | 278 | else |
<> | 144:ef7eb2e8f9f7 | 279 | { |
<> | 144:ef7eb2e8f9f7 | 280 | handle->rxState = kUART_RxBusy; |
<> | 144:ef7eb2e8f9f7 | 281 | handle->rxDataSizeAll = xfer->dataSize; |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | /* Prepare transfer. */ |
<> | 144:ef7eb2e8f9f7 | 284 | EDMA_PrepareTransfer(&xferConfig, (void *)UART_GetDataRegisterAddress(base), sizeof(uint8_t), xfer->data, |
<> | 144:ef7eb2e8f9f7 | 285 | sizeof(uint8_t), sizeof(uint8_t), xfer->dataSize, kEDMA_PeripheralToMemory); |
<> | 144:ef7eb2e8f9f7 | 286 | |
<> | 144:ef7eb2e8f9f7 | 287 | /* Submit transfer. */ |
<> | 144:ef7eb2e8f9f7 | 288 | EDMA_SubmitTransfer(handle->rxEdmaHandle, &xferConfig); |
<> | 144:ef7eb2e8f9f7 | 289 | EDMA_StartTransfer(handle->rxEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 290 | |
<> | 144:ef7eb2e8f9f7 | 291 | /* Enable UART RX EDMA. */ |
<> | 144:ef7eb2e8f9f7 | 292 | UART_EnableRxDMA(base, true); |
<> | 144:ef7eb2e8f9f7 | 293 | |
<> | 144:ef7eb2e8f9f7 | 294 | status = kStatus_Success; |
<> | 144:ef7eb2e8f9f7 | 295 | } |
<> | 144:ef7eb2e8f9f7 | 296 | |
<> | 144:ef7eb2e8f9f7 | 297 | return status; |
<> | 144:ef7eb2e8f9f7 | 298 | } |
<> | 144:ef7eb2e8f9f7 | 299 | |
<> | 144:ef7eb2e8f9f7 | 300 | void UART_TransferAbortSendEDMA(UART_Type *base, uart_edma_handle_t *handle) |
<> | 144:ef7eb2e8f9f7 | 301 | { |
<> | 144:ef7eb2e8f9f7 | 302 | assert(handle->txEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 303 | |
<> | 144:ef7eb2e8f9f7 | 304 | /* Disable UART TX EDMA. */ |
<> | 144:ef7eb2e8f9f7 | 305 | UART_EnableTxDMA(base, false); |
<> | 144:ef7eb2e8f9f7 | 306 | |
<> | 144:ef7eb2e8f9f7 | 307 | /* Stop transfer. */ |
<> | 144:ef7eb2e8f9f7 | 308 | EDMA_AbortTransfer(handle->txEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 309 | |
<> | 144:ef7eb2e8f9f7 | 310 | handle->txState = kUART_TxIdle; |
<> | 144:ef7eb2e8f9f7 | 311 | } |
<> | 144:ef7eb2e8f9f7 | 312 | |
<> | 144:ef7eb2e8f9f7 | 313 | void UART_TransferAbortReceiveEDMA(UART_Type *base, uart_edma_handle_t *handle) |
<> | 144:ef7eb2e8f9f7 | 314 | { |
<> | 144:ef7eb2e8f9f7 | 315 | assert(handle->rxEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 316 | |
<> | 144:ef7eb2e8f9f7 | 317 | /* Disable UART RX EDMA. */ |
<> | 144:ef7eb2e8f9f7 | 318 | UART_EnableRxDMA(base, false); |
<> | 144:ef7eb2e8f9f7 | 319 | |
<> | 144:ef7eb2e8f9f7 | 320 | /* Stop transfer. */ |
<> | 144:ef7eb2e8f9f7 | 321 | EDMA_AbortTransfer(handle->rxEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 322 | |
<> | 144:ef7eb2e8f9f7 | 323 | handle->rxState = kUART_RxIdle; |
<> | 144:ef7eb2e8f9f7 | 324 | } |
<> | 144:ef7eb2e8f9f7 | 325 | |
<> | 144:ef7eb2e8f9f7 | 326 | status_t UART_TransferGetReceiveCountEDMA(UART_Type *base, uart_edma_handle_t *handle, uint32_t *count) |
<> | 144:ef7eb2e8f9f7 | 327 | { |
<> | 144:ef7eb2e8f9f7 | 328 | assert(handle->rxEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 329 | |
<> | 144:ef7eb2e8f9f7 | 330 | if (kUART_RxIdle == handle->rxState) |
<> | 144:ef7eb2e8f9f7 | 331 | { |
<> | 144:ef7eb2e8f9f7 | 332 | return kStatus_NoTransferInProgress; |
<> | 144:ef7eb2e8f9f7 | 333 | } |
<> | 144:ef7eb2e8f9f7 | 334 | |
<> | 144:ef7eb2e8f9f7 | 335 | if (!count) |
<> | 144:ef7eb2e8f9f7 | 336 | { |
<> | 144:ef7eb2e8f9f7 | 337 | return kStatus_InvalidArgument; |
<> | 144:ef7eb2e8f9f7 | 338 | } |
<> | 144:ef7eb2e8f9f7 | 339 | |
<> | 144:ef7eb2e8f9f7 | 340 | *count = handle->rxDataSizeAll - EDMA_GetRemainingBytes(handle->rxEdmaHandle->base, handle->rxEdmaHandle->channel); |
<> | 144:ef7eb2e8f9f7 | 341 | |
<> | 144:ef7eb2e8f9f7 | 342 | return kStatus_Success; |
<> | 144:ef7eb2e8f9f7 | 343 | } |
<> | 144:ef7eb2e8f9f7 | 344 | |
<> | 144:ef7eb2e8f9f7 | 345 | status_t UART_TransferGetSendCountEDMA(UART_Type *base, uart_edma_handle_t *handle, uint32_t *count) |
<> | 144:ef7eb2e8f9f7 | 346 | { |
<> | 144:ef7eb2e8f9f7 | 347 | assert(handle->txEdmaHandle); |
<> | 144:ef7eb2e8f9f7 | 348 | |
<> | 144:ef7eb2e8f9f7 | 349 | if (kUART_TxIdle == handle->txState) |
<> | 144:ef7eb2e8f9f7 | 350 | { |
<> | 144:ef7eb2e8f9f7 | 351 | return kStatus_NoTransferInProgress; |
<> | 144:ef7eb2e8f9f7 | 352 | } |
<> | 144:ef7eb2e8f9f7 | 353 | |
<> | 144:ef7eb2e8f9f7 | 354 | if (!count) |
<> | 144:ef7eb2e8f9f7 | 355 | { |
<> | 144:ef7eb2e8f9f7 | 356 | return kStatus_InvalidArgument; |
<> | 144:ef7eb2e8f9f7 | 357 | } |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | *count = handle->txDataSizeAll - EDMA_GetRemainingBytes(handle->txEdmaHandle->base, handle->txEdmaHandle->channel); |
<> | 144:ef7eb2e8f9f7 | 360 | |
<> | 144:ef7eb2e8f9f7 | 361 | return kStatus_Success; |
<> | 144:ef7eb2e8f9f7 | 362 | } |