Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_rtc.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #ifndef _FSL_RTC_H_
<> 144:ef7eb2e8f9f7 31 #define _FSL_RTC_H_
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "fsl_common.h"
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 /*!
<> 144:ef7eb2e8f9f7 36 * @addtogroup rtc_driver
<> 144:ef7eb2e8f9f7 37 * @{
<> 144:ef7eb2e8f9f7 38 */
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /*! @file */
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /*******************************************************************************
<> 144:ef7eb2e8f9f7 43 * Definitions
<> 144:ef7eb2e8f9f7 44 ******************************************************************************/
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /*! @name Driver version */
<> 144:ef7eb2e8f9f7 47 /*@{*/
<> 144:ef7eb2e8f9f7 48 #define FSL_RTC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
<> 144:ef7eb2e8f9f7 49 /*@}*/
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /*! @brief List of RTC interrupts */
<> 144:ef7eb2e8f9f7 52 typedef enum _rtc_interrupt_enable
<> 144:ef7eb2e8f9f7 53 {
<> 144:ef7eb2e8f9f7 54 kRTC_TimeInvalidInterruptEnable = RTC_IER_TIIE_MASK, /*!< Time invalid interrupt.*/
<> 144:ef7eb2e8f9f7 55 kRTC_TimeOverflowInterruptEnable = RTC_IER_TOIE_MASK, /*!< Time overflow interrupt.*/
<> 144:ef7eb2e8f9f7 56 kRTC_AlarmInterruptEnable = RTC_IER_TAIE_MASK, /*!< Alarm interrupt.*/
<> 144:ef7eb2e8f9f7 57 kRTC_SecondsInterruptEnable = RTC_IER_TSIE_MASK /*!< Seconds interrupt.*/
<> 144:ef7eb2e8f9f7 58 } rtc_interrupt_enable_t;
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /*! @brief List of RTC flags */
<> 144:ef7eb2e8f9f7 61 typedef enum _rtc_status_flags
<> 144:ef7eb2e8f9f7 62 {
<> 144:ef7eb2e8f9f7 63 kRTC_TimeInvalidFlag = RTC_SR_TIF_MASK, /*!< Time invalid flag */
<> 144:ef7eb2e8f9f7 64 kRTC_TimeOverflowFlag = RTC_SR_TOF_MASK, /*!< Time overflow flag */
<> 144:ef7eb2e8f9f7 65 kRTC_AlarmFlag = RTC_SR_TAF_MASK /*!< Alarm flag*/
<> 144:ef7eb2e8f9f7 66 } rtc_status_flags_t;
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /*! @brief List of RTC Oscillator capacitor load settings */
<> 144:ef7eb2e8f9f7 69 typedef enum _rtc_osc_cap_load
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71 kRTC_Capacitor_2p = RTC_CR_SC2P_MASK, /*!< 2pF capacitor load */
<> 144:ef7eb2e8f9f7 72 kRTC_Capacitor_4p = RTC_CR_SC4P_MASK, /*!< 4pF capacitor load */
<> 144:ef7eb2e8f9f7 73 kRTC_Capacitor_8p = RTC_CR_SC8P_MASK, /*!< 8pF capacitor load */
<> 144:ef7eb2e8f9f7 74 kRTC_Capacitor_16p = RTC_CR_SC16P_MASK /*!< 16pF capacitor load */
<> 144:ef7eb2e8f9f7 75 } rtc_osc_cap_load_t;
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /*! @brief Structure is used to hold the date and time */
<> 144:ef7eb2e8f9f7 78 typedef struct _rtc_datetime
<> 144:ef7eb2e8f9f7 79 {
<> 144:ef7eb2e8f9f7 80 uint16_t year; /*!< Range from 1970 to 2099.*/
<> 144:ef7eb2e8f9f7 81 uint8_t month; /*!< Range from 1 to 12.*/
<> 144:ef7eb2e8f9f7 82 uint8_t day; /*!< Range from 1 to 31 (depending on month).*/
<> 144:ef7eb2e8f9f7 83 uint8_t hour; /*!< Range from 0 to 23.*/
<> 144:ef7eb2e8f9f7 84 uint8_t minute; /*!< Range from 0 to 59.*/
<> 144:ef7eb2e8f9f7 85 uint8_t second; /*!< Range from 0 to 59.*/
<> 144:ef7eb2e8f9f7 86 } rtc_datetime_t;
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /*!
<> 144:ef7eb2e8f9f7 89 * @brief RTC config structure
<> 144:ef7eb2e8f9f7 90 *
<> 144:ef7eb2e8f9f7 91 * This structure holds the configuration settings for the RTC peripheral. To initialize this
<> 144:ef7eb2e8f9f7 92 * structure to reasonable defaults, call the RTC_GetDefaultConfig() function and pass a
<> 144:ef7eb2e8f9f7 93 * pointer to your config structure instance.
<> 144:ef7eb2e8f9f7 94 *
<> 144:ef7eb2e8f9f7 95 * The config struct can be made const so it resides in flash
<> 144:ef7eb2e8f9f7 96 */
<> 144:ef7eb2e8f9f7 97 typedef struct _rtc_config
<> 144:ef7eb2e8f9f7 98 {
<> 144:ef7eb2e8f9f7 99 bool wakeupSelect; /*!< true: Wakeup pin outputs the 32KHz clock;
<> 144:ef7eb2e8f9f7 100 false:Wakeup pin used to wakeup the chip */
<> 144:ef7eb2e8f9f7 101 bool updateMode; /*!< true: Registers can be written even when locked under certain
<> 144:ef7eb2e8f9f7 102 conditions, false: No writes allowed when registers are locked */
<> 144:ef7eb2e8f9f7 103 bool supervisorAccess; /*!< true: Non-supervisor accesses are allowed;
<> 144:ef7eb2e8f9f7 104 false: Non-supervisor accesses are not supported */
<> 144:ef7eb2e8f9f7 105 uint32_t compensationInterval; /*!< Compensation interval that is written to the CIR field in RTC TCR Register */
<> 144:ef7eb2e8f9f7 106 uint32_t compensationTime; /*!< Compensation time that is written to the TCR field in RTC TCR Register */
<> 144:ef7eb2e8f9f7 107 } rtc_config_t;
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /*******************************************************************************
<> 144:ef7eb2e8f9f7 110 * API
<> 144:ef7eb2e8f9f7 111 ******************************************************************************/
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 114 extern "C" {
<> 144:ef7eb2e8f9f7 115 #endif
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /*!
<> 144:ef7eb2e8f9f7 118 * @name Initialization and deinitialization
<> 144:ef7eb2e8f9f7 119 * @{
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 /*!
<> 144:ef7eb2e8f9f7 123 * @brief Ungates the RTC clock and configures the peripheral for basic operation.
<> 144:ef7eb2e8f9f7 124 *
<> 144:ef7eb2e8f9f7 125 * This function will issue a software reset if the timer invalid flag is set.
<> 144:ef7eb2e8f9f7 126 *
<> 144:ef7eb2e8f9f7 127 * @note This API should be called at the beginning of the application using the RTC driver.
<> 144:ef7eb2e8f9f7 128 *
<> 144:ef7eb2e8f9f7 129 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 130 * @param config Pointer to user's RTC config structure.
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132 void RTC_Init(RTC_Type *base, const rtc_config_t *config);
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /*!
<> 144:ef7eb2e8f9f7 135 * @brief Stop the timer and gate the RTC clock
<> 144:ef7eb2e8f9f7 136 *
<> 144:ef7eb2e8f9f7 137 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 138 */
<> 144:ef7eb2e8f9f7 139 static inline void RTC_Deinit(RTC_Type *base)
<> 144:ef7eb2e8f9f7 140 {
<> 144:ef7eb2e8f9f7 141 /* Stop the RTC timer */
<> 144:ef7eb2e8f9f7 142 base->SR &= ~RTC_SR_TCE_MASK;
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /* Gate the module clock */
<> 144:ef7eb2e8f9f7 145 CLOCK_DisableClock(kCLOCK_Rtc0);
<> 144:ef7eb2e8f9f7 146 }
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /*!
<> 144:ef7eb2e8f9f7 149 * @brief Fill in the RTC config struct with the default settings
<> 144:ef7eb2e8f9f7 150 *
<> 144:ef7eb2e8f9f7 151 * The default values are:
<> 144:ef7eb2e8f9f7 152 * @code
<> 144:ef7eb2e8f9f7 153 * config->wakeupSelect = false;
<> 144:ef7eb2e8f9f7 154 * config->updateMode = false;
<> 144:ef7eb2e8f9f7 155 * config->supervisorAccess = false;
<> 144:ef7eb2e8f9f7 156 * config->compensationInterval = 0;
<> 144:ef7eb2e8f9f7 157 * config->compensationTime = 0;
<> 144:ef7eb2e8f9f7 158 * @endcode
<> 144:ef7eb2e8f9f7 159 * @param config Pointer to user's RTC config structure.
<> 144:ef7eb2e8f9f7 160 */
<> 144:ef7eb2e8f9f7 161 void RTC_GetDefaultConfig(rtc_config_t *config);
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /*! @}*/
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /*!
<> 144:ef7eb2e8f9f7 166 * @name Current Time & Alarm
<> 144:ef7eb2e8f9f7 167 * @{
<> 144:ef7eb2e8f9f7 168 */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /*!
<> 144:ef7eb2e8f9f7 171 * @brief Sets the RTC date and time according to the given time structure.
<> 144:ef7eb2e8f9f7 172 *
<> 144:ef7eb2e8f9f7 173 * The RTC counter must be stopped prior to calling this function as writes to the RTC
<> 144:ef7eb2e8f9f7 174 * seconds register will fail if the RTC counter is running.
<> 144:ef7eb2e8f9f7 175 *
<> 144:ef7eb2e8f9f7 176 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 177 * @param datetime Pointer to structure where the date and time details to set are stored
<> 144:ef7eb2e8f9f7 178 *
<> 144:ef7eb2e8f9f7 179 * @return kStatus_Success: Success in setting the time and starting the RTC
<> 144:ef7eb2e8f9f7 180 * kStatus_InvalidArgument: Error because the datetime format is incorrect
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182 status_t RTC_SetDatetime(RTC_Type *base, const rtc_datetime_t *datetime);
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /*!
<> 144:ef7eb2e8f9f7 185 * @brief Gets the RTC time and stores it in the given time structure.
<> 144:ef7eb2e8f9f7 186 *
<> 144:ef7eb2e8f9f7 187 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 188 * @param datetime Pointer to structure where the date and time details are stored.
<> 144:ef7eb2e8f9f7 189 */
<> 144:ef7eb2e8f9f7 190 void RTC_GetDatetime(RTC_Type *base, rtc_datetime_t *datetime);
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /*!
<> 144:ef7eb2e8f9f7 193 * @brief Sets the RTC alarm time
<> 144:ef7eb2e8f9f7 194 *
<> 144:ef7eb2e8f9f7 195 * The function checks whether the specified alarm time is greater than the present
<> 144:ef7eb2e8f9f7 196 * time. If not, the function does not set the alarm and returns an error.
<> 144:ef7eb2e8f9f7 197 *
<> 144:ef7eb2e8f9f7 198 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 199 * @param alarmTime Pointer to structure where the alarm time is stored.
<> 144:ef7eb2e8f9f7 200 *
<> 144:ef7eb2e8f9f7 201 * @return kStatus_Success: success in setting the RTC alarm
<> 144:ef7eb2e8f9f7 202 * kStatus_InvalidArgument: Error because the alarm datetime format is incorrect
<> 144:ef7eb2e8f9f7 203 * kStatus_Fail: Error because the alarm time has already passed
<> 144:ef7eb2e8f9f7 204 */
<> 144:ef7eb2e8f9f7 205 status_t RTC_SetAlarm(RTC_Type *base, const rtc_datetime_t *alarmTime);
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /*!
<> 144:ef7eb2e8f9f7 208 * @brief Returns the RTC alarm time.
<> 144:ef7eb2e8f9f7 209 *
<> 144:ef7eb2e8f9f7 210 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 211 * @param datetime Pointer to structure where the alarm date and time details are stored.
<> 144:ef7eb2e8f9f7 212 */
<> 144:ef7eb2e8f9f7 213 void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime);
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 /*! @}*/
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /*!
<> 144:ef7eb2e8f9f7 218 * @name Interrupt Interface
<> 144:ef7eb2e8f9f7 219 * @{
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /*!
<> 144:ef7eb2e8f9f7 223 * @brief Enables the selected RTC interrupts.
<> 144:ef7eb2e8f9f7 224 *
<> 144:ef7eb2e8f9f7 225 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 226 * @param mask The interrupts to enable. This is a logical OR of members of the
<> 144:ef7eb2e8f9f7 227 * enumeration ::rtc_interrupt_enable_t
<> 144:ef7eb2e8f9f7 228 */
<> 144:ef7eb2e8f9f7 229 static inline void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 230 {
<> 144:ef7eb2e8f9f7 231 base->IER |= mask;
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /*!
<> 144:ef7eb2e8f9f7 235 * @brief Disables the selected RTC interrupts.
<> 144:ef7eb2e8f9f7 236 *
<> 144:ef7eb2e8f9f7 237 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 238 * @param mask The interrupts to enable. This is a logical OR of members of the
<> 144:ef7eb2e8f9f7 239 * enumeration ::rtc_interrupt_enable_t
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241 static inline void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 242 {
<> 144:ef7eb2e8f9f7 243 base->IER &= ~mask;
<> 144:ef7eb2e8f9f7 244 }
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /*!
<> 144:ef7eb2e8f9f7 247 * @brief Gets the enabled RTC interrupts.
<> 144:ef7eb2e8f9f7 248 *
<> 144:ef7eb2e8f9f7 249 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 250 *
<> 144:ef7eb2e8f9f7 251 * @return The enabled interrupts. This is the logical OR of members of the
<> 144:ef7eb2e8f9f7 252 * enumeration ::rtc_interrupt_enable_t
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254 static inline uint32_t RTC_GetEnabledInterrupts(RTC_Type *base)
<> 144:ef7eb2e8f9f7 255 {
<> 144:ef7eb2e8f9f7 256 return (base->IER & (RTC_IER_TIIE_MASK | RTC_IER_TOIE_MASK | RTC_IER_TAIE_MASK | RTC_IER_TSIE_MASK));
<> 144:ef7eb2e8f9f7 257 }
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /*! @}*/
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /*!
<> 144:ef7eb2e8f9f7 262 * @name Status Interface
<> 144:ef7eb2e8f9f7 263 * @{
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /*!
<> 144:ef7eb2e8f9f7 267 * @brief Gets the RTC status flags
<> 144:ef7eb2e8f9f7 268 *
<> 144:ef7eb2e8f9f7 269 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 270 *
<> 144:ef7eb2e8f9f7 271 * @return The status flags. This is the logical OR of members of the
<> 144:ef7eb2e8f9f7 272 * enumeration ::rtc_status_flags_t
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274 static inline uint32_t RTC_GetStatusFlags(RTC_Type *base)
<> 144:ef7eb2e8f9f7 275 {
<> 144:ef7eb2e8f9f7 276 return (base->SR & (RTC_SR_TIF_MASK | RTC_SR_TOF_MASK | RTC_SR_TAF_MASK));
<> 144:ef7eb2e8f9f7 277 }
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /*!
<> 144:ef7eb2e8f9f7 280 * @brief Clears the RTC status flags.
<> 144:ef7eb2e8f9f7 281 *
<> 144:ef7eb2e8f9f7 282 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 283 * @param mask The status flags to clear. This is a logical OR of members of the
<> 144:ef7eb2e8f9f7 284 * enumeration ::rtc_status_flags_t
<> 144:ef7eb2e8f9f7 285 */
<> 144:ef7eb2e8f9f7 286 void RTC_ClearStatusFlags(RTC_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /*! @}*/
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /*!
<> 144:ef7eb2e8f9f7 291 * @name Timer Start and Stop
<> 144:ef7eb2e8f9f7 292 * @{
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /*!
<> 144:ef7eb2e8f9f7 296 * @brief Starts the RTC time counter.
<> 144:ef7eb2e8f9f7 297 *
<> 144:ef7eb2e8f9f7 298 * After calling this function, the timer counter increments once a second provided SR[TOF] or
<> 144:ef7eb2e8f9f7 299 * SR[TIF] are not set.
<> 144:ef7eb2e8f9f7 300 *
<> 144:ef7eb2e8f9f7 301 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 302 */
<> 144:ef7eb2e8f9f7 303 static inline void RTC_StartTimer(RTC_Type *base)
<> 144:ef7eb2e8f9f7 304 {
<> 144:ef7eb2e8f9f7 305 base->SR |= RTC_SR_TCE_MASK;
<> 144:ef7eb2e8f9f7 306 }
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 /*!
<> 144:ef7eb2e8f9f7 309 * @brief Stops the RTC time counter.
<> 144:ef7eb2e8f9f7 310 *
<> 144:ef7eb2e8f9f7 311 * RTC's seconds register can be written to only when the timer is stopped.
<> 144:ef7eb2e8f9f7 312 *
<> 144:ef7eb2e8f9f7 313 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315 static inline void RTC_StopTimer(RTC_Type *base)
<> 144:ef7eb2e8f9f7 316 {
<> 144:ef7eb2e8f9f7 317 base->SR &= ~RTC_SR_TCE_MASK;
<> 144:ef7eb2e8f9f7 318 }
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /*! @}*/
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /*!
<> 144:ef7eb2e8f9f7 323 * @brief This function sets the specified capacitor configuration for the RTC oscillator.
<> 144:ef7eb2e8f9f7 324 *
<> 144:ef7eb2e8f9f7 325 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 326 * @param capLoad Oscillator loads to enable. This is a logical OR of members of the
<> 144:ef7eb2e8f9f7 327 * enumeration ::rtc_osc_cap_load_t
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329 static inline void RTC_SetOscCapLoad(RTC_Type *base, uint32_t capLoad)
<> 144:ef7eb2e8f9f7 330 {
<> 144:ef7eb2e8f9f7 331 uint32_t reg = base->CR;
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 reg &= ~(RTC_CR_SC2P_MASK | RTC_CR_SC4P_MASK | RTC_CR_SC8P_MASK | RTC_CR_SC16P_MASK);
<> 144:ef7eb2e8f9f7 334 reg |= capLoad;
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 base->CR = reg;
<> 144:ef7eb2e8f9f7 337 }
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /*!
<> 144:ef7eb2e8f9f7 340 * @brief Performs a software reset on the RTC module.
<> 144:ef7eb2e8f9f7 341 *
<> 144:ef7eb2e8f9f7 342 * This resets all RTC registers except for the SWR bit and the RTC_WAR and RTC_RAR
<> 144:ef7eb2e8f9f7 343 * registers. The SWR bit is cleared by software explicitly clearing it.
<> 144:ef7eb2e8f9f7 344 *
<> 144:ef7eb2e8f9f7 345 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347 static inline void RTC_Reset(RTC_Type *base)
<> 144:ef7eb2e8f9f7 348 {
<> 144:ef7eb2e8f9f7 349 base->CR |= RTC_CR_SWR_MASK;
<> 144:ef7eb2e8f9f7 350 base->CR &= ~RTC_CR_SWR_MASK;
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /* Set TSR register to 0x1 to avoid the timer invalid (TIF) bit being set in the SR register */
<> 144:ef7eb2e8f9f7 353 base->TSR = 1U;
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 #if defined(FSL_FEATURE_RTC_HAS_MONOTONIC) && (FSL_FEATURE_RTC_HAS_MONOTONIC)
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /*!
<> 144:ef7eb2e8f9f7 359 * @name Monotonic counter functions
<> 144:ef7eb2e8f9f7 360 * @{
<> 144:ef7eb2e8f9f7 361 */
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /*!
<> 144:ef7eb2e8f9f7 364 * @brief Reads the values of the Monotonic Counter High and Monotonic Counter Low and returns
<> 144:ef7eb2e8f9f7 365 * them as a single value.
<> 144:ef7eb2e8f9f7 366 *
<> 144:ef7eb2e8f9f7 367 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 368 * @param counter Pointer to variable where the value is stored.
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370 void RTC_GetMonotonicCounter(RTC_Type *base, uint64_t *counter);
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 /*!
<> 144:ef7eb2e8f9f7 373 * @brief Writes values Monotonic Counter High and Monotonic Counter Low by decomposing
<> 144:ef7eb2e8f9f7 374 * the given single value.
<> 144:ef7eb2e8f9f7 375 *
<> 144:ef7eb2e8f9f7 376 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 377 * @param counter Counter value
<> 144:ef7eb2e8f9f7 378 */
<> 144:ef7eb2e8f9f7 379 void RTC_SetMonotonicCounter(RTC_Type *base, uint64_t counter);
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 /*!
<> 144:ef7eb2e8f9f7 382 * @brief Increments the Monotonic Counter by one.
<> 144:ef7eb2e8f9f7 383 *
<> 144:ef7eb2e8f9f7 384 * Increments the Monotonic Counter (registers RTC_MCLR and RTC_MCHR accordingly) by setting
<> 144:ef7eb2e8f9f7 385 * the monotonic counter enable (MER[MCE]) and then writing to the RTC_MCLR register. A write to the
<> 144:ef7eb2e8f9f7 386 * monotonic counter low that causes it to overflow also increments the monotonic counter high.
<> 144:ef7eb2e8f9f7 387 *
<> 144:ef7eb2e8f9f7 388 * @param base RTC peripheral base address
<> 144:ef7eb2e8f9f7 389 *
<> 144:ef7eb2e8f9f7 390 * @return kStatus_Success: success
<> 144:ef7eb2e8f9f7 391 * kStatus_Fail: error occurred, either time invalid or monotonic overflow flag was found
<> 144:ef7eb2e8f9f7 392 */
<> 144:ef7eb2e8f9f7 393 status_t RTC_IncrementMonotonicCounter(RTC_Type *base);
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 /*! @}*/
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 #endif /* FSL_FEATURE_RTC_HAS_MONOTONIC */
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 400 }
<> 144:ef7eb2e8f9f7 401 #endif
<> 144:ef7eb2e8f9f7 402
<> 144:ef7eb2e8f9f7 403 /*! @}*/
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 #endif /* _FSL_RTC_H_ */