added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K66F/drivers/fsl_cmt.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 144:ef7eb2e8f9f7 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 144:ef7eb2e8f9f7 | 13 | * other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 144:ef7eb2e8f9f7 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 144:ef7eb2e8f9f7 | 17 | * software without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 18 | * |
<> | 144:ef7eb2e8f9f7 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | #ifndef _FSL_CMT_H_ |
<> | 144:ef7eb2e8f9f7 | 31 | #define _FSL_CMT_H_ |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | #include "fsl_common.h" |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | /*! |
<> | 144:ef7eb2e8f9f7 | 36 | * @addtogroup cmt |
<> | 144:ef7eb2e8f9f7 | 37 | * @{ |
<> | 144:ef7eb2e8f9f7 | 38 | */ |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | /*! @file */ |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 43 | * Definitions |
<> | 144:ef7eb2e8f9f7 | 44 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | /*! @name Driver version */ |
<> | 144:ef7eb2e8f9f7 | 47 | /*@{*/ |
<> | 144:ef7eb2e8f9f7 | 48 | /*! @brief CMT driver version 2.0.0. */ |
<> | 144:ef7eb2e8f9f7 | 49 | #define FSL_CMT_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) |
<> | 144:ef7eb2e8f9f7 | 50 | /*@}*/ |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | /*! |
<> | 144:ef7eb2e8f9f7 | 53 | * @brief The modes of CMT. |
<> | 144:ef7eb2e8f9f7 | 54 | */ |
<> | 144:ef7eb2e8f9f7 | 55 | typedef enum _cmt_mode |
<> | 144:ef7eb2e8f9f7 | 56 | { |
<> | 144:ef7eb2e8f9f7 | 57 | kCMT_DirectIROCtl = 0x00U, /*!< Carrier modulator is disabled and the IRO signal is directly in software control */ |
<> | 144:ef7eb2e8f9f7 | 58 | kCMT_TimeMode = 0x01U, /*!< Carrier modulator is enabled in time mode. */ |
<> | 144:ef7eb2e8f9f7 | 59 | kCMT_FSKMode = 0x05U, /*!< Carrier modulator is enabled in FSK mode. */ |
<> | 144:ef7eb2e8f9f7 | 60 | kCMT_BasebandMode = 0x09U /*!< Carrier modulator is enabled in baseband mode. */ |
<> | 144:ef7eb2e8f9f7 | 61 | } cmt_mode_t; |
<> | 144:ef7eb2e8f9f7 | 62 | |
<> | 144:ef7eb2e8f9f7 | 63 | /*! |
<> | 144:ef7eb2e8f9f7 | 64 | * @brief The CMT clock divide primary prescaler. |
<> | 144:ef7eb2e8f9f7 | 65 | * The primary clock divider is used to divider the bus clock to |
<> | 144:ef7eb2e8f9f7 | 66 | * get the intermediate frequency to approximately equal to 8 MHZ. |
<> | 144:ef7eb2e8f9f7 | 67 | * When the bus clock is 8 MHZ, set primary prescaler to "kCMT_PrimaryClkDiv1". |
<> | 144:ef7eb2e8f9f7 | 68 | */ |
<> | 144:ef7eb2e8f9f7 | 69 | typedef enum _cmt_primary_clkdiv |
<> | 144:ef7eb2e8f9f7 | 70 | { |
<> | 144:ef7eb2e8f9f7 | 71 | kCMT_PrimaryClkDiv1 = 0U, /*!< The intermediate frequency is the bus clock divided by 1. */ |
<> | 144:ef7eb2e8f9f7 | 72 | kCMT_PrimaryClkDiv2 = 1U, /*!< The intermediate frequency is the bus clock divided by 2. */ |
<> | 144:ef7eb2e8f9f7 | 73 | kCMT_PrimaryClkDiv3 = 2U, /*!< The intermediate frequency is the bus clock divided by 3. */ |
<> | 144:ef7eb2e8f9f7 | 74 | kCMT_PrimaryClkDiv4 = 3U, /*!< The intermediate frequency is the bus clock divided by 4. */ |
<> | 144:ef7eb2e8f9f7 | 75 | kCMT_PrimaryClkDiv5 = 4U, /*!< The intermediate frequency is the bus clock divided by 5. */ |
<> | 144:ef7eb2e8f9f7 | 76 | kCMT_PrimaryClkDiv6 = 5U, /*!< The intermediate frequency is the bus clock divided by 6. */ |
<> | 144:ef7eb2e8f9f7 | 77 | kCMT_PrimaryClkDiv7 = 6U, /*!< The intermediate frequency is the bus clock divided by 7. */ |
<> | 144:ef7eb2e8f9f7 | 78 | kCMT_PrimaryClkDiv8 = 7U, /*!< The intermediate frequency is the bus clock divided by 8. */ |
<> | 144:ef7eb2e8f9f7 | 79 | kCMT_PrimaryClkDiv9 = 8U, /*!< The intermediate frequency is the bus clock divided by 9. */ |
<> | 144:ef7eb2e8f9f7 | 80 | kCMT_PrimaryClkDiv10 = 9U, /*!< The intermediate frequency is the bus clock divided by 10. */ |
<> | 144:ef7eb2e8f9f7 | 81 | kCMT_PrimaryClkDiv11 = 10U, /*!< The intermediate frequency is the bus clock divided by 11. */ |
<> | 144:ef7eb2e8f9f7 | 82 | kCMT_PrimaryClkDiv12 = 11U, /*!< The intermediate frequency is the bus clock divided by 12. */ |
<> | 144:ef7eb2e8f9f7 | 83 | kCMT_PrimaryClkDiv13 = 12U, /*!< The intermediate frequency is the bus clock divided by 13. */ |
<> | 144:ef7eb2e8f9f7 | 84 | kCMT_PrimaryClkDiv14 = 13U, /*!< The intermediate frequency is the bus clock divided by 14. */ |
<> | 144:ef7eb2e8f9f7 | 85 | kCMT_PrimaryClkDiv15 = 14U, /*!< The intermediate frequency is the bus clock divided by 15. */ |
<> | 144:ef7eb2e8f9f7 | 86 | kCMT_PrimaryClkDiv16 = 15U /*!< The intermediate frequency is the bus clock divided by 16. */ |
<> | 144:ef7eb2e8f9f7 | 87 | } cmt_primary_clkdiv_t; |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | /*! |
<> | 144:ef7eb2e8f9f7 | 90 | * @brief The CMT clock divide secondary prescaler. |
<> | 144:ef7eb2e8f9f7 | 91 | * The second prescaler can be used to divide the 8 MHZ CMT clock |
<> | 144:ef7eb2e8f9f7 | 92 | * by 1, 2, 4, or 8 according to the specification. |
<> | 144:ef7eb2e8f9f7 | 93 | */ |
<> | 144:ef7eb2e8f9f7 | 94 | typedef enum _cmt_second_clkdiv |
<> | 144:ef7eb2e8f9f7 | 95 | { |
<> | 144:ef7eb2e8f9f7 | 96 | kCMT_SecondClkDiv1 = 0U, /*!< The CMT clock is the intermediate frequency frequency divided by 1. */ |
<> | 144:ef7eb2e8f9f7 | 97 | kCMT_SecondClkDiv2 = 1U, /*!< The CMT clock is the intermediate frequency frequency divided by 2. */ |
<> | 144:ef7eb2e8f9f7 | 98 | kCMT_SecondClkDiv4 = 2U, /*!< The CMT clock is the intermediate frequency frequency divided by 4. */ |
<> | 144:ef7eb2e8f9f7 | 99 | kCMT_SecondClkDiv8 = 3U /*!< The CMT clock is the intermediate frequency frequency divided by 8. */ |
<> | 144:ef7eb2e8f9f7 | 100 | } cmt_second_clkdiv_t; |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | /*! |
<> | 144:ef7eb2e8f9f7 | 103 | * @brief The CMT infrared output polarity. |
<> | 144:ef7eb2e8f9f7 | 104 | */ |
<> | 144:ef7eb2e8f9f7 | 105 | typedef enum _cmt_infrared_output_polarity |
<> | 144:ef7eb2e8f9f7 | 106 | { |
<> | 144:ef7eb2e8f9f7 | 107 | kCMT_IROActiveLow = 0U, /*!< The CMT infrared output signal polarity is active-low. */ |
<> | 144:ef7eb2e8f9f7 | 108 | kCMT_IROActiveHigh = 1U /*!< The CMT infrared output signal polarity is active-high. */ |
<> | 144:ef7eb2e8f9f7 | 109 | } cmt_infrared_output_polarity_t; |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | /*! |
<> | 144:ef7eb2e8f9f7 | 112 | * @brief The CMT infrared output signal state control. |
<> | 144:ef7eb2e8f9f7 | 113 | */ |
<> | 144:ef7eb2e8f9f7 | 114 | typedef enum _cmt_infrared_output_state |
<> | 144:ef7eb2e8f9f7 | 115 | { |
<> | 144:ef7eb2e8f9f7 | 116 | kCMT_IROCtlLow = 0U, /*!< The CMT Infrared output signal state is controlled to low. */ |
<> | 144:ef7eb2e8f9f7 | 117 | kCMT_IROCtlHigh = 1U /*!< The CMT Infrared output signal state is controlled to high. */ |
<> | 144:ef7eb2e8f9f7 | 118 | } cmt_infrared_output_state_t; |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | /*! |
<> | 144:ef7eb2e8f9f7 | 121 | * @brief CMT interrupt configuration structure, default settings all disabled. |
<> | 144:ef7eb2e8f9f7 | 122 | * |
<> | 144:ef7eb2e8f9f7 | 123 | * This structure contains the settings for all of the CMT interrupt configurations. |
<> | 144:ef7eb2e8f9f7 | 124 | */ |
<> | 144:ef7eb2e8f9f7 | 125 | enum _cmt_interrupt_enable |
<> | 144:ef7eb2e8f9f7 | 126 | { |
<> | 144:ef7eb2e8f9f7 | 127 | kCMT_EndOfCycleInterruptEnable = CMT_MSC_EOCIE_MASK, /*!< CMT end of cycle interrupt. */ |
<> | 144:ef7eb2e8f9f7 | 128 | }; |
<> | 144:ef7eb2e8f9f7 | 129 | |
<> | 144:ef7eb2e8f9f7 | 130 | /*! |
<> | 144:ef7eb2e8f9f7 | 131 | * @brief CMT carrier generator and modulator configure structure |
<> | 144:ef7eb2e8f9f7 | 132 | * |
<> | 144:ef7eb2e8f9f7 | 133 | */ |
<> | 144:ef7eb2e8f9f7 | 134 | typedef struct _cmt_modulate_config |
<> | 144:ef7eb2e8f9f7 | 135 | { |
<> | 144:ef7eb2e8f9f7 | 136 | uint8_t highCount1; /*!< The high time for carrier generator first register. */ |
<> | 144:ef7eb2e8f9f7 | 137 | uint8_t lowCount1; /*!< The low time for carrier generator first register. */ |
<> | 144:ef7eb2e8f9f7 | 138 | uint8_t highCount2; /*!< The high time for carrier generator second register for FSK mode. */ |
<> | 144:ef7eb2e8f9f7 | 139 | uint8_t lowCount2; /*!< The low time for carrier generator second register for FSK mode. */ |
<> | 144:ef7eb2e8f9f7 | 140 | uint16_t markCount; /*!< The mark time for the modulator gate. */ |
<> | 144:ef7eb2e8f9f7 | 141 | uint16_t spaceCount; /*!< The space time for the modulator gate. */ |
<> | 144:ef7eb2e8f9f7 | 142 | } cmt_modulate_config_t; |
<> | 144:ef7eb2e8f9f7 | 143 | |
<> | 144:ef7eb2e8f9f7 | 144 | /*! @brief CMT basic configuration structure. */ |
<> | 144:ef7eb2e8f9f7 | 145 | typedef struct _cmt_config |
<> | 144:ef7eb2e8f9f7 | 146 | { |
<> | 144:ef7eb2e8f9f7 | 147 | bool isInterruptEnabled; /*!< Timer interrupt 0-disable, 1-enable. */ |
<> | 144:ef7eb2e8f9f7 | 148 | bool isIroEnabled; /*!< The IRO output 0-disabled, 1-enabled. */ |
<> | 144:ef7eb2e8f9f7 | 149 | cmt_infrared_output_polarity_t iroPolarity; /*!< The IRO polarity. */ |
<> | 144:ef7eb2e8f9f7 | 150 | cmt_second_clkdiv_t divider; /*!< The CMT clock divide prescaler. */ |
<> | 144:ef7eb2e8f9f7 | 151 | } cmt_config_t; |
<> | 144:ef7eb2e8f9f7 | 152 | |
<> | 144:ef7eb2e8f9f7 | 153 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 154 | * API |
<> | 144:ef7eb2e8f9f7 | 155 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | #if defined(__cplusplus) |
<> | 144:ef7eb2e8f9f7 | 158 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 159 | #endif |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | /*! |
<> | 144:ef7eb2e8f9f7 | 162 | * @name Initialization and deinitialization |
<> | 144:ef7eb2e8f9f7 | 163 | * @{ |
<> | 144:ef7eb2e8f9f7 | 164 | */ |
<> | 144:ef7eb2e8f9f7 | 165 | |
<> | 144:ef7eb2e8f9f7 | 166 | /*! |
<> | 144:ef7eb2e8f9f7 | 167 | * @brief Gets the CMT default configuration structure. The purpose |
<> | 144:ef7eb2e8f9f7 | 168 | * of this API is to get the default configuration structure for the CMT_Init(). |
<> | 144:ef7eb2e8f9f7 | 169 | * Use the initialized structure unchanged in CMT_Init(), or modify |
<> | 144:ef7eb2e8f9f7 | 170 | * some fields of the structure before calling the CMT_Init(). |
<> | 144:ef7eb2e8f9f7 | 171 | * |
<> | 144:ef7eb2e8f9f7 | 172 | * @param config The CMT configuration structure pointer. |
<> | 144:ef7eb2e8f9f7 | 173 | */ |
<> | 144:ef7eb2e8f9f7 | 174 | void CMT_GetDefaultConfig(cmt_config_t *config); |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | /*! |
<> | 144:ef7eb2e8f9f7 | 177 | * @brief Initializes the CMT module. |
<> | 144:ef7eb2e8f9f7 | 178 | * |
<> | 144:ef7eb2e8f9f7 | 179 | * This function ungates the module clock and sets the CMT internal clock, |
<> | 144:ef7eb2e8f9f7 | 180 | * interrupt, and infrared output signal for the CMT module. |
<> | 144:ef7eb2e8f9f7 | 181 | * |
<> | 144:ef7eb2e8f9f7 | 182 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 183 | * @param config The CMT basic configuration structure. |
<> | 144:ef7eb2e8f9f7 | 184 | * @param busClock_Hz The CMT module input clock - bus clock frequency. |
<> | 144:ef7eb2e8f9f7 | 185 | */ |
<> | 144:ef7eb2e8f9f7 | 186 | void CMT_Init(CMT_Type *base, const cmt_config_t *config, uint32_t busClock_Hz); |
<> | 144:ef7eb2e8f9f7 | 187 | |
<> | 144:ef7eb2e8f9f7 | 188 | /*! |
<> | 144:ef7eb2e8f9f7 | 189 | * @brief Disables the CMT module and gate control. |
<> | 144:ef7eb2e8f9f7 | 190 | * |
<> | 144:ef7eb2e8f9f7 | 191 | * This function disables CMT modulator, interrupts, and gates the |
<> | 144:ef7eb2e8f9f7 | 192 | * CMT clock control. CMT_Init must be called to use the CMT again. |
<> | 144:ef7eb2e8f9f7 | 193 | * |
<> | 144:ef7eb2e8f9f7 | 194 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 195 | */ |
<> | 144:ef7eb2e8f9f7 | 196 | void CMT_Deinit(CMT_Type *base); |
<> | 144:ef7eb2e8f9f7 | 197 | |
<> | 144:ef7eb2e8f9f7 | 198 | /*! @}*/ |
<> | 144:ef7eb2e8f9f7 | 199 | |
<> | 144:ef7eb2e8f9f7 | 200 | /*! |
<> | 144:ef7eb2e8f9f7 | 201 | * @name Basic Control Operations |
<> | 144:ef7eb2e8f9f7 | 202 | * @{ |
<> | 144:ef7eb2e8f9f7 | 203 | */ |
<> | 144:ef7eb2e8f9f7 | 204 | |
<> | 144:ef7eb2e8f9f7 | 205 | /*! |
<> | 144:ef7eb2e8f9f7 | 206 | * @brief Selects the mode for CMT. |
<> | 144:ef7eb2e8f9f7 | 207 | * |
<> | 144:ef7eb2e8f9f7 | 208 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 209 | * @param mode The CMT feature mode enumeration. See "cmt_mode_t". |
<> | 144:ef7eb2e8f9f7 | 210 | * @param modulateConfig The carrier generation and modulator configuration. |
<> | 144:ef7eb2e8f9f7 | 211 | */ |
<> | 144:ef7eb2e8f9f7 | 212 | void CMT_SetMode(CMT_Type *base, cmt_mode_t mode, cmt_modulate_config_t *modulateConfig); |
<> | 144:ef7eb2e8f9f7 | 213 | |
<> | 144:ef7eb2e8f9f7 | 214 | /*! |
<> | 144:ef7eb2e8f9f7 | 215 | * @brief Gets the mode of the CMT module. |
<> | 144:ef7eb2e8f9f7 | 216 | * |
<> | 144:ef7eb2e8f9f7 | 217 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 218 | * @return The CMT mode. |
<> | 144:ef7eb2e8f9f7 | 219 | * kCMT_DirectIROCtl Carrier modulator is disabled, the IRO signal is directly in software control. |
<> | 144:ef7eb2e8f9f7 | 220 | * kCMT_TimeMode Carrier modulator is enabled in time mode. |
<> | 144:ef7eb2e8f9f7 | 221 | * kCMT_FSKMode Carrier modulator is enabled in FSK mode. |
<> | 144:ef7eb2e8f9f7 | 222 | * kCMT_BasebandMode Carrier modulator is enabled in baseband mode. |
<> | 144:ef7eb2e8f9f7 | 223 | */ |
<> | 144:ef7eb2e8f9f7 | 224 | cmt_mode_t CMT_GetMode(CMT_Type *base); |
<> | 144:ef7eb2e8f9f7 | 225 | |
<> | 144:ef7eb2e8f9f7 | 226 | /*! |
<> | 144:ef7eb2e8f9f7 | 227 | * @brief Gets the actual CMT clock frequency. |
<> | 144:ef7eb2e8f9f7 | 228 | * |
<> | 144:ef7eb2e8f9f7 | 229 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 230 | * @param busClock_Hz CMT module input clock - bus clock frequency. |
<> | 144:ef7eb2e8f9f7 | 231 | * @return The CMT clock frequency. |
<> | 144:ef7eb2e8f9f7 | 232 | */ |
<> | 144:ef7eb2e8f9f7 | 233 | uint32_t CMT_GetCMTFrequency(CMT_Type *base, uint32_t busClock_Hz); |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | /*! |
<> | 144:ef7eb2e8f9f7 | 236 | * @brief Sets the primary data set for the CMT carrier generator counter. |
<> | 144:ef7eb2e8f9f7 | 237 | * |
<> | 144:ef7eb2e8f9f7 | 238 | * This function sets the high time and low time of the primary data set for the |
<> | 144:ef7eb2e8f9f7 | 239 | * CMT carrier generator counter to control the period and the duty cycle of the |
<> | 144:ef7eb2e8f9f7 | 240 | * output carrier signal. |
<> | 144:ef7eb2e8f9f7 | 241 | * If the CMT clock period is Tcmt, The period of the carrier generator signal equals |
<> | 144:ef7eb2e8f9f7 | 242 | * (highCount + lowCount) * Tcmt. The duty cycle equals highCount / (highCount + lowCount). |
<> | 144:ef7eb2e8f9f7 | 243 | * |
<> | 144:ef7eb2e8f9f7 | 244 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 245 | * @param highCount The number of CMT clocks for carrier generator signal high time, |
<> | 144:ef7eb2e8f9f7 | 246 | * integer in the range of 1 ~ 0xFF. |
<> | 144:ef7eb2e8f9f7 | 247 | * @param lowCount The number of CMT clocks for carrier generator signal low time, |
<> | 144:ef7eb2e8f9f7 | 248 | * integer in the range of 1 ~ 0xFF. |
<> | 144:ef7eb2e8f9f7 | 249 | */ |
<> | 144:ef7eb2e8f9f7 | 250 | static inline void CMT_SetCarrirGenerateCountOne(CMT_Type *base, uint32_t highCount, uint32_t lowCount) |
<> | 144:ef7eb2e8f9f7 | 251 | { |
<> | 144:ef7eb2e8f9f7 | 252 | assert(highCount <= CMT_CGH1_PH_MASK); |
<> | 144:ef7eb2e8f9f7 | 253 | assert(highCount); |
<> | 144:ef7eb2e8f9f7 | 254 | assert(lowCount <= CMT_CGL1_PL_MASK); |
<> | 144:ef7eb2e8f9f7 | 255 | assert(lowCount); |
<> | 144:ef7eb2e8f9f7 | 256 | |
<> | 144:ef7eb2e8f9f7 | 257 | base->CGH1 = highCount; |
<> | 144:ef7eb2e8f9f7 | 258 | base->CGL1 = lowCount; |
<> | 144:ef7eb2e8f9f7 | 259 | } |
<> | 144:ef7eb2e8f9f7 | 260 | |
<> | 144:ef7eb2e8f9f7 | 261 | /*! |
<> | 144:ef7eb2e8f9f7 | 262 | * @brief Sets the secondary data set for the CMT carrier generator counter. |
<> | 144:ef7eb2e8f9f7 | 263 | * |
<> | 144:ef7eb2e8f9f7 | 264 | * This function is used for FSK mode setting the high time and low time of the secondary |
<> | 144:ef7eb2e8f9f7 | 265 | * data set CMT carrier generator counter to control the period and the duty cycle |
<> | 144:ef7eb2e8f9f7 | 266 | * of the output carrier signal. |
<> | 144:ef7eb2e8f9f7 | 267 | * If the CMT clock period is Tcmt, The period of the carrier generator signal equals |
<> | 144:ef7eb2e8f9f7 | 268 | * (highCount + lowCount) * Tcmt. The duty cycle equals highCount / (highCount + lowCount). |
<> | 144:ef7eb2e8f9f7 | 269 | * |
<> | 144:ef7eb2e8f9f7 | 270 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 271 | * @param highCount The number of CMT clocks for carrier generator signal high time, |
<> | 144:ef7eb2e8f9f7 | 272 | * integer in the range of 1 ~ 0xFF. |
<> | 144:ef7eb2e8f9f7 | 273 | * @param lowCount The number of CMT clocks for carrier generator signal low time, |
<> | 144:ef7eb2e8f9f7 | 274 | * integer in the range of 1 ~ 0xFF. |
<> | 144:ef7eb2e8f9f7 | 275 | */ |
<> | 144:ef7eb2e8f9f7 | 276 | static inline void CMT_SetCarrirGenerateCountTwo(CMT_Type *base, uint32_t highCount, uint32_t lowCount) |
<> | 144:ef7eb2e8f9f7 | 277 | { |
<> | 144:ef7eb2e8f9f7 | 278 | assert(highCount <= CMT_CGH2_SH_MASK); |
<> | 144:ef7eb2e8f9f7 | 279 | assert(highCount); |
<> | 144:ef7eb2e8f9f7 | 280 | assert(lowCount <= CMT_CGL2_SL_MASK); |
<> | 144:ef7eb2e8f9f7 | 281 | assert(lowCount); |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | base->CGH2 = highCount; |
<> | 144:ef7eb2e8f9f7 | 284 | base->CGL2 = lowCount; |
<> | 144:ef7eb2e8f9f7 | 285 | } |
<> | 144:ef7eb2e8f9f7 | 286 | |
<> | 144:ef7eb2e8f9f7 | 287 | /*! |
<> | 144:ef7eb2e8f9f7 | 288 | * @brief Sets the modulation mark and space time period for the CMT modulator. |
<> | 144:ef7eb2e8f9f7 | 289 | * |
<> | 144:ef7eb2e8f9f7 | 290 | * This function sets the mark time period of the CMT modulator counter |
<> | 144:ef7eb2e8f9f7 | 291 | * to control the mark time of the output modulated signal from the carrier generator output signal. |
<> | 144:ef7eb2e8f9f7 | 292 | * If the CMT clock frequency is Fcmt and the carrier out signal frequency is fcg: |
<> | 144:ef7eb2e8f9f7 | 293 | * - In Time and Baseband mode: The mark period of the generated signal equals (markCount + 1) / (Fcmt/8). |
<> | 144:ef7eb2e8f9f7 | 294 | * The space period of the generated signal equals spaceCount / (Fcmt/8). |
<> | 144:ef7eb2e8f9f7 | 295 | * - In FSK mode: The mark period of the generated signal equals (markCount + 1)/fcg. |
<> | 144:ef7eb2e8f9f7 | 296 | * The space period of the generated signal equals spaceCount / fcg. |
<> | 144:ef7eb2e8f9f7 | 297 | * |
<> | 144:ef7eb2e8f9f7 | 298 | * @param base Base address for current CMT instance. |
<> | 144:ef7eb2e8f9f7 | 299 | * @param markCount The number of clock period for CMT modulator signal mark period, |
<> | 144:ef7eb2e8f9f7 | 300 | * in the range of 0 ~ 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 301 | * @param spaceCount The number of clock period for CMT modulator signal space period, |
<> | 144:ef7eb2e8f9f7 | 302 | * in the range of the 0 ~ 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 303 | */ |
<> | 144:ef7eb2e8f9f7 | 304 | void CMT_SetModulateMarkSpace(CMT_Type *base, uint32_t markCount, uint32_t spaceCount); |
<> | 144:ef7eb2e8f9f7 | 305 | |
<> | 144:ef7eb2e8f9f7 | 306 | /*! |
<> | 144:ef7eb2e8f9f7 | 307 | * @brief Enables or disables the extended space operation. |
<> | 144:ef7eb2e8f9f7 | 308 | * |
<> | 144:ef7eb2e8f9f7 | 309 | * This function is used to make the space period longer |
<> | 144:ef7eb2e8f9f7 | 310 | * for time, baseband, and FSK modes. |
<> | 144:ef7eb2e8f9f7 | 311 | * |
<> | 144:ef7eb2e8f9f7 | 312 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 313 | * @param enable True enable the extended space, false disable the extended space. |
<> | 144:ef7eb2e8f9f7 | 314 | */ |
<> | 144:ef7eb2e8f9f7 | 315 | static inline void CMT_EnableExtendedSpace(CMT_Type *base, bool enable) |
<> | 144:ef7eb2e8f9f7 | 316 | { |
<> | 144:ef7eb2e8f9f7 | 317 | if (enable) |
<> | 144:ef7eb2e8f9f7 | 318 | { |
<> | 144:ef7eb2e8f9f7 | 319 | base->MSC |= CMT_MSC_EXSPC_MASK; |
<> | 144:ef7eb2e8f9f7 | 320 | } |
<> | 144:ef7eb2e8f9f7 | 321 | else |
<> | 144:ef7eb2e8f9f7 | 322 | { |
<> | 144:ef7eb2e8f9f7 | 323 | base->MSC &= ~CMT_MSC_EXSPC_MASK; |
<> | 144:ef7eb2e8f9f7 | 324 | } |
<> | 144:ef7eb2e8f9f7 | 325 | } |
<> | 144:ef7eb2e8f9f7 | 326 | |
<> | 144:ef7eb2e8f9f7 | 327 | /*! |
<> | 144:ef7eb2e8f9f7 | 328 | * @brief Sets IRO - infrared output signal state. |
<> | 144:ef7eb2e8f9f7 | 329 | * |
<> | 144:ef7eb2e8f9f7 | 330 | * Changes the states of the IRO signal when the kCMT_DirectIROMode mode is set |
<> | 144:ef7eb2e8f9f7 | 331 | * and the IRO signal is enabled. |
<> | 144:ef7eb2e8f9f7 | 332 | * |
<> | 144:ef7eb2e8f9f7 | 333 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 334 | * @param state The control of the IRO signal. See "cmt_infrared_output_state_t" |
<> | 144:ef7eb2e8f9f7 | 335 | */ |
<> | 144:ef7eb2e8f9f7 | 336 | void CMT_SetIroState(CMT_Type *base, cmt_infrared_output_state_t state); |
<> | 144:ef7eb2e8f9f7 | 337 | |
<> | 144:ef7eb2e8f9f7 | 338 | /*! |
<> | 144:ef7eb2e8f9f7 | 339 | * @brief Enables the CMT interrupt. |
<> | 144:ef7eb2e8f9f7 | 340 | * |
<> | 144:ef7eb2e8f9f7 | 341 | * This function enables the CMT interrupts according to the provided maskIf enabled. |
<> | 144:ef7eb2e8f9f7 | 342 | * The CMT only has the end of the cycle interrupt - an interrupt occurs at the end |
<> | 144:ef7eb2e8f9f7 | 343 | * of the modulator cycle. This interrupt provides a means for the user |
<> | 144:ef7eb2e8f9f7 | 344 | * to reload the new mark/space values into the CMT modulator data registers |
<> | 144:ef7eb2e8f9f7 | 345 | * and verify the modulator mark and space. |
<> | 144:ef7eb2e8f9f7 | 346 | * For example, to enable the end of cycle, do the following: |
<> | 144:ef7eb2e8f9f7 | 347 | * @code |
<> | 144:ef7eb2e8f9f7 | 348 | * CMT_EnableInterrupts(CMT, kCMT_EndOfCycleInterruptEnable); |
<> | 144:ef7eb2e8f9f7 | 349 | * @endcode |
<> | 144:ef7eb2e8f9f7 | 350 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 351 | * @param mask The interrupts to enable. Logical OR of @ref _cmt_interrupt_enable. |
<> | 144:ef7eb2e8f9f7 | 352 | */ |
<> | 144:ef7eb2e8f9f7 | 353 | static inline void CMT_EnableInterrupts(CMT_Type *base, uint32_t mask) |
<> | 144:ef7eb2e8f9f7 | 354 | { |
<> | 144:ef7eb2e8f9f7 | 355 | base->MSC |= mask; |
<> | 144:ef7eb2e8f9f7 | 356 | } |
<> | 144:ef7eb2e8f9f7 | 357 | |
<> | 144:ef7eb2e8f9f7 | 358 | /*! |
<> | 144:ef7eb2e8f9f7 | 359 | * @brief Disables the CMT interrupt. |
<> | 144:ef7eb2e8f9f7 | 360 | * |
<> | 144:ef7eb2e8f9f7 | 361 | * This function disables the CMT interrupts according to the provided maskIf enabled. |
<> | 144:ef7eb2e8f9f7 | 362 | * The CMT only has the end of the cycle interrupt. |
<> | 144:ef7eb2e8f9f7 | 363 | * For example, to disable the end of cycle, do the following: |
<> | 144:ef7eb2e8f9f7 | 364 | * @code |
<> | 144:ef7eb2e8f9f7 | 365 | * CMT_DisableInterrupts(CMT, kCMT_EndOfCycleInterruptEnable); |
<> | 144:ef7eb2e8f9f7 | 366 | * @endcode |
<> | 144:ef7eb2e8f9f7 | 367 | * |
<> | 144:ef7eb2e8f9f7 | 368 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 369 | * @param mask The interrupts to enable. Logical OR of @ref _cmt_interrupt_enable. |
<> | 144:ef7eb2e8f9f7 | 370 | */ |
<> | 144:ef7eb2e8f9f7 | 371 | static inline void CMT_DisableInterrupts(CMT_Type *base, uint32_t mask) |
<> | 144:ef7eb2e8f9f7 | 372 | { |
<> | 144:ef7eb2e8f9f7 | 373 | base->MSC &= ~mask; |
<> | 144:ef7eb2e8f9f7 | 374 | } |
<> | 144:ef7eb2e8f9f7 | 375 | |
<> | 144:ef7eb2e8f9f7 | 376 | /*! |
<> | 144:ef7eb2e8f9f7 | 377 | * @brief Gets the end of the cycle status flag. |
<> | 144:ef7eb2e8f9f7 | 378 | * |
<> | 144:ef7eb2e8f9f7 | 379 | * The flag is set: |
<> | 144:ef7eb2e8f9f7 | 380 | * - When the modulator is not currently active and carrier and modulator |
<> | 144:ef7eb2e8f9f7 | 381 | * are set to start the initial CMT transmission. |
<> | 144:ef7eb2e8f9f7 | 382 | * - At the end of each modulation cycle when the counter is reloaded and |
<> | 144:ef7eb2e8f9f7 | 383 | * the carrier and modulator are enabled. |
<> | 144:ef7eb2e8f9f7 | 384 | * @param base CMT peripheral base address. |
<> | 144:ef7eb2e8f9f7 | 385 | * @return Current status of the end of cycle status flag |
<> | 144:ef7eb2e8f9f7 | 386 | * @arg non-zero: End-of-cycle has occurred. |
<> | 144:ef7eb2e8f9f7 | 387 | * @arg zero: End-of-cycle has not yet occurred since the flag last cleared. |
<> | 144:ef7eb2e8f9f7 | 388 | */ |
<> | 144:ef7eb2e8f9f7 | 389 | static inline uint32_t CMT_GetStatusFlags(CMT_Type *base) |
<> | 144:ef7eb2e8f9f7 | 390 | { |
<> | 144:ef7eb2e8f9f7 | 391 | return base->MSC & CMT_MSC_EOCF_MASK; |
<> | 144:ef7eb2e8f9f7 | 392 | } |
<> | 144:ef7eb2e8f9f7 | 393 | |
<> | 144:ef7eb2e8f9f7 | 394 | /*! @}*/ |
<> | 144:ef7eb2e8f9f7 | 395 | |
<> | 144:ef7eb2e8f9f7 | 396 | #if defined(__cplusplus) |
<> | 144:ef7eb2e8f9f7 | 397 | } |
<> | 144:ef7eb2e8f9f7 | 398 | #endif |
<> | 144:ef7eb2e8f9f7 | 399 | |
<> | 144:ef7eb2e8f9f7 | 400 | /*! @}*/ |
<> | 144:ef7eb2e8f9f7 | 401 | |
<> | 144:ef7eb2e8f9f7 | 402 | #endif /* _FSL_CMT_H_*/ |