Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/pl310.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file pl310.h
<> 144:ef7eb2e8f9f7 3 * @brief Implementation of pl310 functions
<> 144:ef7eb2e8f9f7 4 * @version
<> 144:ef7eb2e8f9f7 5 * @date 11 June 2013
<> 144:ef7eb2e8f9f7 6 *
<> 144:ef7eb2e8f9f7 7 * @note
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 ******************************************************************************/
<> 144:ef7eb2e8f9f7 10 /* Copyright (c) 2011 - 2013 ARM LIMITED
<> 144:ef7eb2e8f9f7 11
<> 144:ef7eb2e8f9f7 12 All rights reserved.
<> 144:ef7eb2e8f9f7 13 Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 14 modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 - Redistributions of source code must retain the above copyright
<> 144:ef7eb2e8f9f7 16 notice, this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 - Redistributions in binary form must reproduce the above copyright
<> 144:ef7eb2e8f9f7 18 notice, this list of conditions and the following disclaimer in the
<> 144:ef7eb2e8f9f7 19 documentation and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 - Neither the name of ARM nor the names of its contributors may be used
<> 144:ef7eb2e8f9f7 21 to endorse or promote products derived from this software without
<> 144:ef7eb2e8f9f7 22 specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
<> 144:ef7eb2e8f9f7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
<> 144:ef7eb2e8f9f7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
<> 144:ef7eb2e8f9f7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
<> 144:ef7eb2e8f9f7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
<> 144:ef7eb2e8f9f7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
<> 144:ef7eb2e8f9f7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
<> 144:ef7eb2e8f9f7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
<> 144:ef7eb2e8f9f7 34 POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 35 ---------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #ifndef __PL310
<> 144:ef7eb2e8f9f7 38 #define __PL310
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 typedef struct
<> 144:ef7eb2e8f9f7 41 {
<> 144:ef7eb2e8f9f7 42 __I uint32_t CACHE_ID; /*!< Offset: 0x0000 Cache ID Register */
<> 144:ef7eb2e8f9f7 43 __I uint32_t CACHE_TYPE; /*!< Offset: 0x0004 Cache Type Register */
<> 144:ef7eb2e8f9f7 44 uint32_t RESERVED0[0x3e];
<> 144:ef7eb2e8f9f7 45 __IO uint32_t CONTROL; /*!< Offset: 0x0100 Control Register */
<> 144:ef7eb2e8f9f7 46 __IO uint32_t AUX_CNT; /*!< Offset: 0x0104 Auxiliary Control */
<> 144:ef7eb2e8f9f7 47 uint32_t RESERVED1[0x3e];
<> 144:ef7eb2e8f9f7 48 __IO uint32_t EVENT_CONTROL; /*!< Offset: 0x0200 Event Counter Control */
<> 144:ef7eb2e8f9f7 49 __IO uint32_t EVENT_COUNTER1_CONF; /*!< Offset: 0x0204 Event Counter 1 Configuration */
<> 144:ef7eb2e8f9f7 50 __IO uint32_t EVENT_COUNTER0_CONF; /*!< Offset: 0x0208 Event Counter 1 Configuration */
<> 144:ef7eb2e8f9f7 51 uint32_t RESERVED2[0x2];
<> 144:ef7eb2e8f9f7 52 __IO uint32_t INTERRUPT_MASK; /*!< Offset: 0x0214 Interrupt Mask */
<> 144:ef7eb2e8f9f7 53 __I uint32_t MASKED_INT_STATUS; /*!< Offset: 0x0218 Masked Interrupt Status */
<> 144:ef7eb2e8f9f7 54 __I uint32_t RAW_INT_STATUS; /*!< Offset: 0x021c Raw Interrupt Status */
<> 144:ef7eb2e8f9f7 55 __O uint32_t INTERRUPT_CLEAR; /*!< Offset: 0x0220 Interrupt Clear */
<> 144:ef7eb2e8f9f7 56 uint32_t RESERVED3[0x143];
<> 144:ef7eb2e8f9f7 57 __IO uint32_t CACHE_SYNC; /*!< Offset: 0x0730 Cache Sync */
<> 144:ef7eb2e8f9f7 58 uint32_t RESERVED4[0xf];
<> 144:ef7eb2e8f9f7 59 __IO uint32_t INV_LINE_PA; /*!< Offset: 0x0770 Invalidate Line By PA */
<> 144:ef7eb2e8f9f7 60 uint32_t RESERVED6[2];
<> 144:ef7eb2e8f9f7 61 __IO uint32_t INV_WAY; /*!< Offset: 0x077c Invalidate by Way */
<> 144:ef7eb2e8f9f7 62 uint32_t RESERVED5[0xc];
<> 144:ef7eb2e8f9f7 63 __IO uint32_t CLEAN_LINE_PA; /*!< Offset: 0x07b0 Clean Line by PA */
<> 144:ef7eb2e8f9f7 64 uint32_t RESERVED7[1];
<> 144:ef7eb2e8f9f7 65 __IO uint32_t CLEAN_LINE_INDEX_WAY; /*!< Offset: 0x07b8 Clean Line by Index/Way */
<> 144:ef7eb2e8f9f7 66 __IO uint32_t CLEAN_WAY; /*!< Offset: 0x07bc Clean by Way */
<> 144:ef7eb2e8f9f7 67 uint32_t RESERVED8[0xc];
<> 144:ef7eb2e8f9f7 68 __IO uint32_t CLEAN_INV_LINE_PA; /*!< Offset: 0x07f0 Clean and Invalidate Line by PA */
<> 144:ef7eb2e8f9f7 69 uint32_t RESERVED9[1];
<> 144:ef7eb2e8f9f7 70 __IO uint32_t CLEAN_INV_LINE_INDEX_WAY; /*!< Offset: 0x07f8 Clean and Invalidate Line by Index/Way */
<> 144:ef7eb2e8f9f7 71 __IO uint32_t CLEAN_INV_WAY; /*!< Offset: 0x07fc Clean and Invalidate by Way */
<> 144:ef7eb2e8f9f7 72 uint32_t RESERVED10[0x40];
<> 144:ef7eb2e8f9f7 73 __IO uint32_t DATA_LOCK_0_WAY; /*!< Offset: 0x0900 Data Lockdown 0 by Way */
<> 144:ef7eb2e8f9f7 74 __IO uint32_t INST_LOCK_0_WAY; /*!< Offset: 0x0904 Instruction Lockdown 0 by Way */
<> 144:ef7eb2e8f9f7 75 __IO uint32_t DATA_LOCK_1_WAY; /*!< Offset: 0x0908 Data Lockdown 1 by Way */
<> 144:ef7eb2e8f9f7 76 __IO uint32_t INST_LOCK_1_WAY; /*!< Offset: 0x090c Instruction Lockdown 1 by Way */
<> 144:ef7eb2e8f9f7 77 __IO uint32_t DATA_LOCK_2_WAY; /*!< Offset: 0x0910 Data Lockdown 2 by Way */
<> 144:ef7eb2e8f9f7 78 __IO uint32_t INST_LOCK_2_WAY; /*!< Offset: 0x0914 Instruction Lockdown 2 by Way */
<> 144:ef7eb2e8f9f7 79 __IO uint32_t DATA_LOCK_3_WAY; /*!< Offset: 0x0918 Data Lockdown 3 by Way */
<> 144:ef7eb2e8f9f7 80 __IO uint32_t INST_LOCK_3_WAY; /*!< Offset: 0x091c Instruction Lockdown 3 by Way */
<> 144:ef7eb2e8f9f7 81 __IO uint32_t DATA_LOCK_4_WAY; /*!< Offset: 0x0920 Data Lockdown 4 by Way */
<> 144:ef7eb2e8f9f7 82 __IO uint32_t INST_LOCK_4_WAY; /*!< Offset: 0x0924 Instruction Lockdown 4 by Way */
<> 144:ef7eb2e8f9f7 83 __IO uint32_t DATA_LOCK_5_WAY; /*!< Offset: 0x0928 Data Lockdown 5 by Way */
<> 144:ef7eb2e8f9f7 84 __IO uint32_t INST_LOCK_5_WAY; /*!< Offset: 0x092c Instruction Lockdown 5 by Way */
<> 144:ef7eb2e8f9f7 85 __IO uint32_t DATA_LOCK_6_WAY; /*!< Offset: 0x0930 Data Lockdown 5 by Way */
<> 144:ef7eb2e8f9f7 86 __IO uint32_t INST_LOCK_6_WAY; /*!< Offset: 0x0934 Instruction Lockdown 5 by Way */
<> 144:ef7eb2e8f9f7 87 __IO uint32_t DATA_LOCK_7_WAY; /*!< Offset: 0x0938 Data Lockdown 6 by Way */
<> 144:ef7eb2e8f9f7 88 __IO uint32_t INST_LOCK_7_WAY; /*!< Offset: 0x093c Instruction Lockdown 6 by Way */
<> 144:ef7eb2e8f9f7 89 uint32_t RESERVED11[0x4];
<> 144:ef7eb2e8f9f7 90 __IO uint32_t LOCK_LINE_EN; /*!< Offset: 0x0950 Lockdown by Line Enable */
<> 144:ef7eb2e8f9f7 91 __IO uint32_t UNLOCK_ALL_BY_WAY; /*!< Offset: 0x0954 Unlock All Lines by Way */
<> 144:ef7eb2e8f9f7 92 uint32_t RESERVED12[0xaa];
<> 144:ef7eb2e8f9f7 93 __IO uint32_t ADDRESS_FILTER_START; /*!< Offset: 0x0c00 Address Filtering Start */
<> 144:ef7eb2e8f9f7 94 __IO uint32_t ADDRESS_FILTER_END; /*!< Offset: 0x0c04 Address Filtering End */
<> 144:ef7eb2e8f9f7 95 uint32_t RESERVED13[0xce];
<> 144:ef7eb2e8f9f7 96 __IO uint32_t DEBUG_CONTROL; /*!< Offset: 0x0f40 Debug Control Register */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 } PL310_TypeDef;
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 #define PL310 ((PL310_TypeDef *)Renesas_RZ_A1_PL310_BASE) /*!< PL310 Declaration */
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 extern int PL310_GetID (void);
<> 144:ef7eb2e8f9f7 103 extern int PL310_GetType (void);
<> 144:ef7eb2e8f9f7 104 extern void PL310_InvAllByWay (void);
<> 144:ef7eb2e8f9f7 105 extern void PL310_CleanInvAllByWay(void);
<> 144:ef7eb2e8f9f7 106 extern void PL310_Enable(void);
<> 144:ef7eb2e8f9f7 107 extern void PL310_Disable(void);
<> 144:ef7eb2e8f9f7 108 extern void PL310_InvPa (void *);
<> 144:ef7eb2e8f9f7 109 extern void PL310_CleanPa (void *);
<> 144:ef7eb2e8f9f7 110 extern void PL310_CleanInvPa (void *);
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 #endif
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114