added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_IAR/startup_LPC43xx.S@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 0:9b334a45a8ff
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /************************************************** |
<> | 144:ef7eb2e8f9f7 | 2 | * |
<> | 144:ef7eb2e8f9f7 | 3 | * Part one of the system initialization code, contains low-level |
<> | 144:ef7eb2e8f9f7 | 4 | * initialization, plain thumb variant. |
<> | 144:ef7eb2e8f9f7 | 5 | * |
<> | 144:ef7eb2e8f9f7 | 6 | * Copyright 2011 IAR Systems. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * $Revision: 47876 $ |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | **************************************************/ |
<> | 144:ef7eb2e8f9f7 | 11 | |
<> | 144:ef7eb2e8f9f7 | 12 | ; |
<> | 144:ef7eb2e8f9f7 | 13 | ; The modules in this file are included in the libraries, and may be replaced |
<> | 144:ef7eb2e8f9f7 | 14 | ; by any user-defined modules that define the PUBLIC symbol _program_start or |
<> | 144:ef7eb2e8f9f7 | 15 | ; a user defined start symbol. |
<> | 144:ef7eb2e8f9f7 | 16 | ; To override the cstartup defined in the library, simply add your modified |
<> | 144:ef7eb2e8f9f7 | 17 | ; version to the workbench project. |
<> | 144:ef7eb2e8f9f7 | 18 | ; |
<> | 144:ef7eb2e8f9f7 | 19 | ; The vector table is normally located at address 0. |
<> | 144:ef7eb2e8f9f7 | 20 | ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. |
<> | 144:ef7eb2e8f9f7 | 21 | ; The name "__vector_table" has special meaning for C-SPY: |
<> | 144:ef7eb2e8f9f7 | 22 | ; it is where the SP start value is found, and the NVIC vector |
<> | 144:ef7eb2e8f9f7 | 23 | ; table register (VTOR) is initialized to this address if != 0. |
<> | 144:ef7eb2e8f9f7 | 24 | ; |
<> | 144:ef7eb2e8f9f7 | 25 | ; Cortex-M version |
<> | 144:ef7eb2e8f9f7 | 26 | ; |
<> | 144:ef7eb2e8f9f7 | 27 | |
<> | 144:ef7eb2e8f9f7 | 28 | |
<> | 144:ef7eb2e8f9f7 | 29 | MODULE ?cstartup |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | ;; Forward declaration of sections. |
<> | 144:ef7eb2e8f9f7 | 32 | SECTION CSTACK:DATA:NOROOT(3) |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | SECTION .intvec:CODE:NOROOT(2) |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | EXTERN __iar_program_start |
<> | 144:ef7eb2e8f9f7 | 37 | EXTERN SystemInit |
<> | 144:ef7eb2e8f9f7 | 38 | PUBLIC __vector_table |
<> | 144:ef7eb2e8f9f7 | 39 | PUBLIC __vector_table_0x1c |
<> | 144:ef7eb2e8f9f7 | 40 | PUBLIC __Vectors |
<> | 144:ef7eb2e8f9f7 | 41 | PUBLIC __Vectors_End |
<> | 144:ef7eb2e8f9f7 | 42 | PUBLIC __Vectors_Size |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | DATA |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | __vector_table |
<> | 144:ef7eb2e8f9f7 | 47 | DCD sfe(CSTACK) |
<> | 144:ef7eb2e8f9f7 | 48 | DCD Reset_Handler |
<> | 144:ef7eb2e8f9f7 | 49 | DCD NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 50 | DCD HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 51 | DCD MemManage_Handler |
<> | 144:ef7eb2e8f9f7 | 52 | DCD BusFault_Handler |
<> | 144:ef7eb2e8f9f7 | 53 | DCD UsageFault_Handler |
<> | 144:ef7eb2e8f9f7 | 54 | __vector_table_0x1c |
<> | 144:ef7eb2e8f9f7 | 55 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 56 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 57 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 58 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 59 | DCD SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 60 | DCD DebugMon_Handler |
<> | 144:ef7eb2e8f9f7 | 61 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 62 | DCD PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 63 | DCD SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 64 | |
<> | 144:ef7eb2e8f9f7 | 65 | ; External Interrupts |
<> | 144:ef7eb2e8f9f7 | 66 | DCD DAC_IRQHandler ; 16 D/A Converter |
<> | 144:ef7eb2e8f9f7 | 67 | DCD MX_CORE_IRQHandler ; 17 CortexM0 (LPC43XX ONLY) |
<> | 144:ef7eb2e8f9f7 | 68 | DCD DMA_IRQHandler ; 18 General Purpose DMA |
<> | 144:ef7eb2e8f9f7 | 69 | DCD 0 ; 19 Reserved |
<> | 144:ef7eb2e8f9f7 | 70 | DCD FLASHEEPROM_IRQHandler ; 20 ORed flash bank A, flash bank B, EEPROM interrupts |
<> | 144:ef7eb2e8f9f7 | 71 | DCD ETH_IRQHandler ; 21 Ethernet |
<> | 144:ef7eb2e8f9f7 | 72 | DCD SDIO_IRQHandler ; 22 SD/MMC |
<> | 144:ef7eb2e8f9f7 | 73 | DCD LCD_IRQHandler ; 23 LCD |
<> | 144:ef7eb2e8f9f7 | 74 | DCD USB0_IRQHandler ; 24 USB0 |
<> | 144:ef7eb2e8f9f7 | 75 | DCD USB1_IRQHandler ; 25 USB1 |
<> | 144:ef7eb2e8f9f7 | 76 | DCD SCT_IRQHandler ; 26 State Configurable Timer |
<> | 144:ef7eb2e8f9f7 | 77 | DCD RIT_IRQHandler ; 27 Repetitive Interrupt Timer |
<> | 144:ef7eb2e8f9f7 | 78 | DCD TIMER0_IRQHandler ; 28 Timer0 |
<> | 144:ef7eb2e8f9f7 | 79 | DCD TIMER1_IRQHandler ; 29 Timer1 |
<> | 144:ef7eb2e8f9f7 | 80 | DCD TIMER2_IRQHandler ; 30 Timer2 |
<> | 144:ef7eb2e8f9f7 | 81 | DCD TIMER3_IRQHandler ; 31 Timer3 |
<> | 144:ef7eb2e8f9f7 | 82 | DCD MCPWM_IRQHandler ; 32 Motor Control PWM |
<> | 144:ef7eb2e8f9f7 | 83 | DCD ADC0_IRQHandler ; 33 A/D Converter 0 |
<> | 144:ef7eb2e8f9f7 | 84 | DCD I2C0_IRQHandler ; 34 I2C0 |
<> | 144:ef7eb2e8f9f7 | 85 | DCD I2C1_IRQHandler ; 35 I2C1 |
<> | 144:ef7eb2e8f9f7 | 86 | DCD SPI_IRQHandler ; 36 SPI (LPC43XX ONLY) |
<> | 144:ef7eb2e8f9f7 | 87 | DCD ADC1_IRQHandler ; 37 A/D Converter 1 |
<> | 144:ef7eb2e8f9f7 | 88 | DCD SSP0_IRQHandler ; 38 SSP0 |
<> | 144:ef7eb2e8f9f7 | 89 | DCD SSP1_IRQHandler ; 39 SSP1 |
<> | 144:ef7eb2e8f9f7 | 90 | DCD UART0_IRQHandler ; 40 UART0 |
<> | 144:ef7eb2e8f9f7 | 91 | DCD UART1_IRQHandler ; 41 UART1 |
<> | 144:ef7eb2e8f9f7 | 92 | DCD UART2_IRQHandler ; 42 UART2 |
<> | 144:ef7eb2e8f9f7 | 93 | DCD UART3_IRQHandler ; 43 UART3 |
<> | 144:ef7eb2e8f9f7 | 94 | DCD I2S0_IRQHandler ; 44 I2S0 |
<> | 144:ef7eb2e8f9f7 | 95 | DCD I2S1_IRQHandler ; 45 I2S1 |
<> | 144:ef7eb2e8f9f7 | 96 | DCD SPIFI_IRQHandler ; 46 SPI Flash Interface |
<> | 144:ef7eb2e8f9f7 | 97 | DCD SGPIO_IRQHandler ; 47 SGPIO (LPC43XX ONLY) |
<> | 144:ef7eb2e8f9f7 | 98 | DCD GPIO0_IRQHandler ; 48 GPIO0 |
<> | 144:ef7eb2e8f9f7 | 99 | DCD GPIO1_IRQHandler ; 49 GPIO1 |
<> | 144:ef7eb2e8f9f7 | 100 | DCD GPIO2_IRQHandler ; 50 GPIO2 |
<> | 144:ef7eb2e8f9f7 | 101 | DCD GPIO3_IRQHandler ; 51 GPIO3 |
<> | 144:ef7eb2e8f9f7 | 102 | DCD GPIO4_IRQHandler ; 52 GPIO4 |
<> | 144:ef7eb2e8f9f7 | 103 | DCD GPIO5_IRQHandler ; 53 GPIO5 |
<> | 144:ef7eb2e8f9f7 | 104 | DCD GPIO6_IRQHandler ; 54 GPIO6 |
<> | 144:ef7eb2e8f9f7 | 105 | DCD GPIO7_IRQHandler ; 55 GPIO7 |
<> | 144:ef7eb2e8f9f7 | 106 | DCD GINT0_IRQHandler ; 56 GINT0 |
<> | 144:ef7eb2e8f9f7 | 107 | DCD GINT1_IRQHandler ; 57 GINT1 |
<> | 144:ef7eb2e8f9f7 | 108 | DCD EVRT_IRQHandler ; 58 Event Router |
<> | 144:ef7eb2e8f9f7 | 109 | DCD CAN1_IRQHandler ; 59 C_CAN1 |
<> | 144:ef7eb2e8f9f7 | 110 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 111 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 112 | DCD ATIMER_IRQHandler ; 62 ATIMER |
<> | 144:ef7eb2e8f9f7 | 113 | DCD RTC_IRQHandler ; 63 RTC |
<> | 144:ef7eb2e8f9f7 | 114 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 115 | DCD WDT_IRQHandler ; 65 WDT |
<> | 144:ef7eb2e8f9f7 | 116 | DCD 0 |
<> | 144:ef7eb2e8f9f7 | 117 | DCD CAN0_IRQHandler ; 67 C_CAN0 |
<> | 144:ef7eb2e8f9f7 | 118 | DCD QEI_IRQHandler ; 68 QEI |
<> | 144:ef7eb2e8f9f7 | 119 | __Vectors_End |
<> | 144:ef7eb2e8f9f7 | 120 | |
<> | 144:ef7eb2e8f9f7 | 121 | __Vectors EQU __vector_table |
<> | 144:ef7eb2e8f9f7 | 122 | __Vectors_Size EQU __Vectors_End - __Vectors |
<> | 144:ef7eb2e8f9f7 | 123 | |
<> | 144:ef7eb2e8f9f7 | 124 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
<> | 144:ef7eb2e8f9f7 | 125 | ;; |
<> | 144:ef7eb2e8f9f7 | 126 | ;; Default interrupt handlers. |
<> | 144:ef7eb2e8f9f7 | 127 | ;; |
<> | 144:ef7eb2e8f9f7 | 128 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
<> | 144:ef7eb2e8f9f7 | 129 | |
<> | 144:ef7eb2e8f9f7 | 130 | THUMB |
<> | 144:ef7eb2e8f9f7 | 131 | |
<> | 144:ef7eb2e8f9f7 | 132 | PUBWEAK Reset_Handler |
<> | 144:ef7eb2e8f9f7 | 133 | SECTION .text:CODE:REORDER(2) |
<> | 144:ef7eb2e8f9f7 | 134 | Reset_Handler |
<> | 144:ef7eb2e8f9f7 | 135 | LDR R0, =SystemInit |
<> | 144:ef7eb2e8f9f7 | 136 | BLX R0 |
<> | 144:ef7eb2e8f9f7 | 137 | LDR R0, =__iar_program_start |
<> | 144:ef7eb2e8f9f7 | 138 | BX R0 |
<> | 144:ef7eb2e8f9f7 | 139 | |
<> | 144:ef7eb2e8f9f7 | 140 | PUBWEAK NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 141 | PUBWEAK HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 142 | PUBWEAK MemManage_Handler |
<> | 144:ef7eb2e8f9f7 | 143 | PUBWEAK BusFault_Handler |
<> | 144:ef7eb2e8f9f7 | 144 | PUBWEAK UsageFault_Handler |
<> | 144:ef7eb2e8f9f7 | 145 | PUBWEAK SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 146 | PUBWEAK DebugMon_Handler |
<> | 144:ef7eb2e8f9f7 | 147 | PUBWEAK PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 148 | PUBWEAK SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 149 | PUBWEAK DAC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 150 | PUBWEAK MX_CORE_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 151 | PUBWEAK DMA_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 152 | PUBWEAK FLASHEEPROM_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 153 | PUBWEAK ETH_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 154 | PUBWEAK SDIO_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 155 | PUBWEAK LCD_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 156 | PUBWEAK USB0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 157 | PUBWEAK USB1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 158 | PUBWEAK SCT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 159 | PUBWEAK RIT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 160 | PUBWEAK TIMER0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 161 | PUBWEAK TIMER1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 162 | PUBWEAK TIMER2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 163 | PUBWEAK TIMER3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 164 | PUBWEAK MCPWM_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 165 | PUBWEAK ADC0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 166 | PUBWEAK I2C0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 167 | PUBWEAK I2C1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 168 | PUBWEAK SPI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 169 | PUBWEAK ADC1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 170 | PUBWEAK SSP0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 171 | PUBWEAK SSP1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 172 | PUBWEAK UART0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 173 | PUBWEAK UART1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 174 | PUBWEAK UART2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 175 | PUBWEAK UART3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 176 | PUBWEAK I2S0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 177 | PUBWEAK I2S1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 178 | PUBWEAK SPIFI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 179 | PUBWEAK SGPIO_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 180 | PUBWEAK GPIO0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 181 | PUBWEAK GPIO1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 182 | PUBWEAK GPIO2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 183 | PUBWEAK GPIO3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 184 | PUBWEAK GPIO4_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 185 | PUBWEAK GPIO5_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 186 | PUBWEAK GPIO6_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 187 | PUBWEAK GPIO7_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 188 | PUBWEAK GINT0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 189 | PUBWEAK GINT1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 190 | PUBWEAK EVRT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 191 | PUBWEAK CAN1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 192 | PUBWEAK ATIMER_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 193 | PUBWEAK RTC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 194 | PUBWEAK WDT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 195 | PUBWEAK CAN0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 196 | PUBWEAK QEI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 197 | SECTION .text:CODE:REORDER(1) |
<> | 144:ef7eb2e8f9f7 | 198 | NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 199 | B NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 200 | SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 201 | B SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 202 | DebugMon_Handler |
<> | 144:ef7eb2e8f9f7 | 203 | B DebugMon_Handler |
<> | 144:ef7eb2e8f9f7 | 204 | PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 205 | B PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 206 | SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 207 | B SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 208 | HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 209 | B HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 210 | MemManage_Handler |
<> | 144:ef7eb2e8f9f7 | 211 | B MemManage_Handler |
<> | 144:ef7eb2e8f9f7 | 212 | BusFault_Handler |
<> | 144:ef7eb2e8f9f7 | 213 | B BusFault_Handler |
<> | 144:ef7eb2e8f9f7 | 214 | UsageFault_Handler |
<> | 144:ef7eb2e8f9f7 | 215 | DAC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 216 | MX_CORE_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 217 | DMA_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 218 | FLASHEEPROM_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 219 | ETH_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 220 | SDIO_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 221 | LCD_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 222 | USB0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 223 | USB1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 224 | SCT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 225 | RIT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 226 | TIMER0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 227 | TIMER1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 228 | TIMER2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 229 | TIMER3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 230 | MCPWM_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 231 | ADC0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 232 | I2C0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 233 | I2C1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 234 | SPI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 235 | ADC1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 236 | SSP0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 237 | SSP1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 238 | UART0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 239 | UART1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 240 | UART2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 241 | UART3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 242 | I2S0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 243 | I2S1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 244 | SPIFI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 245 | SGPIO_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 246 | GPIO0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 247 | GPIO1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 248 | GPIO2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 249 | GPIO3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 250 | GPIO4_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 251 | GPIO5_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 252 | GPIO6_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 253 | GPIO7_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 254 | GINT0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 255 | GINT1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 256 | EVRT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 257 | CAN1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 258 | ATIMER_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 259 | RTC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 260 | WDT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 261 | CAN0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 262 | QEI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 263 | Default_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 264 | B Default_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 265 | |
<> | 144:ef7eb2e8f9f7 | 266 | /* CRP Section - not needed for flashless devices */ |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | ;;; SECTION .crp:CODE:ROOT(2) |
<> | 144:ef7eb2e8f9f7 | 269 | ;;; DATA |
<> | 144:ef7eb2e8f9f7 | 270 | /* Code Read Protection |
<> | 144:ef7eb2e8f9f7 | 271 | NO_ISP 0x4E697370 - Prevents sampling of pin PIO0_1 for entering ISP mode |
<> | 144:ef7eb2e8f9f7 | 272 | CRP1 0x12345678 - Write to RAM command cannot access RAM below 0x10000300. |
<> | 144:ef7eb2e8f9f7 | 273 | - Copy RAM to flash command can not write to Sector 0. |
<> | 144:ef7eb2e8f9f7 | 274 | - Erase command can erase Sector 0 only when all sectors |
<> | 144:ef7eb2e8f9f7 | 275 | are selected for erase. |
<> | 144:ef7eb2e8f9f7 | 276 | - Compare command is disabled. |
<> | 144:ef7eb2e8f9f7 | 277 | - Read Memory command is disabled. |
<> | 144:ef7eb2e8f9f7 | 278 | CRP2 0x87654321 - Read Memory is disabled. |
<> | 144:ef7eb2e8f9f7 | 279 | - Write to RAM is disabled. |
<> | 144:ef7eb2e8f9f7 | 280 | - "Go" command is disabled. |
<> | 144:ef7eb2e8f9f7 | 281 | - Copy RAM to flash is disabled. |
<> | 144:ef7eb2e8f9f7 | 282 | - Compare is disabled. |
<> | 144:ef7eb2e8f9f7 | 283 | CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry |
<> | 144:ef7eb2e8f9f7 | 284 | by pulling PIO0_1 LOW is disabled if a valid user code is |
<> | 144:ef7eb2e8f9f7 | 285 | present in flash sector 0. |
<> | 144:ef7eb2e8f9f7 | 286 | Caution: If CRP3 is selected, no future factory testing can be |
<> | 144:ef7eb2e8f9f7 | 287 | performed on the device. |
<> | 144:ef7eb2e8f9f7 | 288 | */ |
<> | 144:ef7eb2e8f9f7 | 289 | ;;; DCD 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 290 | ;;; |
<> | 144:ef7eb2e8f9f7 | 291 | |
<> | 144:ef7eb2e8f9f7 | 292 | END |