Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Freescale/TARGET_K66F/system_MK66F18.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 ** ###################################################################
<> 144:ef7eb2e8f9f7 3 ** Processors: MK66FN2M0VLQ18
<> 144:ef7eb2e8f9f7 4 ** MK66FN2M0VMD18
<> 144:ef7eb2e8f9f7 5 ** MK66FX1M0VLQ18
<> 144:ef7eb2e8f9f7 6 ** MK66FX1M0VMD18
<> 144:ef7eb2e8f9f7 7 **
<> 144:ef7eb2e8f9f7 8 ** Compilers: Keil ARM C/C++ Compiler
<> 144:ef7eb2e8f9f7 9 ** Freescale C/C++ for Embedded ARM
<> 144:ef7eb2e8f9f7 10 ** GNU C Compiler
<> 144:ef7eb2e8f9f7 11 ** IAR ANSI C/C++ Compiler for ARM
<> 144:ef7eb2e8f9f7 12 **
<> 144:ef7eb2e8f9f7 13 ** Reference manual: K66P144M180SF5RMV2, Rev. 1, Mar 2015
<> 144:ef7eb2e8f9f7 14 ** Version: rev. 3.0, 2015-03-25
<> 144:ef7eb2e8f9f7 15 ** Build: b151216
<> 144:ef7eb2e8f9f7 16 **
<> 144:ef7eb2e8f9f7 17 ** Abstract:
<> 144:ef7eb2e8f9f7 18 ** Provides a system configuration function and a global variable that
<> 144:ef7eb2e8f9f7 19 ** contains the system frequency. It configures the device and initializes
<> 144:ef7eb2e8f9f7 20 ** the oscillator (PLL) that is part of the microcontroller device.
<> 144:ef7eb2e8f9f7 21 **
<> 144:ef7eb2e8f9f7 22 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 23 ** All rights reserved.
<> 144:ef7eb2e8f9f7 24 **
<> 144:ef7eb2e8f9f7 25 ** Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 26 ** are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 27 **
<> 144:ef7eb2e8f9f7 28 ** o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 29 ** of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 30 **
<> 144:ef7eb2e8f9f7 31 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 32 ** list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 33 ** other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 34 **
<> 144:ef7eb2e8f9f7 35 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 36 ** contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 37 ** software without specific prior written permission.
<> 144:ef7eb2e8f9f7 38 **
<> 144:ef7eb2e8f9f7 39 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 40 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 41 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 42 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 43 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 44 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 45 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 46 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 47 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 48 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 49 **
<> 144:ef7eb2e8f9f7 50 ** http: www.freescale.com
<> 144:ef7eb2e8f9f7 51 ** mail: support@freescale.com
<> 144:ef7eb2e8f9f7 52 **
<> 144:ef7eb2e8f9f7 53 ** Revisions:
<> 144:ef7eb2e8f9f7 54 ** - rev. 1.0 (2013-09-02)
<> 144:ef7eb2e8f9f7 55 ** Initial version.
<> 144:ef7eb2e8f9f7 56 ** - rev. 2.0 (2014-02-17)
<> 144:ef7eb2e8f9f7 57 ** Register accessor macros added to the memory map.
<> 144:ef7eb2e8f9f7 58 ** Symbols for Processor Expert memory map compatibility added to the memory map.
<> 144:ef7eb2e8f9f7 59 ** Startup file for gcc has been updated according to CMSIS 3.2.
<> 144:ef7eb2e8f9f7 60 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
<> 144:ef7eb2e8f9f7 61 ** Update according to reference manual rev. 2
<> 144:ef7eb2e8f9f7 62 ** - rev. 2.1 (2014-04-16)
<> 144:ef7eb2e8f9f7 63 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
<> 144:ef7eb2e8f9f7 64 ** - rev. 2.2 (2014-10-14)
<> 144:ef7eb2e8f9f7 65 ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM.
<> 144:ef7eb2e8f9f7 66 ** - rev. 2.3 (2014-11-20)
<> 144:ef7eb2e8f9f7 67 ** Update according to reverence manual K65P169M180SF5RMV2_NDA, Rev. 0 Draft A, October 2014.
<> 144:ef7eb2e8f9f7 68 ** Update of SystemInit() to use 16MHz external crystal.
<> 144:ef7eb2e8f9f7 69 ** - rev. 2.4 (2015-02-19)
<> 144:ef7eb2e8f9f7 70 ** Renamed interrupt vector LLW to LLWU.
<> 144:ef7eb2e8f9f7 71 ** - rev. 3.0 (2015-03-25)
<> 144:ef7eb2e8f9f7 72 ** Registers updated according to the reference manual revision 1, March 2015
<> 144:ef7eb2e8f9f7 73 **
<> 144:ef7eb2e8f9f7 74 ** ###################################################################
<> 144:ef7eb2e8f9f7 75 */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /*!
<> 144:ef7eb2e8f9f7 78 * @file MK66F18
<> 144:ef7eb2e8f9f7 79 * @version 3.0
<> 144:ef7eb2e8f9f7 80 * @date 2015-03-25
<> 144:ef7eb2e8f9f7 81 * @brief Device specific configuration file for MK66F18 (header file)
<> 144:ef7eb2e8f9f7 82 *
<> 144:ef7eb2e8f9f7 83 * Provides a system configuration function and a global variable that contains
<> 144:ef7eb2e8f9f7 84 * the system frequency. It configures the device and initializes the oscillator
<> 144:ef7eb2e8f9f7 85 * (PLL) that is part of the microcontroller device.
<> 144:ef7eb2e8f9f7 86 */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 #ifndef _SYSTEM_MK66F18_H_
<> 144:ef7eb2e8f9f7 89 #define _SYSTEM_MK66F18_H_ /**< Symbol preventing repeated inclusion */
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 92 extern "C" {
<> 144:ef7eb2e8f9f7 93 #endif
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 #include <stdint.h>
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 #ifndef DISABLE_WDOG
<> 144:ef7eb2e8f9f7 99 #define DISABLE_WDOG 1
<> 144:ef7eb2e8f9f7 100 #endif
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /* Define clock source values */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 #define CPU_XTAL_CLK_HZ 16000000U /* Value of the external crystal or oscillator clock frequency of the system oscillator (OSC) in Hz */
<> 144:ef7eb2e8f9f7 105 #define CPU_XTAL32k_CLK_HZ 32768U /* Value of the external 32k crystal or oscillator clock frequency of the RTC in Hz */
<> 144:ef7eb2e8f9f7 106 #define CPU_INT_SLOW_CLK_HZ 32768U /* Value of the slow internal oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 107 #define CPU_INT_FAST_CLK_HZ 4000000U /* Value of the fast internal oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 108 #define CPU_INT_IRC_CLK_HZ 48000000U /* Value of the 48M internal oscillator clock frequency in Hz */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /* RTC oscillator setting */
<> 144:ef7eb2e8f9f7 111 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
<> 144:ef7eb2e8f9f7 112 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /* Low power mode enable */
<> 144:ef7eb2e8f9f7 115 /* SMC_PMPROT: AHSRUN=1,AVLP=1,ALLS=1,AVLLS=1 */
<> 144:ef7eb2e8f9f7 116 #define SYSTEM_SMC_PMPROT_VALUE 0xAAU /* SMC_PMPROT */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 #define DEFAULT_SYSTEM_CLOCK 20971520u
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 /**
<> 144:ef7eb2e8f9f7 122 * @brief System clock frequency (core clock)
<> 144:ef7eb2e8f9f7 123 *
<> 144:ef7eb2e8f9f7 124 * The system clock frequency supplied to the SysTick timer and the processor
<> 144:ef7eb2e8f9f7 125 * core clock. This variable can be used by the user application to setup the
<> 144:ef7eb2e8f9f7 126 * SysTick timer or configure other parameters. It may also be used by debugger to
<> 144:ef7eb2e8f9f7 127 * query the frequency of the debug timer or configure the trace clock speed
<> 144:ef7eb2e8f9f7 128 * SystemCoreClock is initialized with a correct predefined value.
<> 144:ef7eb2e8f9f7 129 */
<> 144:ef7eb2e8f9f7 130 extern uint32_t SystemCoreClock;
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /**
<> 144:ef7eb2e8f9f7 133 * @brief Setup the microcontroller system.
<> 144:ef7eb2e8f9f7 134 *
<> 144:ef7eb2e8f9f7 135 * Typically this function configures the oscillator (PLL) that is part of the
<> 144:ef7eb2e8f9f7 136 * microcontroller device. For systems with variable clock speed it also updates
<> 144:ef7eb2e8f9f7 137 * the variable SystemCoreClock. SystemInit is called from startup_device file.
<> 144:ef7eb2e8f9f7 138 */
<> 144:ef7eb2e8f9f7 139 void SystemInit (void);
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 /**
<> 144:ef7eb2e8f9f7 142 * @brief Updates the SystemCoreClock variable.
<> 144:ef7eb2e8f9f7 143 *
<> 144:ef7eb2e8f9f7 144 * It must be called whenever the core clock is changed during program
<> 144:ef7eb2e8f9f7 145 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
<> 144:ef7eb2e8f9f7 146 * the current core clock.
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148 void SystemCoreClockUpdate (void);
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 151 }
<> 144:ef7eb2e8f9f7 152 #endif
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 #endif /* _SYSTEM_MK66F18_H_ */