added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_NXP/TARGET_LPC82X/sleep.c@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "sleep_api.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 18 | |
<> | 144:ef7eb2e8f9f7 | 19 | |
<> | 144:ef7eb2e8f9f7 | 20 | //#define DEEPSLEEP |
<> | 144:ef7eb2e8f9f7 | 21 | #define POWERDOWN |
<> | 144:ef7eb2e8f9f7 | 22 | |
<> | 144:ef7eb2e8f9f7 | 23 | void sleep(void) |
<> | 144:ef7eb2e8f9f7 | 24 | { |
<> | 144:ef7eb2e8f9f7 | 25 | //Normal sleep mode for PCON: |
<> | 144:ef7eb2e8f9f7 | 26 | LPC_PMU->PCON &= ~0x03; |
<> | 144:ef7eb2e8f9f7 | 27 | |
<> | 144:ef7eb2e8f9f7 | 28 | //Normal sleep mode for ARM core: |
<> | 144:ef7eb2e8f9f7 | 29 | SCB->SCR = 0; |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | //And go to sleep |
<> | 144:ef7eb2e8f9f7 | 32 | __WFI(); |
<> | 144:ef7eb2e8f9f7 | 33 | } |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | // Deepsleep/powerdown modes assume the device is configured to use its internal RC oscillator directly |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | void deepsleep(void) |
<> | 144:ef7eb2e8f9f7 | 38 | { |
<> | 144:ef7eb2e8f9f7 | 39 | //Deep sleep in PCON |
<> | 144:ef7eb2e8f9f7 | 40 | LPC_PMU->PCON &= ~0x03; |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #if defined(DEEPSLEEP) |
<> | 144:ef7eb2e8f9f7 | 43 | LPC_PMU->PCON |= 0x01; |
<> | 144:ef7eb2e8f9f7 | 44 | #elif defined(POWERDOWN) |
<> | 144:ef7eb2e8f9f7 | 45 | LPC_PMU->PCON |= 0x02; |
<> | 144:ef7eb2e8f9f7 | 46 | #endif |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | //If brownout detection and WDT are enabled, keep them enabled during sleep |
<> | 144:ef7eb2e8f9f7 | 49 | LPC_SYSCON->PDSLEEPCFG = LPC_SYSCON->PDRUNCFG; |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | //After wakeup same stuff as currently enabled: |
<> | 144:ef7eb2e8f9f7 | 52 | LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | //All interrupts may wake up: |
<> | 144:ef7eb2e8f9f7 | 55 | LPC_SYSCON->STARTERP0 = 0xFF; |
<> | 144:ef7eb2e8f9f7 | 56 | LPC_SYSCON->STARTERP1 = 0xFFFF; |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | //Deep sleep for ARM core: |
<> | 144:ef7eb2e8f9f7 | 59 | SCB->SCR = 1<<2; |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | __WFI(); |
<> | 144:ef7eb2e8f9f7 | 62 | } |