added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_pit.c@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 144:ef7eb2e8f9f7 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 144:ef7eb2e8f9f7 | 13 | * other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 144:ef7eb2e8f9f7 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 144:ef7eb2e8f9f7 | 17 | * software without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 18 | * |
<> | 144:ef7eb2e8f9f7 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | #include "fsl_pit.h" |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 34 | * Prototypes |
<> | 144:ef7eb2e8f9f7 | 35 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 36 | /*! |
<> | 144:ef7eb2e8f9f7 | 37 | * @brief Gets the instance from the base address to be used to gate or ungate the module clock |
<> | 144:ef7eb2e8f9f7 | 38 | * |
<> | 144:ef7eb2e8f9f7 | 39 | * @param base PIT peripheral base address |
<> | 144:ef7eb2e8f9f7 | 40 | * |
<> | 144:ef7eb2e8f9f7 | 41 | * @return The PIT instance |
<> | 144:ef7eb2e8f9f7 | 42 | */ |
<> | 144:ef7eb2e8f9f7 | 43 | static uint32_t PIT_GetInstance(PIT_Type *base); |
<> | 144:ef7eb2e8f9f7 | 44 | |
<> | 144:ef7eb2e8f9f7 | 45 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 46 | * Variables |
<> | 144:ef7eb2e8f9f7 | 47 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 48 | /*! @brief Pointers to PIT bases for each instance. */ |
<> | 144:ef7eb2e8f9f7 | 49 | static PIT_Type *const s_pitBases[] = PIT_BASE_PTRS; |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /*! @brief Pointers to PIT clocks for each instance. */ |
<> | 144:ef7eb2e8f9f7 | 52 | static const clock_ip_name_t s_pitClocks[] = PIT_CLOCKS; |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 55 | * Code |
<> | 144:ef7eb2e8f9f7 | 56 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 57 | static uint32_t PIT_GetInstance(PIT_Type *base) |
<> | 144:ef7eb2e8f9f7 | 58 | { |
<> | 144:ef7eb2e8f9f7 | 59 | uint32_t instance; |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | /* Find the instance index from base address mappings. */ |
<> | 144:ef7eb2e8f9f7 | 62 | for (instance = 0; instance < FSL_FEATURE_SOC_PIT_COUNT; instance++) |
<> | 144:ef7eb2e8f9f7 | 63 | { |
<> | 144:ef7eb2e8f9f7 | 64 | if (s_pitBases[instance] == base) |
<> | 144:ef7eb2e8f9f7 | 65 | { |
<> | 144:ef7eb2e8f9f7 | 66 | break; |
<> | 144:ef7eb2e8f9f7 | 67 | } |
<> | 144:ef7eb2e8f9f7 | 68 | } |
<> | 144:ef7eb2e8f9f7 | 69 | |
<> | 144:ef7eb2e8f9f7 | 70 | assert(instance < FSL_FEATURE_SOC_PIT_COUNT); |
<> | 144:ef7eb2e8f9f7 | 71 | |
<> | 144:ef7eb2e8f9f7 | 72 | return instance; |
<> | 144:ef7eb2e8f9f7 | 73 | } |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | void PIT_Init(PIT_Type *base, const pit_config_t *config) |
<> | 144:ef7eb2e8f9f7 | 76 | { |
<> | 144:ef7eb2e8f9f7 | 77 | assert(config); |
<> | 144:ef7eb2e8f9f7 | 78 | |
<> | 144:ef7eb2e8f9f7 | 79 | /* Ungate the PIT clock*/ |
<> | 144:ef7eb2e8f9f7 | 80 | CLOCK_EnableClock(s_pitClocks[PIT_GetInstance(base)]); |
<> | 144:ef7eb2e8f9f7 | 81 | |
<> | 144:ef7eb2e8f9f7 | 82 | /* Enable PIT timers */ |
<> | 144:ef7eb2e8f9f7 | 83 | base->MCR &= ~PIT_MCR_MDIS_MASK; |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | /* Config timer operation when in debug mode */ |
<> | 144:ef7eb2e8f9f7 | 86 | if (config->enableRunInDebug) |
<> | 144:ef7eb2e8f9f7 | 87 | { |
<> | 144:ef7eb2e8f9f7 | 88 | base->MCR &= ~PIT_MCR_FRZ_MASK; |
<> | 144:ef7eb2e8f9f7 | 89 | } |
<> | 144:ef7eb2e8f9f7 | 90 | else |
<> | 144:ef7eb2e8f9f7 | 91 | { |
<> | 144:ef7eb2e8f9f7 | 92 | base->MCR |= PIT_MCR_FRZ_MASK; |
<> | 144:ef7eb2e8f9f7 | 93 | } |
<> | 144:ef7eb2e8f9f7 | 94 | } |
<> | 144:ef7eb2e8f9f7 | 95 | |
<> | 144:ef7eb2e8f9f7 | 96 | void PIT_Deinit(PIT_Type *base) |
<> | 144:ef7eb2e8f9f7 | 97 | { |
<> | 144:ef7eb2e8f9f7 | 98 | /* Disable PIT timers */ |
<> | 144:ef7eb2e8f9f7 | 99 | base->MCR |= PIT_MCR_MDIS_MASK; |
<> | 144:ef7eb2e8f9f7 | 100 | |
<> | 144:ef7eb2e8f9f7 | 101 | /* Gate the PIT clock*/ |
<> | 144:ef7eb2e8f9f7 | 102 | CLOCK_DisableClock(s_pitClocks[PIT_GetInstance(base)]); |
<> | 144:ef7eb2e8f9f7 | 103 | } |
<> | 144:ef7eb2e8f9f7 | 104 | |
<> | 144:ef7eb2e8f9f7 | 105 | #if defined(FSL_FEATURE_PIT_HAS_LIFETIME_TIMER) && FSL_FEATURE_PIT_HAS_LIFETIME_TIMER |
<> | 144:ef7eb2e8f9f7 | 106 | |
<> | 144:ef7eb2e8f9f7 | 107 | uint64_t PIT_GetLifetimeTimerCount(PIT_Type *base) |
<> | 144:ef7eb2e8f9f7 | 108 | { |
<> | 144:ef7eb2e8f9f7 | 109 | uint32_t valueH = 0U; |
<> | 144:ef7eb2e8f9f7 | 110 | uint32_t valueL = 0U; |
<> | 144:ef7eb2e8f9f7 | 111 | |
<> | 144:ef7eb2e8f9f7 | 112 | /* LTMR64H should be read before LTMR64L */ |
<> | 144:ef7eb2e8f9f7 | 113 | valueH = base->LTMR64H; |
<> | 144:ef7eb2e8f9f7 | 114 | valueL = base->LTMR64L; |
<> | 144:ef7eb2e8f9f7 | 115 | |
<> | 144:ef7eb2e8f9f7 | 116 | return (((uint64_t)valueH << 32U) + (uint64_t)(valueL)); |
<> | 144:ef7eb2e8f9f7 | 117 | } |
<> | 144:ef7eb2e8f9f7 | 118 | |
<> | 144:ef7eb2e8f9f7 | 119 | #endif /* FSL_FEATURE_PIT_HAS_LIFETIME_TIMER */ |