added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_llwu.c@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 144:ef7eb2e8f9f7 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 144:ef7eb2e8f9f7 | 13 | * other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 144:ef7eb2e8f9f7 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 144:ef7eb2e8f9f7 | 17 | * software without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 18 | * |
<> | 144:ef7eb2e8f9f7 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | #include "fsl_llwu.h" |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) |
<> | 144:ef7eb2e8f9f7 | 34 | void LLWU_SetExternalWakeupPinMode(LLWU_Type *base, uint32_t pinIndex, llwu_external_pin_mode_t pinMode) |
<> | 144:ef7eb2e8f9f7 | 35 | { |
<> | 144:ef7eb2e8f9f7 | 36 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 37 | volatile uint32_t *regBase; |
<> | 144:ef7eb2e8f9f7 | 38 | uint32_t regOffset; |
<> | 144:ef7eb2e8f9f7 | 39 | uint32_t reg; |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | switch (pinIndex >> 4U) |
<> | 144:ef7eb2e8f9f7 | 42 | { |
<> | 144:ef7eb2e8f9f7 | 43 | case 0U: |
<> | 144:ef7eb2e8f9f7 | 44 | regBase = &base->PE1; |
<> | 144:ef7eb2e8f9f7 | 45 | break; |
<> | 144:ef7eb2e8f9f7 | 46 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16)) |
<> | 144:ef7eb2e8f9f7 | 47 | case 1U: |
<> | 144:ef7eb2e8f9f7 | 48 | regBase = &base->PE2; |
<> | 144:ef7eb2e8f9f7 | 49 | break; |
<> | 144:ef7eb2e8f9f7 | 50 | #endif |
<> | 144:ef7eb2e8f9f7 | 51 | default: |
<> | 144:ef7eb2e8f9f7 | 52 | regBase = NULL; |
<> | 144:ef7eb2e8f9f7 | 53 | break; |
<> | 144:ef7eb2e8f9f7 | 54 | } |
<> | 144:ef7eb2e8f9f7 | 55 | #else |
<> | 144:ef7eb2e8f9f7 | 56 | volatile uint8_t *regBase; |
<> | 144:ef7eb2e8f9f7 | 57 | uint8_t regOffset; |
<> | 144:ef7eb2e8f9f7 | 58 | uint8_t reg; |
<> | 144:ef7eb2e8f9f7 | 59 | switch (pinIndex >> 2U) |
<> | 144:ef7eb2e8f9f7 | 60 | { |
<> | 144:ef7eb2e8f9f7 | 61 | case 0U: |
<> | 144:ef7eb2e8f9f7 | 62 | regBase = &base->PE1; |
<> | 144:ef7eb2e8f9f7 | 63 | break; |
<> | 144:ef7eb2e8f9f7 | 64 | case 1U: |
<> | 144:ef7eb2e8f9f7 | 65 | regBase = &base->PE2; |
<> | 144:ef7eb2e8f9f7 | 66 | break; |
<> | 144:ef7eb2e8f9f7 | 67 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8)) |
<> | 144:ef7eb2e8f9f7 | 68 | case 2U: |
<> | 144:ef7eb2e8f9f7 | 69 | regBase = &base->PE3; |
<> | 144:ef7eb2e8f9f7 | 70 | break; |
<> | 144:ef7eb2e8f9f7 | 71 | #endif |
<> | 144:ef7eb2e8f9f7 | 72 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 12)) |
<> | 144:ef7eb2e8f9f7 | 73 | case 3U: |
<> | 144:ef7eb2e8f9f7 | 74 | regBase = &base->PE4; |
<> | 144:ef7eb2e8f9f7 | 75 | break; |
<> | 144:ef7eb2e8f9f7 | 76 | #endif |
<> | 144:ef7eb2e8f9f7 | 77 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16)) |
<> | 144:ef7eb2e8f9f7 | 78 | case 4U: |
<> | 144:ef7eb2e8f9f7 | 79 | regBase = &base->PE5; |
<> | 144:ef7eb2e8f9f7 | 80 | break; |
<> | 144:ef7eb2e8f9f7 | 81 | #endif |
<> | 144:ef7eb2e8f9f7 | 82 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 20)) |
<> | 144:ef7eb2e8f9f7 | 83 | case 5U: |
<> | 144:ef7eb2e8f9f7 | 84 | regBase = &base->PE6; |
<> | 144:ef7eb2e8f9f7 | 85 | break; |
<> | 144:ef7eb2e8f9f7 | 86 | #endif |
<> | 144:ef7eb2e8f9f7 | 87 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24)) |
<> | 144:ef7eb2e8f9f7 | 88 | case 6U: |
<> | 144:ef7eb2e8f9f7 | 89 | regBase = &base->PE7; |
<> | 144:ef7eb2e8f9f7 | 90 | break; |
<> | 144:ef7eb2e8f9f7 | 91 | #endif |
<> | 144:ef7eb2e8f9f7 | 92 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 28)) |
<> | 144:ef7eb2e8f9f7 | 93 | case 7U: |
<> | 144:ef7eb2e8f9f7 | 94 | regBase = &base->PE8; |
<> | 144:ef7eb2e8f9f7 | 95 | break; |
<> | 144:ef7eb2e8f9f7 | 96 | #endif |
<> | 144:ef7eb2e8f9f7 | 97 | default: |
<> | 144:ef7eb2e8f9f7 | 98 | regBase = NULL; |
<> | 144:ef7eb2e8f9f7 | 99 | break; |
<> | 144:ef7eb2e8f9f7 | 100 | } |
<> | 144:ef7eb2e8f9f7 | 101 | #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH == 32 */ |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | if (regBase) |
<> | 144:ef7eb2e8f9f7 | 104 | { |
<> | 144:ef7eb2e8f9f7 | 105 | reg = *regBase; |
<> | 144:ef7eb2e8f9f7 | 106 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 107 | regOffset = ((pinIndex & 0x0FU) << 1U); |
<> | 144:ef7eb2e8f9f7 | 108 | #else |
<> | 144:ef7eb2e8f9f7 | 109 | regOffset = ((pinIndex & 0x03U) << 1U); |
<> | 144:ef7eb2e8f9f7 | 110 | #endif |
<> | 144:ef7eb2e8f9f7 | 111 | reg &= ~(0x3U << regOffset); |
<> | 144:ef7eb2e8f9f7 | 112 | reg |= ((uint32_t)pinMode << regOffset); |
<> | 144:ef7eb2e8f9f7 | 113 | *regBase = reg; |
<> | 144:ef7eb2e8f9f7 | 114 | } |
<> | 144:ef7eb2e8f9f7 | 115 | } |
<> | 144:ef7eb2e8f9f7 | 116 | |
<> | 144:ef7eb2e8f9f7 | 117 | bool LLWU_GetExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex) |
<> | 144:ef7eb2e8f9f7 | 118 | { |
<> | 144:ef7eb2e8f9f7 | 119 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 120 | return (bool)(base->PF & (1U << pinIndex)); |
<> | 144:ef7eb2e8f9f7 | 121 | #else |
<> | 144:ef7eb2e8f9f7 | 122 | volatile uint8_t *regBase; |
<> | 144:ef7eb2e8f9f7 | 123 | |
<> | 144:ef7eb2e8f9f7 | 124 | switch (pinIndex >> 3U) |
<> | 144:ef7eb2e8f9f7 | 125 | { |
<> | 144:ef7eb2e8f9f7 | 126 | #if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF) |
<> | 144:ef7eb2e8f9f7 | 127 | case 0U: |
<> | 144:ef7eb2e8f9f7 | 128 | regBase = &base->PF1; |
<> | 144:ef7eb2e8f9f7 | 129 | break; |
<> | 144:ef7eb2e8f9f7 | 130 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8)) |
<> | 144:ef7eb2e8f9f7 | 131 | case 1U: |
<> | 144:ef7eb2e8f9f7 | 132 | regBase = &base->PF2; |
<> | 144:ef7eb2e8f9f7 | 133 | break; |
<> | 144:ef7eb2e8f9f7 | 134 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 135 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16)) |
<> | 144:ef7eb2e8f9f7 | 136 | case 2U: |
<> | 144:ef7eb2e8f9f7 | 137 | regBase = &base->PF3; |
<> | 144:ef7eb2e8f9f7 | 138 | break; |
<> | 144:ef7eb2e8f9f7 | 139 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 140 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24)) |
<> | 144:ef7eb2e8f9f7 | 141 | case 3U: |
<> | 144:ef7eb2e8f9f7 | 142 | regBase = &base->PF4; |
<> | 144:ef7eb2e8f9f7 | 143 | break; |
<> | 144:ef7eb2e8f9f7 | 144 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 145 | #else |
<> | 144:ef7eb2e8f9f7 | 146 | case 0U: |
<> | 144:ef7eb2e8f9f7 | 147 | regBase = &base->F1; |
<> | 144:ef7eb2e8f9f7 | 148 | break; |
<> | 144:ef7eb2e8f9f7 | 149 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8)) |
<> | 144:ef7eb2e8f9f7 | 150 | case 1U: |
<> | 144:ef7eb2e8f9f7 | 151 | regBase = &base->F2; |
<> | 144:ef7eb2e8f9f7 | 152 | break; |
<> | 144:ef7eb2e8f9f7 | 153 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 154 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16)) |
<> | 144:ef7eb2e8f9f7 | 155 | case 2U: |
<> | 144:ef7eb2e8f9f7 | 156 | regBase = &base->F3; |
<> | 144:ef7eb2e8f9f7 | 157 | break; |
<> | 144:ef7eb2e8f9f7 | 158 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 159 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24)) |
<> | 144:ef7eb2e8f9f7 | 160 | case 3U: |
<> | 144:ef7eb2e8f9f7 | 161 | regBase = &base->F4; |
<> | 144:ef7eb2e8f9f7 | 162 | break; |
<> | 144:ef7eb2e8f9f7 | 163 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 164 | #endif /* FSL_FEATURE_LLWU_HAS_PF */ |
<> | 144:ef7eb2e8f9f7 | 165 | default: |
<> | 144:ef7eb2e8f9f7 | 166 | regBase = NULL; |
<> | 144:ef7eb2e8f9f7 | 167 | break; |
<> | 144:ef7eb2e8f9f7 | 168 | } |
<> | 144:ef7eb2e8f9f7 | 169 | |
<> | 144:ef7eb2e8f9f7 | 170 | if (regBase) |
<> | 144:ef7eb2e8f9f7 | 171 | { |
<> | 144:ef7eb2e8f9f7 | 172 | return (bool)(*regBase & (1U << pinIndex % 8)); |
<> | 144:ef7eb2e8f9f7 | 173 | } |
<> | 144:ef7eb2e8f9f7 | 174 | else |
<> | 144:ef7eb2e8f9f7 | 175 | { |
<> | 144:ef7eb2e8f9f7 | 176 | return false; |
<> | 144:ef7eb2e8f9f7 | 177 | } |
<> | 144:ef7eb2e8f9f7 | 178 | #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */ |
<> | 144:ef7eb2e8f9f7 | 179 | } |
<> | 144:ef7eb2e8f9f7 | 180 | |
<> | 144:ef7eb2e8f9f7 | 181 | void LLWU_ClearExternalWakeupPinFlag(LLWU_Type *base, uint32_t pinIndex) |
<> | 144:ef7eb2e8f9f7 | 182 | { |
<> | 144:ef7eb2e8f9f7 | 183 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 184 | base->PF = (1U << pinIndex); |
<> | 144:ef7eb2e8f9f7 | 185 | #else |
<> | 144:ef7eb2e8f9f7 | 186 | volatile uint8_t *regBase; |
<> | 144:ef7eb2e8f9f7 | 187 | switch (pinIndex >> 3U) |
<> | 144:ef7eb2e8f9f7 | 188 | { |
<> | 144:ef7eb2e8f9f7 | 189 | #if (defined(FSL_FEATURE_LLWU_HAS_PF) && FSL_FEATURE_LLWU_HAS_PF) |
<> | 144:ef7eb2e8f9f7 | 190 | case 0U: |
<> | 144:ef7eb2e8f9f7 | 191 | regBase = &base->PF1; |
<> | 144:ef7eb2e8f9f7 | 192 | break; |
<> | 144:ef7eb2e8f9f7 | 193 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8)) |
<> | 144:ef7eb2e8f9f7 | 194 | case 1U: |
<> | 144:ef7eb2e8f9f7 | 195 | regBase = &base->PF2; |
<> | 144:ef7eb2e8f9f7 | 196 | break; |
<> | 144:ef7eb2e8f9f7 | 197 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 198 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16)) |
<> | 144:ef7eb2e8f9f7 | 199 | case 2U: |
<> | 144:ef7eb2e8f9f7 | 200 | regBase = &base->PF3; |
<> | 144:ef7eb2e8f9f7 | 201 | break; |
<> | 144:ef7eb2e8f9f7 | 202 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 203 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24)) |
<> | 144:ef7eb2e8f9f7 | 204 | case 3U: |
<> | 144:ef7eb2e8f9f7 | 205 | regBase = &base->PF4; |
<> | 144:ef7eb2e8f9f7 | 206 | break; |
<> | 144:ef7eb2e8f9f7 | 207 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 208 | #else |
<> | 144:ef7eb2e8f9f7 | 209 | case 0U: |
<> | 144:ef7eb2e8f9f7 | 210 | regBase = &base->F1; |
<> | 144:ef7eb2e8f9f7 | 211 | break; |
<> | 144:ef7eb2e8f9f7 | 212 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 8)) |
<> | 144:ef7eb2e8f9f7 | 213 | case 1U: |
<> | 144:ef7eb2e8f9f7 | 214 | regBase = &base->F2; |
<> | 144:ef7eb2e8f9f7 | 215 | break; |
<> | 144:ef7eb2e8f9f7 | 216 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 217 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 16)) |
<> | 144:ef7eb2e8f9f7 | 218 | case 2U: |
<> | 144:ef7eb2e8f9f7 | 219 | regBase = &base->F3; |
<> | 144:ef7eb2e8f9f7 | 220 | break; |
<> | 144:ef7eb2e8f9f7 | 221 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 222 | #if (defined(FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN) && (FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN > 24)) |
<> | 144:ef7eb2e8f9f7 | 223 | case 3U: |
<> | 144:ef7eb2e8f9f7 | 224 | regBase = &base->F4; |
<> | 144:ef7eb2e8f9f7 | 225 | break; |
<> | 144:ef7eb2e8f9f7 | 226 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 227 | #endif /* FSL_FEATURE_LLWU_HAS_PF */ |
<> | 144:ef7eb2e8f9f7 | 228 | default: |
<> | 144:ef7eb2e8f9f7 | 229 | regBase = NULL; |
<> | 144:ef7eb2e8f9f7 | 230 | break; |
<> | 144:ef7eb2e8f9f7 | 231 | } |
<> | 144:ef7eb2e8f9f7 | 232 | if (regBase) |
<> | 144:ef7eb2e8f9f7 | 233 | { |
<> | 144:ef7eb2e8f9f7 | 234 | *regBase = (1U << pinIndex % 8U); |
<> | 144:ef7eb2e8f9f7 | 235 | } |
<> | 144:ef7eb2e8f9f7 | 236 | #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */ |
<> | 144:ef7eb2e8f9f7 | 237 | } |
<> | 144:ef7eb2e8f9f7 | 238 | #endif /* FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN */ |
<> | 144:ef7eb2e8f9f7 | 239 | |
<> | 144:ef7eb2e8f9f7 | 240 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && FSL_FEATURE_LLWU_HAS_PIN_FILTER) |
<> | 144:ef7eb2e8f9f7 | 241 | void LLWU_SetPinFilterMode(LLWU_Type *base, uint32_t filterIndex, llwu_external_pin_filter_mode_t filterMode) |
<> | 144:ef7eb2e8f9f7 | 242 | { |
<> | 144:ef7eb2e8f9f7 | 243 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 244 | uint32_t reg; |
<> | 144:ef7eb2e8f9f7 | 245 | |
<> | 144:ef7eb2e8f9f7 | 246 | reg = base->FILT; |
<> | 144:ef7eb2e8f9f7 | 247 | reg &= ~((LLWU_FILT_FILTSEL1_MASK | LLWU_FILT_FILTE1_MASK) << (filterIndex * 8U - 1U)); |
<> | 144:ef7eb2e8f9f7 | 248 | reg |= (((filterMode.pinIndex << LLWU_FILT_FILTSEL1_SHIFT) | (filterMode.filterMode << LLWU_FILT_FILTE1_SHIFT) |
<> | 144:ef7eb2e8f9f7 | 249 | /* Clear the Filter Detect Flag */ |
<> | 144:ef7eb2e8f9f7 | 250 | | LLWU_FILT_FILTF1_MASK) |
<> | 144:ef7eb2e8f9f7 | 251 | << (filterIndex * 8U - 1U)); |
<> | 144:ef7eb2e8f9f7 | 252 | base->FILT = reg; |
<> | 144:ef7eb2e8f9f7 | 253 | #else |
<> | 144:ef7eb2e8f9f7 | 254 | volatile uint8_t *regBase; |
<> | 144:ef7eb2e8f9f7 | 255 | uint8_t reg; |
<> | 144:ef7eb2e8f9f7 | 256 | |
<> | 144:ef7eb2e8f9f7 | 257 | switch (filterIndex) |
<> | 144:ef7eb2e8f9f7 | 258 | { |
<> | 144:ef7eb2e8f9f7 | 259 | case 1: |
<> | 144:ef7eb2e8f9f7 | 260 | regBase = &base->FILT1; |
<> | 144:ef7eb2e8f9f7 | 261 | break; |
<> | 144:ef7eb2e8f9f7 | 262 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1)) |
<> | 144:ef7eb2e8f9f7 | 263 | case 2: |
<> | 144:ef7eb2e8f9f7 | 264 | regBase = &base->FILT2; |
<> | 144:ef7eb2e8f9f7 | 265 | break; |
<> | 144:ef7eb2e8f9f7 | 266 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 267 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2)) |
<> | 144:ef7eb2e8f9f7 | 268 | case 3: |
<> | 144:ef7eb2e8f9f7 | 269 | regBase = &base->FILT3; |
<> | 144:ef7eb2e8f9f7 | 270 | break; |
<> | 144:ef7eb2e8f9f7 | 271 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 272 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3)) |
<> | 144:ef7eb2e8f9f7 | 273 | case 4: |
<> | 144:ef7eb2e8f9f7 | 274 | regBase = &base->FILT4; |
<> | 144:ef7eb2e8f9f7 | 275 | break; |
<> | 144:ef7eb2e8f9f7 | 276 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 277 | default: |
<> | 144:ef7eb2e8f9f7 | 278 | regBase = NULL; |
<> | 144:ef7eb2e8f9f7 | 279 | break; |
<> | 144:ef7eb2e8f9f7 | 280 | } |
<> | 144:ef7eb2e8f9f7 | 281 | |
<> | 144:ef7eb2e8f9f7 | 282 | if (regBase) |
<> | 144:ef7eb2e8f9f7 | 283 | { |
<> | 144:ef7eb2e8f9f7 | 284 | reg = *regBase; |
<> | 144:ef7eb2e8f9f7 | 285 | reg &= ~(LLWU_FILT1_FILTSEL_MASK | LLWU_FILT1_FILTE_MASK); |
<> | 144:ef7eb2e8f9f7 | 286 | reg |= ((uint32_t)filterMode.pinIndex << LLWU_FILT1_FILTSEL_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 287 | reg |= ((uint32_t)filterMode.filterMode << LLWU_FILT1_FILTE_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 288 | /* Clear the Filter Detect Flag */ |
<> | 144:ef7eb2e8f9f7 | 289 | reg |= LLWU_FILT1_FILTF_MASK; |
<> | 144:ef7eb2e8f9f7 | 290 | *regBase = reg; |
<> | 144:ef7eb2e8f9f7 | 291 | } |
<> | 144:ef7eb2e8f9f7 | 292 | #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */ |
<> | 144:ef7eb2e8f9f7 | 293 | } |
<> | 144:ef7eb2e8f9f7 | 294 | |
<> | 144:ef7eb2e8f9f7 | 295 | bool LLWU_GetPinFilterFlag(LLWU_Type *base, uint32_t filterIndex) |
<> | 144:ef7eb2e8f9f7 | 296 | { |
<> | 144:ef7eb2e8f9f7 | 297 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 298 | return (bool)(base->FILT & (1U << (filterIndex * 8U - 1))); |
<> | 144:ef7eb2e8f9f7 | 299 | #else |
<> | 144:ef7eb2e8f9f7 | 300 | bool status = false; |
<> | 144:ef7eb2e8f9f7 | 301 | |
<> | 144:ef7eb2e8f9f7 | 302 | switch (filterIndex) |
<> | 144:ef7eb2e8f9f7 | 303 | { |
<> | 144:ef7eb2e8f9f7 | 304 | case 1: |
<> | 144:ef7eb2e8f9f7 | 305 | status = (base->FILT1 & LLWU_FILT1_FILTF_MASK); |
<> | 144:ef7eb2e8f9f7 | 306 | break; |
<> | 144:ef7eb2e8f9f7 | 307 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1)) |
<> | 144:ef7eb2e8f9f7 | 308 | case 2: |
<> | 144:ef7eb2e8f9f7 | 309 | status = (base->FILT2 & LLWU_FILT2_FILTF_MASK); |
<> | 144:ef7eb2e8f9f7 | 310 | break; |
<> | 144:ef7eb2e8f9f7 | 311 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 312 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2)) |
<> | 144:ef7eb2e8f9f7 | 313 | case 3: |
<> | 144:ef7eb2e8f9f7 | 314 | status = (base->FILT3 & LLWU_FILT3_FILTF_MASK); |
<> | 144:ef7eb2e8f9f7 | 315 | break; |
<> | 144:ef7eb2e8f9f7 | 316 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 317 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3)) |
<> | 144:ef7eb2e8f9f7 | 318 | case 4: |
<> | 144:ef7eb2e8f9f7 | 319 | status = (base->FILT4 & LLWU_FILT4_FILTF_MASK); |
<> | 144:ef7eb2e8f9f7 | 320 | break; |
<> | 144:ef7eb2e8f9f7 | 321 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 322 | default: |
<> | 144:ef7eb2e8f9f7 | 323 | break; |
<> | 144:ef7eb2e8f9f7 | 324 | } |
<> | 144:ef7eb2e8f9f7 | 325 | |
<> | 144:ef7eb2e8f9f7 | 326 | return status; |
<> | 144:ef7eb2e8f9f7 | 327 | #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */ |
<> | 144:ef7eb2e8f9f7 | 328 | } |
<> | 144:ef7eb2e8f9f7 | 329 | |
<> | 144:ef7eb2e8f9f7 | 330 | void LLWU_ClearPinFilterFlag(LLWU_Type *base, uint32_t filterIndex) |
<> | 144:ef7eb2e8f9f7 | 331 | { |
<> | 144:ef7eb2e8f9f7 | 332 | #if (defined(FSL_FEATURE_LLWU_REG_BITWIDTH) && (FSL_FEATURE_LLWU_REG_BITWIDTH == 32)) |
<> | 144:ef7eb2e8f9f7 | 333 | uint32_t reg; |
<> | 144:ef7eb2e8f9f7 | 334 | |
<> | 144:ef7eb2e8f9f7 | 335 | reg = base->FILT; |
<> | 144:ef7eb2e8f9f7 | 336 | switch (filterIndex) |
<> | 144:ef7eb2e8f9f7 | 337 | { |
<> | 144:ef7eb2e8f9f7 | 338 | case 1: |
<> | 144:ef7eb2e8f9f7 | 339 | reg |= LLWU_FILT_FILTF1_MASK; |
<> | 144:ef7eb2e8f9f7 | 340 | break; |
<> | 144:ef7eb2e8f9f7 | 341 | case 2: |
<> | 144:ef7eb2e8f9f7 | 342 | reg |= LLWU_FILT_FILTF2_MASK; |
<> | 144:ef7eb2e8f9f7 | 343 | break; |
<> | 144:ef7eb2e8f9f7 | 344 | case 3: |
<> | 144:ef7eb2e8f9f7 | 345 | reg |= LLWU_FILT_FILTF3_MASK; |
<> | 144:ef7eb2e8f9f7 | 346 | break; |
<> | 144:ef7eb2e8f9f7 | 347 | case 4: |
<> | 144:ef7eb2e8f9f7 | 348 | reg |= LLWU_FILT_FILTF4_MASK; |
<> | 144:ef7eb2e8f9f7 | 349 | break; |
<> | 144:ef7eb2e8f9f7 | 350 | default: |
<> | 144:ef7eb2e8f9f7 | 351 | break; |
<> | 144:ef7eb2e8f9f7 | 352 | } |
<> | 144:ef7eb2e8f9f7 | 353 | base->FILT = reg; |
<> | 144:ef7eb2e8f9f7 | 354 | #else |
<> | 144:ef7eb2e8f9f7 | 355 | volatile uint8_t *regBase; |
<> | 144:ef7eb2e8f9f7 | 356 | uint8_t reg; |
<> | 144:ef7eb2e8f9f7 | 357 | |
<> | 144:ef7eb2e8f9f7 | 358 | switch (filterIndex) |
<> | 144:ef7eb2e8f9f7 | 359 | { |
<> | 144:ef7eb2e8f9f7 | 360 | case 1: |
<> | 144:ef7eb2e8f9f7 | 361 | regBase = &base->FILT1; |
<> | 144:ef7eb2e8f9f7 | 362 | break; |
<> | 144:ef7eb2e8f9f7 | 363 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 1)) |
<> | 144:ef7eb2e8f9f7 | 364 | case 2: |
<> | 144:ef7eb2e8f9f7 | 365 | regBase = &base->FILT2; |
<> | 144:ef7eb2e8f9f7 | 366 | break; |
<> | 144:ef7eb2e8f9f7 | 367 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 368 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 2)) |
<> | 144:ef7eb2e8f9f7 | 369 | case 3: |
<> | 144:ef7eb2e8f9f7 | 370 | regBase = &base->FILT3; |
<> | 144:ef7eb2e8f9f7 | 371 | break; |
<> | 144:ef7eb2e8f9f7 | 372 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 373 | #if (defined(FSL_FEATURE_LLWU_HAS_PIN_FILTER) && (FSL_FEATURE_LLWU_HAS_PIN_FILTER > 3)) |
<> | 144:ef7eb2e8f9f7 | 374 | case 4: |
<> | 144:ef7eb2e8f9f7 | 375 | regBase = &base->FILT4; |
<> | 144:ef7eb2e8f9f7 | 376 | break; |
<> | 144:ef7eb2e8f9f7 | 377 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 378 | default: |
<> | 144:ef7eb2e8f9f7 | 379 | regBase = NULL; |
<> | 144:ef7eb2e8f9f7 | 380 | break; |
<> | 144:ef7eb2e8f9f7 | 381 | } |
<> | 144:ef7eb2e8f9f7 | 382 | |
<> | 144:ef7eb2e8f9f7 | 383 | if (regBase) |
<> | 144:ef7eb2e8f9f7 | 384 | { |
<> | 144:ef7eb2e8f9f7 | 385 | reg = *regBase; |
<> | 144:ef7eb2e8f9f7 | 386 | reg |= LLWU_FILT1_FILTF_MASK; |
<> | 144:ef7eb2e8f9f7 | 387 | *regBase = reg; |
<> | 144:ef7eb2e8f9f7 | 388 | } |
<> | 144:ef7eb2e8f9f7 | 389 | #endif /* FSL_FEATURE_LLWU_REG_BITWIDTH */ |
<> | 144:ef7eb2e8f9f7 | 390 | } |
<> | 144:ef7eb2e8f9f7 | 391 | #endif /* FSL_FEATURE_LLWU_HAS_PIN_FILTER */ |
<> | 144:ef7eb2e8f9f7 | 392 | |
<> | 144:ef7eb2e8f9f7 | 393 | #if (defined(FSL_FEATURE_LLWU_HAS_RESET_ENABLE) && FSL_FEATURE_LLWU_HAS_RESET_ENABLE) |
<> | 144:ef7eb2e8f9f7 | 394 | void LLWU_SetResetPinMode(LLWU_Type *base, bool pinEnable, bool enableInLowLeakageMode) |
<> | 144:ef7eb2e8f9f7 | 395 | { |
<> | 144:ef7eb2e8f9f7 | 396 | uint8_t reg; |
<> | 144:ef7eb2e8f9f7 | 397 | |
<> | 144:ef7eb2e8f9f7 | 398 | reg = base->RST; |
<> | 144:ef7eb2e8f9f7 | 399 | reg &= ~(LLWU_RST_LLRSTE_MASK | LLWU_RST_RSTFILT_MASK); |
<> | 144:ef7eb2e8f9f7 | 400 | reg |= |
<> | 144:ef7eb2e8f9f7 | 401 | (((uint32_t)pinEnable << LLWU_RST_LLRSTE_SHIFT) | ((uint32_t)enableInLowLeakageMode << LLWU_RST_RSTFILT_SHIFT)); |
<> | 144:ef7eb2e8f9f7 | 402 | base->RST = reg; |
<> | 144:ef7eb2e8f9f7 | 403 | } |
<> | 144:ef7eb2e8f9f7 | 404 | #endif /* FSL_FEATURE_LLWU_HAS_RESET_ENABLE */ |