Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_i2c_dma.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #ifndef _FSL_I2C_DMA_H_
<> 144:ef7eb2e8f9f7 31 #define _FSL_I2C_DMA_H_
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "fsl_i2c.h"
<> 144:ef7eb2e8f9f7 34 #include "fsl_dmamux.h"
<> 144:ef7eb2e8f9f7 35 #include "fsl_dma.h"
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /*!
<> 144:ef7eb2e8f9f7 38 * @addtogroup i2c_dma_driver
<> 144:ef7eb2e8f9f7 39 * @{
<> 144:ef7eb2e8f9f7 40 */
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /*! @file */
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /*******************************************************************************
<> 144:ef7eb2e8f9f7 45 * Definitions
<> 144:ef7eb2e8f9f7 46 ******************************************************************************/
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /*! @brief I2C master dma handle typedef. */
<> 144:ef7eb2e8f9f7 49 typedef struct _i2c_master_dma_handle i2c_master_dma_handle_t;
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /*! @brief I2C master dma transfer callback typedef. */
<> 144:ef7eb2e8f9f7 52 typedef void (*i2c_master_dma_transfer_callback_t)(I2C_Type *base,
<> 144:ef7eb2e8f9f7 53 i2c_master_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 54 status_t status,
<> 144:ef7eb2e8f9f7 55 void *userData);
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /*! @brief I2C master dma transfer structure. */
<> 144:ef7eb2e8f9f7 58 struct _i2c_master_dma_handle
<> 144:ef7eb2e8f9f7 59 {
<> 144:ef7eb2e8f9f7 60 i2c_master_transfer_t transfer; /*!< I2C master transfer struct. */
<> 144:ef7eb2e8f9f7 61 size_t transferSize; /*!< Total bytes to be transferred. */
<> 144:ef7eb2e8f9f7 62 uint8_t state; /*!< I2C master transfer status. */
<> 144:ef7eb2e8f9f7 63 dma_handle_t *dmaHandle; /*!< The DMA handler used. */
<> 144:ef7eb2e8f9f7 64 i2c_master_dma_transfer_callback_t completionCallback; /*!< Callback function called after dma transfer finished. */
<> 144:ef7eb2e8f9f7 65 void *userData; /*!< Callback parameter passed to callback function. */
<> 144:ef7eb2e8f9f7 66 };
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /*******************************************************************************
<> 144:ef7eb2e8f9f7 69 * API
<> 144:ef7eb2e8f9f7 70 ******************************************************************************/
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 73 extern "C" {
<> 144:ef7eb2e8f9f7 74 #endif /*_cplusplus. */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 /*!
<> 144:ef7eb2e8f9f7 77 * @name I2C Block DMA Transfer Operation
<> 144:ef7eb2e8f9f7 78 * @{
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /*!
<> 144:ef7eb2e8f9f7 82 * @brief Init the I2C handle which is used in transcational functions
<> 144:ef7eb2e8f9f7 83 *
<> 144:ef7eb2e8f9f7 84 * @param base I2C peripheral base address
<> 144:ef7eb2e8f9f7 85 * @param handle pointer to i2c_master_dma_handle_t structure
<> 144:ef7eb2e8f9f7 86 * @param callback pointer to user callback function
<> 144:ef7eb2e8f9f7 87 * @param userData user param passed to the callback function
<> 144:ef7eb2e8f9f7 88 * @param dmaHandle DMA handle pointer
<> 144:ef7eb2e8f9f7 89 */
<> 144:ef7eb2e8f9f7 90 void I2C_MasterTransferCreateHandleDMA(I2C_Type *base,
<> 144:ef7eb2e8f9f7 91 i2c_master_dma_handle_t *handle,
<> 144:ef7eb2e8f9f7 92 i2c_master_dma_transfer_callback_t callback,
<> 144:ef7eb2e8f9f7 93 void *userData,
<> 144:ef7eb2e8f9f7 94 dma_handle_t *dmaHandle);
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /*!
<> 144:ef7eb2e8f9f7 97 * @brief Performs a master dma non-blocking transfer on the I2C bus
<> 144:ef7eb2e8f9f7 98 *
<> 144:ef7eb2e8f9f7 99 * @param base I2C peripheral base address
<> 144:ef7eb2e8f9f7 100 * @param handle pointer to i2c_master_dma_handle_t structure
<> 144:ef7eb2e8f9f7 101 * @param xfer pointer to transfer structure of i2c_master_transfer_t
<> 144:ef7eb2e8f9f7 102 * @retval kStatus_Success Sucessully complete the data transmission.
<> 144:ef7eb2e8f9f7 103 * @retval kStatus_I2C_Busy Previous transmission still not finished.
<> 144:ef7eb2e8f9f7 104 * @retval kStatus_I2C_Timeout Transfer error, wait signal timeout.
<> 144:ef7eb2e8f9f7 105 * @retval kStatus_I2C_ArbitrationLost Transfer error, arbitration lost.
<> 144:ef7eb2e8f9f7 106 * @retval kStataus_I2C_Nak Transfer error, receive Nak during transfer.
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108 status_t I2C_MasterTransferDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_transfer_t *xfer);
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /*!
<> 144:ef7eb2e8f9f7 111 * @brief Get master transfer status during a dma non-blocking transfer
<> 144:ef7eb2e8f9f7 112 *
<> 144:ef7eb2e8f9f7 113 * @param base I2C peripheral base address
<> 144:ef7eb2e8f9f7 114 * @param handle pointer to i2c_master_dma_handle_t structure
<> 144:ef7eb2e8f9f7 115 * @param count Number of bytes transferred so far by the non-blocking transaction.
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117 status_t I2C_MasterTransferGetCountDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, size_t *count);
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /*!
<> 144:ef7eb2e8f9f7 120 * @brief Abort a master dma non-blocking transfer in a early time
<> 144:ef7eb2e8f9f7 121 *
<> 144:ef7eb2e8f9f7 122 * @param base I2C peripheral base address
<> 144:ef7eb2e8f9f7 123 * @param handle pointer to i2c_master_dma_handle_t structure
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125 void I2C_MasterTransferAbortDMA(I2C_Type *base, i2c_master_dma_handle_t *handle);
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /* @} */
<> 144:ef7eb2e8f9f7 128 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 129 }
<> 144:ef7eb2e8f9f7 130 #endif /*_cplusplus. */
<> 144:ef7eb2e8f9f7 131 /*@}*/
<> 144:ef7eb2e8f9f7 132 #endif /*_FSL_I2C_DMA_H_*/