added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_flexio_uart.h@147:ba84b7dc41a7, 2016-09-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Sep 10 15:32:04 2016 +0000
- Revision:
- 147:ba84b7dc41a7
- Parent:
- 144:ef7eb2e8f9f7
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. |
<> | 144:ef7eb2e8f9f7 | 3 | * All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 4 | * |
<> | 144:ef7eb2e8f9f7 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 6 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 144:ef7eb2e8f9f7 | 9 | * of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 144:ef7eb2e8f9f7 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 144:ef7eb2e8f9f7 | 13 | * other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 14 | * |
<> | 144:ef7eb2e8f9f7 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 144:ef7eb2e8f9f7 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 144:ef7eb2e8f9f7 | 17 | * software without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 18 | * |
<> | 144:ef7eb2e8f9f7 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 144:ef7eb2e8f9f7 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 144:ef7eb2e8f9f7 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 144:ef7eb2e8f9f7 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 144:ef7eb2e8f9f7 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 144:ef7eb2e8f9f7 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 144:ef7eb2e8f9f7 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 144:ef7eb2e8f9f7 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 144:ef7eb2e8f9f7 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 29 | */ |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | #ifndef _FSL_FLEXIO_UART_H_ |
<> | 144:ef7eb2e8f9f7 | 32 | #define _FSL_FLEXIO_UART_H_ |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | #include "fsl_common.h" |
<> | 144:ef7eb2e8f9f7 | 35 | #include "fsl_flexio.h" |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | /*! |
<> | 144:ef7eb2e8f9f7 | 38 | * @addtogroup flexio_uart |
<> | 144:ef7eb2e8f9f7 | 39 | * @{ |
<> | 144:ef7eb2e8f9f7 | 40 | */ |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | /*! @file */ |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 45 | * Definitions |
<> | 144:ef7eb2e8f9f7 | 46 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | /*! @name Driver version */ |
<> | 144:ef7eb2e8f9f7 | 49 | /*@{*/ |
<> | 144:ef7eb2e8f9f7 | 50 | /*! @brief FlexIO UART driver version 2.1.0. */ |
<> | 144:ef7eb2e8f9f7 | 51 | #define FSL_FLEXIO_UART_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) |
<> | 144:ef7eb2e8f9f7 | 52 | /*@}*/ |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | /*! @brief Error codes for the UART driver. */ |
<> | 144:ef7eb2e8f9f7 | 55 | enum _flexio_uart_status |
<> | 144:ef7eb2e8f9f7 | 56 | { |
<> | 144:ef7eb2e8f9f7 | 57 | kStatus_FLEXIO_UART_TxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 0), /*!< Transmitter is busy. */ |
<> | 144:ef7eb2e8f9f7 | 58 | kStatus_FLEXIO_UART_RxBusy = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 1), /*!< Receiver is busy. */ |
<> | 144:ef7eb2e8f9f7 | 59 | kStatus_FLEXIO_UART_TxIdle = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 2), /*!< UART transmitter is idle. */ |
<> | 144:ef7eb2e8f9f7 | 60 | kStatus_FLEXIO_UART_RxIdle = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 3), /*!< UART receiver is idle. */ |
<> | 144:ef7eb2e8f9f7 | 61 | kStatus_FLEXIO_UART_ERROR = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 4), /*!< ERROR happens on UART. */ |
<> | 144:ef7eb2e8f9f7 | 62 | kStatus_FLEXIO_UART_RxRingBufferOverrun = |
<> | 144:ef7eb2e8f9f7 | 63 | MAKE_STATUS(kStatusGroup_FLEXIO_UART, 5), /*!< UART RX software ring buffer overrun. */ |
<> | 144:ef7eb2e8f9f7 | 64 | kStatus_FLEXIO_UART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_FLEXIO_UART, 6) /*!< UART RX receiver overrun. */ |
<> | 144:ef7eb2e8f9f7 | 65 | }; |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | /*! @brief FlexIO UART bit count per char. */ |
<> | 144:ef7eb2e8f9f7 | 68 | typedef enum _flexio_uart_bit_count_per_char |
<> | 144:ef7eb2e8f9f7 | 69 | { |
<> | 144:ef7eb2e8f9f7 | 70 | kFLEXIO_UART_7BitsPerChar = 7U, /*!< 7-bit data characters */ |
<> | 144:ef7eb2e8f9f7 | 71 | kFLEXIO_UART_8BitsPerChar = 8U, /*!< 8-bit data characters */ |
<> | 144:ef7eb2e8f9f7 | 72 | kFLEXIO_UART_9BitsPerChar = 9U, /*!< 9-bit data characters */ |
<> | 144:ef7eb2e8f9f7 | 73 | } flexio_uart_bit_count_per_char_t; |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | /*! @brief Define FlexIO UART interrupt mask. */ |
<> | 144:ef7eb2e8f9f7 | 76 | enum _flexio_uart_interrupt_enable |
<> | 144:ef7eb2e8f9f7 | 77 | { |
<> | 144:ef7eb2e8f9f7 | 78 | kFLEXIO_UART_TxDataRegEmptyInterruptEnable = 0x1U, /*!< Transmit buffer empty interrupt enable. */ |
<> | 144:ef7eb2e8f9f7 | 79 | kFLEXIO_UART_RxDataRegFullInterruptEnable = 0x2U, /*!< Receive buffer full interrupt enable. */ |
<> | 144:ef7eb2e8f9f7 | 80 | }; |
<> | 144:ef7eb2e8f9f7 | 81 | |
<> | 144:ef7eb2e8f9f7 | 82 | /*! @brief Define FlexIO UART status mask. */ |
<> | 144:ef7eb2e8f9f7 | 83 | enum _flexio_uart_status_flags |
<> | 144:ef7eb2e8f9f7 | 84 | { |
<> | 144:ef7eb2e8f9f7 | 85 | kFLEXIO_UART_TxDataRegEmptyFlag = 0x1U, /*!< Transmit buffer empty flag. */ |
<> | 144:ef7eb2e8f9f7 | 86 | kFLEXIO_UART_RxDataRegFullFlag = 0x2U, /*!< Receive buffer full flag. */ |
<> | 144:ef7eb2e8f9f7 | 87 | kFLEXIO_UART_RxOverRunFlag = 0x4U, /*!< Receive buffer over run flag. */ |
<> | 144:ef7eb2e8f9f7 | 88 | }; |
<> | 144:ef7eb2e8f9f7 | 89 | |
<> | 144:ef7eb2e8f9f7 | 90 | /*! @brief Define FlexIO UART access structure typedef. */ |
<> | 144:ef7eb2e8f9f7 | 91 | typedef struct _flexio_uart_type |
<> | 144:ef7eb2e8f9f7 | 92 | { |
<> | 144:ef7eb2e8f9f7 | 93 | FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */ |
<> | 144:ef7eb2e8f9f7 | 94 | uint8_t TxPinIndex; /*!< Pin select for UART_Tx. */ |
<> | 144:ef7eb2e8f9f7 | 95 | uint8_t RxPinIndex; /*!< Pin select for UART_Rx. */ |
<> | 144:ef7eb2e8f9f7 | 96 | uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO UART. */ |
<> | 144:ef7eb2e8f9f7 | 97 | uint8_t timerIndex[2]; /*!< Timer index used in FlexIO UART. */ |
<> | 144:ef7eb2e8f9f7 | 98 | } FLEXIO_UART_Type; |
<> | 144:ef7eb2e8f9f7 | 99 | |
<> | 144:ef7eb2e8f9f7 | 100 | /*! @brief Define FlexIO UART user configuration structure. */ |
<> | 144:ef7eb2e8f9f7 | 101 | typedef struct _flexio_uart_config |
<> | 144:ef7eb2e8f9f7 | 102 | { |
<> | 144:ef7eb2e8f9f7 | 103 | bool enableUart; /*!< Enable/disable FlexIO UART TX & RX. */ |
<> | 144:ef7eb2e8f9f7 | 104 | bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode*/ |
<> | 144:ef7eb2e8f9f7 | 105 | bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode*/ |
<> | 144:ef7eb2e8f9f7 | 106 | bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, |
<> | 144:ef7eb2e8f9f7 | 107 | fast access requires the FlexIO clock to be at least |
<> | 144:ef7eb2e8f9f7 | 108 | twice the frequency of the bus clock. */ |
<> | 144:ef7eb2e8f9f7 | 109 | uint32_t baudRate_Bps; /*!< Baud rate in Bps. */ |
<> | 144:ef7eb2e8f9f7 | 110 | flexio_uart_bit_count_per_char_t bitCountPerChar; /*!< number of bits, 7/8/9 -bit */ |
<> | 144:ef7eb2e8f9f7 | 111 | } flexio_uart_config_t; |
<> | 144:ef7eb2e8f9f7 | 112 | |
<> | 144:ef7eb2e8f9f7 | 113 | /*! @brief Define FlexIO UART transfer structure. */ |
<> | 144:ef7eb2e8f9f7 | 114 | typedef struct _flexio_uart_transfer |
<> | 144:ef7eb2e8f9f7 | 115 | { |
<> | 144:ef7eb2e8f9f7 | 116 | uint8_t *data; /*!< Transfer buffer*/ |
<> | 144:ef7eb2e8f9f7 | 117 | size_t dataSize; /*!< Transfer size*/ |
<> | 144:ef7eb2e8f9f7 | 118 | } flexio_uart_transfer_t; |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | /* Forward declaration of the handle typedef. */ |
<> | 144:ef7eb2e8f9f7 | 121 | typedef struct _flexio_uart_handle flexio_uart_handle_t; |
<> | 144:ef7eb2e8f9f7 | 122 | |
<> | 144:ef7eb2e8f9f7 | 123 | /*! @brief FlexIO UART transfer callback function. */ |
<> | 144:ef7eb2e8f9f7 | 124 | typedef void (*flexio_uart_transfer_callback_t)(FLEXIO_UART_Type *base, |
<> | 144:ef7eb2e8f9f7 | 125 | flexio_uart_handle_t *handle, |
<> | 144:ef7eb2e8f9f7 | 126 | status_t status, |
<> | 144:ef7eb2e8f9f7 | 127 | void *userData); |
<> | 144:ef7eb2e8f9f7 | 128 | |
<> | 144:ef7eb2e8f9f7 | 129 | /*! @brief Define FLEXIO UART handle structure*/ |
<> | 144:ef7eb2e8f9f7 | 130 | struct _flexio_uart_handle |
<> | 144:ef7eb2e8f9f7 | 131 | { |
<> | 144:ef7eb2e8f9f7 | 132 | uint8_t *volatile txData; /*!< Address of remaining data to send. */ |
<> | 144:ef7eb2e8f9f7 | 133 | volatile size_t txDataSize; /*!< Size of the remaining data to send. */ |
<> | 144:ef7eb2e8f9f7 | 134 | uint8_t *volatile rxData; /*!< Address of remaining data to receive. */ |
<> | 144:ef7eb2e8f9f7 | 135 | volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */ |
<> | 144:ef7eb2e8f9f7 | 136 | size_t txSize; /*!< Total bytes to be sent. */ |
<> | 144:ef7eb2e8f9f7 | 137 | size_t rxSize; /*!< Total bytes to be received. */ |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */ |
<> | 144:ef7eb2e8f9f7 | 140 | size_t rxRingBufferSize; /*!< Size of the ring buffer. */ |
<> | 144:ef7eb2e8f9f7 | 141 | volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */ |
<> | 144:ef7eb2e8f9f7 | 142 | volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */ |
<> | 144:ef7eb2e8f9f7 | 143 | |
<> | 144:ef7eb2e8f9f7 | 144 | flexio_uart_transfer_callback_t callback; /*!< Callback function. */ |
<> | 144:ef7eb2e8f9f7 | 145 | void *userData; /*!< UART callback function parameter.*/ |
<> | 144:ef7eb2e8f9f7 | 146 | |
<> | 144:ef7eb2e8f9f7 | 147 | volatile uint8_t txState; /*!< TX transfer state. */ |
<> | 144:ef7eb2e8f9f7 | 148 | volatile uint8_t rxState; /*!< RX transfer state */ |
<> | 144:ef7eb2e8f9f7 | 149 | }; |
<> | 144:ef7eb2e8f9f7 | 150 | |
<> | 144:ef7eb2e8f9f7 | 151 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 152 | * API |
<> | 144:ef7eb2e8f9f7 | 153 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 154 | |
<> | 144:ef7eb2e8f9f7 | 155 | #if defined(__cplusplus) |
<> | 144:ef7eb2e8f9f7 | 156 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 157 | #endif /*_cplusplus*/ |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | /*! |
<> | 144:ef7eb2e8f9f7 | 160 | * @name Initialization and deinitialization |
<> | 144:ef7eb2e8f9f7 | 161 | * @{ |
<> | 144:ef7eb2e8f9f7 | 162 | */ |
<> | 144:ef7eb2e8f9f7 | 163 | |
<> | 144:ef7eb2e8f9f7 | 164 | /*! |
<> | 144:ef7eb2e8f9f7 | 165 | * @brief Ungates the FlexIO clock, resets the FlexIO module, configures FlexIO UART |
<> | 144:ef7eb2e8f9f7 | 166 | * hardware, and configures the FlexIO UART with FlexIO UART configuration. |
<> | 144:ef7eb2e8f9f7 | 167 | * The configuration structure can be filled by the user, or be set with |
<> | 144:ef7eb2e8f9f7 | 168 | * default values by FLEXIO_UART_GetDefaultConfig(). |
<> | 144:ef7eb2e8f9f7 | 169 | * |
<> | 144:ef7eb2e8f9f7 | 170 | * Example |
<> | 144:ef7eb2e8f9f7 | 171 | @code |
<> | 144:ef7eb2e8f9f7 | 172 | FLEXIO_UART_Type base = { |
<> | 144:ef7eb2e8f9f7 | 173 | .flexioBase = FLEXIO, |
<> | 144:ef7eb2e8f9f7 | 174 | .TxPinIndex = 0, |
<> | 144:ef7eb2e8f9f7 | 175 | .RxPinIndex = 1, |
<> | 144:ef7eb2e8f9f7 | 176 | .shifterIndex = {0,1}, |
<> | 144:ef7eb2e8f9f7 | 177 | .timerIndex = {0,1} |
<> | 144:ef7eb2e8f9f7 | 178 | }; |
<> | 144:ef7eb2e8f9f7 | 179 | flexio_uart_config_t config = { |
<> | 144:ef7eb2e8f9f7 | 180 | .enableInDoze = false, |
<> | 144:ef7eb2e8f9f7 | 181 | .enableInDebug = true, |
<> | 144:ef7eb2e8f9f7 | 182 | .enableFastAccess = false, |
<> | 144:ef7eb2e8f9f7 | 183 | .baudRate_Bps = 115200U, |
<> | 144:ef7eb2e8f9f7 | 184 | .bitCountPerChar = 8 |
<> | 144:ef7eb2e8f9f7 | 185 | }; |
<> | 144:ef7eb2e8f9f7 | 186 | FLEXIO_UART_Init(base, &config, srcClock_Hz); |
<> | 144:ef7eb2e8f9f7 | 187 | @endcode |
<> | 144:ef7eb2e8f9f7 | 188 | * |
<> | 144:ef7eb2e8f9f7 | 189 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 190 | * @param userConfig Pointer to the flexio_uart_config_t structure. |
<> | 144:ef7eb2e8f9f7 | 191 | * @param srcClock_Hz FlexIO source clock in Hz. |
<> | 144:ef7eb2e8f9f7 | 192 | */ |
<> | 144:ef7eb2e8f9f7 | 193 | void FLEXIO_UART_Init(FLEXIO_UART_Type *base, const flexio_uart_config_t *userConfig, uint32_t srcClock_Hz); |
<> | 144:ef7eb2e8f9f7 | 194 | |
<> | 144:ef7eb2e8f9f7 | 195 | /*! |
<> | 144:ef7eb2e8f9f7 | 196 | * @brief Disables the FlexIO UART and gates the FlexIO clock. |
<> | 144:ef7eb2e8f9f7 | 197 | * |
<> | 144:ef7eb2e8f9f7 | 198 | * @note After calling this API, call the FLEXO_UART_Init to use the FlexIO UART module. |
<> | 144:ef7eb2e8f9f7 | 199 | * |
<> | 144:ef7eb2e8f9f7 | 200 | * @param base pointer to FLEXIO_UART_Type structure |
<> | 144:ef7eb2e8f9f7 | 201 | */ |
<> | 144:ef7eb2e8f9f7 | 202 | void FLEXIO_UART_Deinit(FLEXIO_UART_Type *base); |
<> | 144:ef7eb2e8f9f7 | 203 | |
<> | 144:ef7eb2e8f9f7 | 204 | /*! |
<> | 144:ef7eb2e8f9f7 | 205 | * @brief Gets the default configuration to configure the FlexIO UART. The configuration |
<> | 144:ef7eb2e8f9f7 | 206 | * can be used directly for calling the FLEXIO_UART_Init(). |
<> | 144:ef7eb2e8f9f7 | 207 | * Example: |
<> | 144:ef7eb2e8f9f7 | 208 | @code |
<> | 144:ef7eb2e8f9f7 | 209 | flexio_uart_config_t config; |
<> | 144:ef7eb2e8f9f7 | 210 | FLEXIO_UART_GetDefaultConfig(&userConfig); |
<> | 144:ef7eb2e8f9f7 | 211 | @endcode |
<> | 144:ef7eb2e8f9f7 | 212 | * @param userConfig Pointer to the flexio_uart_config_t structure. |
<> | 144:ef7eb2e8f9f7 | 213 | */ |
<> | 144:ef7eb2e8f9f7 | 214 | void FLEXIO_UART_GetDefaultConfig(flexio_uart_config_t *userConfig); |
<> | 144:ef7eb2e8f9f7 | 215 | |
<> | 144:ef7eb2e8f9f7 | 216 | /* @} */ |
<> | 144:ef7eb2e8f9f7 | 217 | |
<> | 144:ef7eb2e8f9f7 | 218 | /*! |
<> | 144:ef7eb2e8f9f7 | 219 | * @name Status |
<> | 144:ef7eb2e8f9f7 | 220 | * @{ |
<> | 144:ef7eb2e8f9f7 | 221 | */ |
<> | 144:ef7eb2e8f9f7 | 222 | |
<> | 144:ef7eb2e8f9f7 | 223 | /*! |
<> | 144:ef7eb2e8f9f7 | 224 | * @brief Gets the FlexIO UART status flags. |
<> | 144:ef7eb2e8f9f7 | 225 | * |
<> | 144:ef7eb2e8f9f7 | 226 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 227 | * @return FlexIO UART status flags. |
<> | 144:ef7eb2e8f9f7 | 228 | */ |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | uint32_t FLEXIO_UART_GetStatusFlags(FLEXIO_UART_Type *base); |
<> | 144:ef7eb2e8f9f7 | 231 | |
<> | 144:ef7eb2e8f9f7 | 232 | /*! |
<> | 144:ef7eb2e8f9f7 | 233 | * @brief Gets the FlexIO UART status flags. |
<> | 144:ef7eb2e8f9f7 | 234 | * |
<> | 144:ef7eb2e8f9f7 | 235 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 236 | * @param mask Status flag. |
<> | 144:ef7eb2e8f9f7 | 237 | * The parameter can be any combination of the following values: |
<> | 144:ef7eb2e8f9f7 | 238 | * @arg kFLEXIO_UART_TxDataRegEmptyFlag |
<> | 144:ef7eb2e8f9f7 | 239 | * @arg kFLEXIO_UART_RxEmptyFlag |
<> | 144:ef7eb2e8f9f7 | 240 | * @arg kFLEXIO_UART_RxOverRunFlag |
<> | 144:ef7eb2e8f9f7 | 241 | */ |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | void FLEXIO_UART_ClearStatusFlags(FLEXIO_UART_Type *base, uint32_t mask); |
<> | 144:ef7eb2e8f9f7 | 244 | |
<> | 144:ef7eb2e8f9f7 | 245 | /* @} */ |
<> | 144:ef7eb2e8f9f7 | 246 | |
<> | 144:ef7eb2e8f9f7 | 247 | /*! |
<> | 144:ef7eb2e8f9f7 | 248 | * @name Interrupts |
<> | 144:ef7eb2e8f9f7 | 249 | * @{ |
<> | 144:ef7eb2e8f9f7 | 250 | */ |
<> | 144:ef7eb2e8f9f7 | 251 | |
<> | 144:ef7eb2e8f9f7 | 252 | /*! |
<> | 144:ef7eb2e8f9f7 | 253 | * @brief Enables the FlexIO UART interrupt. |
<> | 144:ef7eb2e8f9f7 | 254 | * |
<> | 144:ef7eb2e8f9f7 | 255 | * This function enables the FlexIO UART interrupt. |
<> | 144:ef7eb2e8f9f7 | 256 | * |
<> | 144:ef7eb2e8f9f7 | 257 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 258 | * @param mask Interrupt source. |
<> | 144:ef7eb2e8f9f7 | 259 | */ |
<> | 144:ef7eb2e8f9f7 | 260 | void FLEXIO_UART_EnableInterrupts(FLEXIO_UART_Type *base, uint32_t mask); |
<> | 144:ef7eb2e8f9f7 | 261 | |
<> | 144:ef7eb2e8f9f7 | 262 | /*! |
<> | 144:ef7eb2e8f9f7 | 263 | * @brief Disables the FlexIO UART interrupt. |
<> | 144:ef7eb2e8f9f7 | 264 | * |
<> | 144:ef7eb2e8f9f7 | 265 | * This function disables the FlexIO UART interrupt. |
<> | 144:ef7eb2e8f9f7 | 266 | * |
<> | 144:ef7eb2e8f9f7 | 267 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 268 | * @param mask Interrupt source. |
<> | 144:ef7eb2e8f9f7 | 269 | */ |
<> | 144:ef7eb2e8f9f7 | 270 | void FLEXIO_UART_DisableInterrupts(FLEXIO_UART_Type *base, uint32_t mask); |
<> | 144:ef7eb2e8f9f7 | 271 | |
<> | 144:ef7eb2e8f9f7 | 272 | /* @} */ |
<> | 144:ef7eb2e8f9f7 | 273 | |
<> | 144:ef7eb2e8f9f7 | 274 | /*! |
<> | 144:ef7eb2e8f9f7 | 275 | * @name DMA Control |
<> | 144:ef7eb2e8f9f7 | 276 | * @{ |
<> | 144:ef7eb2e8f9f7 | 277 | */ |
<> | 144:ef7eb2e8f9f7 | 278 | |
<> | 144:ef7eb2e8f9f7 | 279 | /*! |
<> | 144:ef7eb2e8f9f7 | 280 | * @brief Gets the FlexIO UARt transmit data register address. |
<> | 144:ef7eb2e8f9f7 | 281 | * |
<> | 144:ef7eb2e8f9f7 | 282 | * This function returns the UART data register address, which is mainly used by DMA/eDMA. |
<> | 144:ef7eb2e8f9f7 | 283 | * |
<> | 144:ef7eb2e8f9f7 | 284 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 285 | * @return FlexIO UART transmit data register address. |
<> | 144:ef7eb2e8f9f7 | 286 | */ |
<> | 144:ef7eb2e8f9f7 | 287 | static inline uint32_t FLEXIO_UART_GetTxDataRegisterAddress(FLEXIO_UART_Type *base) |
<> | 144:ef7eb2e8f9f7 | 288 | { |
<> | 144:ef7eb2e8f9f7 | 289 | return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBuffer, base->shifterIndex[0]); |
<> | 144:ef7eb2e8f9f7 | 290 | } |
<> | 144:ef7eb2e8f9f7 | 291 | |
<> | 144:ef7eb2e8f9f7 | 292 | /*! |
<> | 144:ef7eb2e8f9f7 | 293 | * @brief Gets the FlexIO UART receive data register address. |
<> | 144:ef7eb2e8f9f7 | 294 | * |
<> | 144:ef7eb2e8f9f7 | 295 | * This function returns the UART data register address, which is mainly used by DMA/eDMA. |
<> | 144:ef7eb2e8f9f7 | 296 | * |
<> | 144:ef7eb2e8f9f7 | 297 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 298 | * @return FlexIO UART receive data register address. |
<> | 144:ef7eb2e8f9f7 | 299 | */ |
<> | 144:ef7eb2e8f9f7 | 300 | static inline uint32_t FLEXIO_UART_GetRxDataRegisterAddress(FLEXIO_UART_Type *base) |
<> | 144:ef7eb2e8f9f7 | 301 | { |
<> | 144:ef7eb2e8f9f7 | 302 | return FLEXIO_GetShifterBufferAddress(base->flexioBase, kFLEXIO_ShifterBufferByteSwapped, base->shifterIndex[1]); |
<> | 144:ef7eb2e8f9f7 | 303 | } |
<> | 144:ef7eb2e8f9f7 | 304 | |
<> | 144:ef7eb2e8f9f7 | 305 | /*! |
<> | 144:ef7eb2e8f9f7 | 306 | * @brief Enables/disables the FlexIO UART transmit DMA. |
<> | 144:ef7eb2e8f9f7 | 307 | * This function enables/disables the FlexIO UART Tx DMA, |
<> | 144:ef7eb2e8f9f7 | 308 | * which means asserting the kFLEXIO_UART_TxDataRegEmptyFlag does/doesn't trigger the DMA request. |
<> | 144:ef7eb2e8f9f7 | 309 | * |
<> | 144:ef7eb2e8f9f7 | 310 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 311 | * @param enable True to enable, false to disable. |
<> | 144:ef7eb2e8f9f7 | 312 | */ |
<> | 144:ef7eb2e8f9f7 | 313 | static inline void FLEXIO_UART_EnableTxDMA(FLEXIO_UART_Type *base, bool enable) |
<> | 144:ef7eb2e8f9f7 | 314 | { |
<> | 144:ef7eb2e8f9f7 | 315 | FLEXIO_EnableShifterStatusDMA(base->flexioBase, 1 << base->shifterIndex[0], enable); |
<> | 144:ef7eb2e8f9f7 | 316 | } |
<> | 144:ef7eb2e8f9f7 | 317 | |
<> | 144:ef7eb2e8f9f7 | 318 | /*! |
<> | 144:ef7eb2e8f9f7 | 319 | * @brief Enables/disables the FlexIO UART receive DMA. |
<> | 144:ef7eb2e8f9f7 | 320 | * This function enables/disables the FlexIO UART Rx DMA, |
<> | 144:ef7eb2e8f9f7 | 321 | * which means asserting kFLEXIO_UART_RxDataRegFullFlag does/doesn't trigger the DMA request. |
<> | 144:ef7eb2e8f9f7 | 322 | * |
<> | 144:ef7eb2e8f9f7 | 323 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 324 | * @param enable True to enable, false to disable. |
<> | 144:ef7eb2e8f9f7 | 325 | */ |
<> | 144:ef7eb2e8f9f7 | 326 | static inline void FLEXIO_UART_EnableRxDMA(FLEXIO_UART_Type *base, bool enable) |
<> | 144:ef7eb2e8f9f7 | 327 | { |
<> | 144:ef7eb2e8f9f7 | 328 | FLEXIO_EnableShifterStatusDMA(base->flexioBase, 1 << base->shifterIndex[1], enable); |
<> | 144:ef7eb2e8f9f7 | 329 | } |
<> | 144:ef7eb2e8f9f7 | 330 | |
<> | 144:ef7eb2e8f9f7 | 331 | /* @} */ |
<> | 144:ef7eb2e8f9f7 | 332 | |
<> | 144:ef7eb2e8f9f7 | 333 | /*! |
<> | 144:ef7eb2e8f9f7 | 334 | * @name Bus Operations |
<> | 144:ef7eb2e8f9f7 | 335 | * @{ |
<> | 144:ef7eb2e8f9f7 | 336 | */ |
<> | 144:ef7eb2e8f9f7 | 337 | |
<> | 144:ef7eb2e8f9f7 | 338 | /*! |
<> | 144:ef7eb2e8f9f7 | 339 | * @brief Enables/disables the FlexIO UART module operation. |
<> | 144:ef7eb2e8f9f7 | 340 | * |
<> | 144:ef7eb2e8f9f7 | 341 | * @param base Pointer to the FLEXIO_UART_Type. |
<> | 144:ef7eb2e8f9f7 | 342 | * @param enable True to enable, false to disable. |
<> | 144:ef7eb2e8f9f7 | 343 | */ |
<> | 144:ef7eb2e8f9f7 | 344 | static inline void FLEXIO_UART_Enable(FLEXIO_UART_Type *base, bool enable) |
<> | 144:ef7eb2e8f9f7 | 345 | { |
<> | 144:ef7eb2e8f9f7 | 346 | if (enable) |
<> | 144:ef7eb2e8f9f7 | 347 | { |
<> | 144:ef7eb2e8f9f7 | 348 | base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK; |
<> | 144:ef7eb2e8f9f7 | 349 | } |
<> | 144:ef7eb2e8f9f7 | 350 | else |
<> | 144:ef7eb2e8f9f7 | 351 | { |
<> | 144:ef7eb2e8f9f7 | 352 | base->flexioBase->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK; |
<> | 144:ef7eb2e8f9f7 | 353 | } |
<> | 144:ef7eb2e8f9f7 | 354 | } |
<> | 144:ef7eb2e8f9f7 | 355 | |
<> | 144:ef7eb2e8f9f7 | 356 | /*! |
<> | 144:ef7eb2e8f9f7 | 357 | * @brief Writes one byte of data. |
<> | 144:ef7eb2e8f9f7 | 358 | * |
<> | 144:ef7eb2e8f9f7 | 359 | * @note This is a non-blocking API, which returns directly after the data is put into the |
<> | 144:ef7eb2e8f9f7 | 360 | * data register. Ensure that the TxEmptyFlag is asserted before calling |
<> | 144:ef7eb2e8f9f7 | 361 | * this API. |
<> | 144:ef7eb2e8f9f7 | 362 | * |
<> | 144:ef7eb2e8f9f7 | 363 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 364 | * @param buffer The data bytes to send. |
<> | 144:ef7eb2e8f9f7 | 365 | */ |
<> | 144:ef7eb2e8f9f7 | 366 | static inline void FLEXIO_UART_WriteByte(FLEXIO_UART_Type *base, const uint8_t *buffer) |
<> | 144:ef7eb2e8f9f7 | 367 | { |
<> | 144:ef7eb2e8f9f7 | 368 | base->flexioBase->SHIFTBUF[base->shifterIndex[0]] = *buffer; |
<> | 144:ef7eb2e8f9f7 | 369 | } |
<> | 144:ef7eb2e8f9f7 | 370 | |
<> | 144:ef7eb2e8f9f7 | 371 | /*! |
<> | 144:ef7eb2e8f9f7 | 372 | * @brief Reads one byte of data. |
<> | 144:ef7eb2e8f9f7 | 373 | * |
<> | 144:ef7eb2e8f9f7 | 374 | * @note This is a non-blocking API, which returns directly after the data is read from the |
<> | 144:ef7eb2e8f9f7 | 375 | * data register. Ensure that the RxFullFlag is asserted before calling this API. |
<> | 144:ef7eb2e8f9f7 | 376 | * |
<> | 144:ef7eb2e8f9f7 | 377 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 378 | * @param buffer The buffer to store the received bytes. |
<> | 144:ef7eb2e8f9f7 | 379 | */ |
<> | 144:ef7eb2e8f9f7 | 380 | static inline void FLEXIO_UART_ReadByte(FLEXIO_UART_Type *base, uint8_t *buffer) |
<> | 144:ef7eb2e8f9f7 | 381 | { |
<> | 144:ef7eb2e8f9f7 | 382 | *buffer = base->flexioBase->SHIFTBUFBYS[base->shifterIndex[1]]; |
<> | 144:ef7eb2e8f9f7 | 383 | } |
<> | 144:ef7eb2e8f9f7 | 384 | |
<> | 144:ef7eb2e8f9f7 | 385 | /*! |
<> | 144:ef7eb2e8f9f7 | 386 | * @brief Sends a buffer of data bytes. |
<> | 144:ef7eb2e8f9f7 | 387 | * |
<> | 144:ef7eb2e8f9f7 | 388 | * @note This function blocks using the polling method until all bytes have been sent. |
<> | 144:ef7eb2e8f9f7 | 389 | * |
<> | 144:ef7eb2e8f9f7 | 390 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 391 | * @param txData The data bytes to send. |
<> | 144:ef7eb2e8f9f7 | 392 | * @param txSize The number of data bytes to send. |
<> | 144:ef7eb2e8f9f7 | 393 | */ |
<> | 144:ef7eb2e8f9f7 | 394 | void FLEXIO_UART_WriteBlocking(FLEXIO_UART_Type *base, const uint8_t *txData, size_t txSize); |
<> | 144:ef7eb2e8f9f7 | 395 | |
<> | 144:ef7eb2e8f9f7 | 396 | /*! |
<> | 144:ef7eb2e8f9f7 | 397 | * @brief Receives a buffer of bytes. |
<> | 144:ef7eb2e8f9f7 | 398 | * |
<> | 144:ef7eb2e8f9f7 | 399 | * @note This function blocks using the polling method until all bytes have been received. |
<> | 144:ef7eb2e8f9f7 | 400 | * |
<> | 144:ef7eb2e8f9f7 | 401 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 402 | * @param rxData The buffer to store the received bytes. |
<> | 144:ef7eb2e8f9f7 | 403 | * @param rxSize The number of data bytes to be received. |
<> | 144:ef7eb2e8f9f7 | 404 | */ |
<> | 144:ef7eb2e8f9f7 | 405 | void FLEXIO_UART_ReadBlocking(FLEXIO_UART_Type *base, uint8_t *rxData, size_t rxSize); |
<> | 144:ef7eb2e8f9f7 | 406 | |
<> | 144:ef7eb2e8f9f7 | 407 | /* @} */ |
<> | 144:ef7eb2e8f9f7 | 408 | |
<> | 144:ef7eb2e8f9f7 | 409 | /*! |
<> | 144:ef7eb2e8f9f7 | 410 | * @name Transactional |
<> | 144:ef7eb2e8f9f7 | 411 | * @{ |
<> | 144:ef7eb2e8f9f7 | 412 | */ |
<> | 144:ef7eb2e8f9f7 | 413 | |
<> | 144:ef7eb2e8f9f7 | 414 | /*! |
<> | 144:ef7eb2e8f9f7 | 415 | * @brief Initializes the UART handle. |
<> | 144:ef7eb2e8f9f7 | 416 | * |
<> | 144:ef7eb2e8f9f7 | 417 | * This function initializes the FlexIO UART handle, which can be used for other FlexIO |
<> | 144:ef7eb2e8f9f7 | 418 | * UART transactional APIs. Call this API once to get the |
<> | 144:ef7eb2e8f9f7 | 419 | * initialized handle. |
<> | 144:ef7eb2e8f9f7 | 420 | * |
<> | 144:ef7eb2e8f9f7 | 421 | * The UART driver supports the "background" receiving, which means that user can set up |
<> | 144:ef7eb2e8f9f7 | 422 | * a RX ring buffer optionally. Data received is stored into the ring buffer even when |
<> | 144:ef7eb2e8f9f7 | 423 | * the user doesn't call the FLEXIO_UART_TransferReceiveNonBlocking() API. If there is already data |
<> | 144:ef7eb2e8f9f7 | 424 | * received in the ring buffer, user can get the received data from the ring buffer |
<> | 144:ef7eb2e8f9f7 | 425 | * directly. The ring buffer is disabled if passing NULL as @p ringBuffer. |
<> | 144:ef7eb2e8f9f7 | 426 | * |
<> | 144:ef7eb2e8f9f7 | 427 | * @param base to FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 428 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 429 | * @param callback The callback function. |
<> | 144:ef7eb2e8f9f7 | 430 | * @param userData The parameter of the callback function. |
<> | 144:ef7eb2e8f9f7 | 431 | * @retval kStatus_Success Successfully create the handle. |
<> | 144:ef7eb2e8f9f7 | 432 | * @retval kStatus_OutOfRange The FlexIO type/handle/ISR table out of range. |
<> | 144:ef7eb2e8f9f7 | 433 | */ |
<> | 144:ef7eb2e8f9f7 | 434 | status_t FLEXIO_UART_TransferCreateHandle(FLEXIO_UART_Type *base, |
<> | 144:ef7eb2e8f9f7 | 435 | flexio_uart_handle_t *handle, |
<> | 144:ef7eb2e8f9f7 | 436 | flexio_uart_transfer_callback_t callback, |
<> | 144:ef7eb2e8f9f7 | 437 | void *userData); |
<> | 144:ef7eb2e8f9f7 | 438 | |
<> | 144:ef7eb2e8f9f7 | 439 | /*! |
<> | 144:ef7eb2e8f9f7 | 440 | * @brief Sets up the RX ring buffer. |
<> | 144:ef7eb2e8f9f7 | 441 | * |
<> | 144:ef7eb2e8f9f7 | 442 | * This function sets up the RX ring buffer to a specific UART handle. |
<> | 144:ef7eb2e8f9f7 | 443 | * |
<> | 144:ef7eb2e8f9f7 | 444 | * When the RX ring buffer is used, data received is stored into the ring buffer even when |
<> | 144:ef7eb2e8f9f7 | 445 | * the user doesn't call the UART_ReceiveNonBlocking() API. If there are already data received |
<> | 144:ef7eb2e8f9f7 | 446 | * in the ring buffer, user can get the received data from the ring buffer directly. |
<> | 144:ef7eb2e8f9f7 | 447 | * |
<> | 144:ef7eb2e8f9f7 | 448 | * @note When using the RX ring buffer, one byte is reserved for internal use. In other |
<> | 144:ef7eb2e8f9f7 | 449 | * words, if @p ringBufferSize is 32, only 31 bytes are used for saving data. |
<> | 144:ef7eb2e8f9f7 | 450 | * |
<> | 144:ef7eb2e8f9f7 | 451 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 452 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 453 | * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer. |
<> | 144:ef7eb2e8f9f7 | 454 | * @param ringBufferSize Size of the ring buffer. |
<> | 144:ef7eb2e8f9f7 | 455 | */ |
<> | 144:ef7eb2e8f9f7 | 456 | void FLEXIO_UART_TransferStartRingBuffer(FLEXIO_UART_Type *base, |
<> | 144:ef7eb2e8f9f7 | 457 | flexio_uart_handle_t *handle, |
<> | 144:ef7eb2e8f9f7 | 458 | uint8_t *ringBuffer, |
<> | 144:ef7eb2e8f9f7 | 459 | size_t ringBufferSize); |
<> | 144:ef7eb2e8f9f7 | 460 | |
<> | 144:ef7eb2e8f9f7 | 461 | /*! |
<> | 144:ef7eb2e8f9f7 | 462 | * @brief Aborts the background transfer and uninstalls the ring buffer. |
<> | 144:ef7eb2e8f9f7 | 463 | * |
<> | 144:ef7eb2e8f9f7 | 464 | * This function aborts the background transfer and uninstalls the ring buffer. |
<> | 144:ef7eb2e8f9f7 | 465 | * |
<> | 144:ef7eb2e8f9f7 | 466 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 467 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 468 | */ |
<> | 144:ef7eb2e8f9f7 | 469 | void FLEXIO_UART_StopRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle); |
<> | 144:ef7eb2e8f9f7 | 470 | |
<> | 144:ef7eb2e8f9f7 | 471 | /*! |
<> | 144:ef7eb2e8f9f7 | 472 | * @brief Transmits a buffer of data using the interrupt method. |
<> | 144:ef7eb2e8f9f7 | 473 | * |
<> | 144:ef7eb2e8f9f7 | 474 | * This function sends data using an interrupt method. This is a non-blocking function, |
<> | 144:ef7eb2e8f9f7 | 475 | * which returns directly without waiting for all data to be written to the TX register. When |
<> | 144:ef7eb2e8f9f7 | 476 | * all data are written to TX register in ISR, the FlexIO UART driver calls the callback |
<> | 144:ef7eb2e8f9f7 | 477 | * function and passes the @ref kStatus_FLEXIO_UART_TxIdle as status parameter. |
<> | 144:ef7eb2e8f9f7 | 478 | * |
<> | 144:ef7eb2e8f9f7 | 479 | * @note The kStatus_FLEXIO_UART_TxIdle is passed to the upper layer when all data is written |
<> | 144:ef7eb2e8f9f7 | 480 | * to the TX register. However, it does not ensure that all data is sent out. |
<> | 144:ef7eb2e8f9f7 | 481 | * |
<> | 144:ef7eb2e8f9f7 | 482 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 483 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 484 | * @param xfer FlexIO UART transfer structure. See #flexio_uart_transfer_t. |
<> | 144:ef7eb2e8f9f7 | 485 | * @retval kStatus_Success Successfully starts the data transmission. |
<> | 144:ef7eb2e8f9f7 | 486 | * @retval kStatus_UART_TxBusy Previous transmission still not finished, data not written to the TX register. |
<> | 144:ef7eb2e8f9f7 | 487 | */ |
<> | 144:ef7eb2e8f9f7 | 488 | status_t FLEXIO_UART_TransferSendNonBlocking(FLEXIO_UART_Type *base, |
<> | 144:ef7eb2e8f9f7 | 489 | flexio_uart_handle_t *handle, |
<> | 144:ef7eb2e8f9f7 | 490 | flexio_uart_transfer_t *xfer); |
<> | 144:ef7eb2e8f9f7 | 491 | |
<> | 144:ef7eb2e8f9f7 | 492 | /*! |
<> | 144:ef7eb2e8f9f7 | 493 | * @brief Aborts the interrupt-driven data transmit. |
<> | 144:ef7eb2e8f9f7 | 494 | * |
<> | 144:ef7eb2e8f9f7 | 495 | * This function aborts the interrupt-driven data sending. Get the remainBytes to know |
<> | 144:ef7eb2e8f9f7 | 496 | * how many bytes are still not sent out. |
<> | 144:ef7eb2e8f9f7 | 497 | * |
<> | 144:ef7eb2e8f9f7 | 498 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 499 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 500 | */ |
<> | 144:ef7eb2e8f9f7 | 501 | void FLEXIO_UART_TransferAbortSend(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle); |
<> | 144:ef7eb2e8f9f7 | 502 | |
<> | 144:ef7eb2e8f9f7 | 503 | /*! |
<> | 144:ef7eb2e8f9f7 | 504 | * @brief Gets the number of remaining bytes not sent. |
<> | 144:ef7eb2e8f9f7 | 505 | * |
<> | 144:ef7eb2e8f9f7 | 506 | * This function gets the number of remaining bytes not sent driven by interrupt. |
<> | 144:ef7eb2e8f9f7 | 507 | * |
<> | 144:ef7eb2e8f9f7 | 508 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 509 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 510 | * @param count Number of bytes sent so far by the non-blocking transaction. |
<> | 144:ef7eb2e8f9f7 | 511 | * @retval kStatus_InvalidArgument count is Invalid. |
<> | 144:ef7eb2e8f9f7 | 512 | * @retval kStatus_Success Successfully return the count. |
<> | 144:ef7eb2e8f9f7 | 513 | */ |
<> | 144:ef7eb2e8f9f7 | 514 | status_t FLEXIO_UART_TransferGetSendCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count); |
<> | 144:ef7eb2e8f9f7 | 515 | |
<> | 144:ef7eb2e8f9f7 | 516 | /*! |
<> | 144:ef7eb2e8f9f7 | 517 | * @brief Receives a buffer of data using the interrupt method. |
<> | 144:ef7eb2e8f9f7 | 518 | * |
<> | 144:ef7eb2e8f9f7 | 519 | * This function receives data using the interrupt method. This is a non-blocking function, |
<> | 144:ef7eb2e8f9f7 | 520 | * which returns without waiting for all data to be received. |
<> | 144:ef7eb2e8f9f7 | 521 | * If the RX ring buffer is used and not empty, the data in ring buffer is copied and |
<> | 144:ef7eb2e8f9f7 | 522 | * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer. |
<> | 144:ef7eb2e8f9f7 | 523 | * After copying, if the data in ring buffer is not enough to read, the receive |
<> | 144:ef7eb2e8f9f7 | 524 | * request is saved by the UART driver. When new data arrives, the receive request |
<> | 144:ef7eb2e8f9f7 | 525 | * is serviced first. When all data is received, the UART driver notifies the upper layer |
<> | 144:ef7eb2e8f9f7 | 526 | * through a callback function and passes the status parameter @ref kStatus_UART_RxIdle. |
<> | 144:ef7eb2e8f9f7 | 527 | * For example, if the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer, |
<> | 144:ef7eb2e8f9f7 | 528 | * the 5 bytes are copied to xfer->data. This function returns with the |
<> | 144:ef7eb2e8f9f7 | 529 | * parameter @p receivedBytes set to 5. For the last 5 bytes, newly arrived data is |
<> | 144:ef7eb2e8f9f7 | 530 | * saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies upper layer. |
<> | 144:ef7eb2e8f9f7 | 531 | * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt |
<> | 144:ef7eb2e8f9f7 | 532 | * to receive data to xfer->data. When all data is received, the upper layer is notified. |
<> | 144:ef7eb2e8f9f7 | 533 | * |
<> | 144:ef7eb2e8f9f7 | 534 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 535 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 536 | * @param xfer UART transfer structure. See #flexio_uart_transfer_t. |
<> | 144:ef7eb2e8f9f7 | 537 | * @param receivedBytes Bytes received from the ring buffer directly. |
<> | 144:ef7eb2e8f9f7 | 538 | * @retval kStatus_Success Successfully queue the transfer into the transmit queue. |
<> | 144:ef7eb2e8f9f7 | 539 | * @retval kStatus_FLEXIO_UART_RxBusy Previous receive request is not finished. |
<> | 144:ef7eb2e8f9f7 | 540 | */ |
<> | 144:ef7eb2e8f9f7 | 541 | status_t FLEXIO_UART_TransferReceiveNonBlocking(FLEXIO_UART_Type *base, |
<> | 144:ef7eb2e8f9f7 | 542 | flexio_uart_handle_t *handle, |
<> | 144:ef7eb2e8f9f7 | 543 | flexio_uart_transfer_t *xfer, |
<> | 144:ef7eb2e8f9f7 | 544 | size_t *receivedBytes); |
<> | 144:ef7eb2e8f9f7 | 545 | |
<> | 144:ef7eb2e8f9f7 | 546 | /*! |
<> | 144:ef7eb2e8f9f7 | 547 | * @brief Aborts the receive data which was using IRQ. |
<> | 144:ef7eb2e8f9f7 | 548 | * |
<> | 144:ef7eb2e8f9f7 | 549 | * This function aborts the receive data which was using IRQ. |
<> | 144:ef7eb2e8f9f7 | 550 | * |
<> | 144:ef7eb2e8f9f7 | 551 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 552 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 553 | */ |
<> | 144:ef7eb2e8f9f7 | 554 | void FLEXIO_UART_TransferAbortReceive(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle); |
<> | 144:ef7eb2e8f9f7 | 555 | |
<> | 144:ef7eb2e8f9f7 | 556 | /*! |
<> | 144:ef7eb2e8f9f7 | 557 | * @brief Gets the number of remaining bytes not received. |
<> | 144:ef7eb2e8f9f7 | 558 | * |
<> | 144:ef7eb2e8f9f7 | 559 | * This function gets the number of remaining bytes not received driven by interrupt. |
<> | 144:ef7eb2e8f9f7 | 560 | * |
<> | 144:ef7eb2e8f9f7 | 561 | * @param base Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 562 | * @param handle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 563 | * @param count Number of bytes received so far by the non-blocking transaction. |
<> | 144:ef7eb2e8f9f7 | 564 | * @retval kStatus_InvalidArgument count is Invalid. |
<> | 144:ef7eb2e8f9f7 | 565 | * @retval kStatus_Success Successfully return the count. |
<> | 144:ef7eb2e8f9f7 | 566 | */ |
<> | 144:ef7eb2e8f9f7 | 567 | status_t FLEXIO_UART_TransferGetReceiveCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count); |
<> | 144:ef7eb2e8f9f7 | 568 | |
<> | 144:ef7eb2e8f9f7 | 569 | /*! |
<> | 144:ef7eb2e8f9f7 | 570 | * @brief FlexIO UART IRQ handler function. |
<> | 144:ef7eb2e8f9f7 | 571 | * |
<> | 144:ef7eb2e8f9f7 | 572 | * This function processes the FlexIO UART transmit and receives the IRQ request. |
<> | 144:ef7eb2e8f9f7 | 573 | * |
<> | 144:ef7eb2e8f9f7 | 574 | * @param uartType Pointer to the FLEXIO_UART_Type structure. |
<> | 144:ef7eb2e8f9f7 | 575 | * @param uartHandle Pointer to the flexio_uart_handle_t structure to store the transfer state. |
<> | 144:ef7eb2e8f9f7 | 576 | */ |
<> | 144:ef7eb2e8f9f7 | 577 | void FLEXIO_UART_TransferHandleIRQ(void *uartType, void *uartHandle); |
<> | 144:ef7eb2e8f9f7 | 578 | |
<> | 144:ef7eb2e8f9f7 | 579 | /*@}*/ |
<> | 144:ef7eb2e8f9f7 | 580 | |
<> | 144:ef7eb2e8f9f7 | 581 | #if defined(__cplusplus) |
<> | 144:ef7eb2e8f9f7 | 582 | } |
<> | 144:ef7eb2e8f9f7 | 583 | #endif /*_cplusplus*/ |
<> | 144:ef7eb2e8f9f7 | 584 | /*@}*/ |
<> | 144:ef7eb2e8f9f7 | 585 | |
<> | 144:ef7eb2e8f9f7 | 586 | #endif /*_FSL_FLEXIO_UART_H_*/ |