Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_dac.c@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #include "fsl_dac.h"
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 /*******************************************************************************
<> 144:ef7eb2e8f9f7 34 * Prototypes
<> 144:ef7eb2e8f9f7 35 ******************************************************************************/
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @brief Get instance number for DAC module.
<> 144:ef7eb2e8f9f7 38 *
<> 144:ef7eb2e8f9f7 39 * @param base DAC peripheral base address
<> 144:ef7eb2e8f9f7 40 */
<> 144:ef7eb2e8f9f7 41 static uint32_t DAC_GetInstance(DAC_Type *base);
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Variables
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46 /*! @brief Pointers to DAC bases for each instance. */
<> 144:ef7eb2e8f9f7 47 static DAC_Type *const s_dacBases[] = DAC_BASE_PTRS;
<> 144:ef7eb2e8f9f7 48 /*! @brief Pointers to DAC clocks for each instance. */
<> 144:ef7eb2e8f9f7 49 const clock_ip_name_t s_dacClocks[] = DAC_CLOCKS;
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /*******************************************************************************
<> 144:ef7eb2e8f9f7 52 * Codes
<> 144:ef7eb2e8f9f7 53 ******************************************************************************/
<> 144:ef7eb2e8f9f7 54 static uint32_t DAC_GetInstance(DAC_Type *base)
<> 144:ef7eb2e8f9f7 55 {
<> 144:ef7eb2e8f9f7 56 uint32_t instance;
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Find the instance index from base address mappings. */
<> 144:ef7eb2e8f9f7 59 for (instance = 0; instance < FSL_FEATURE_SOC_DAC_COUNT; instance++)
<> 144:ef7eb2e8f9f7 60 {
<> 144:ef7eb2e8f9f7 61 if (s_dacBases[instance] == base)
<> 144:ef7eb2e8f9f7 62 {
<> 144:ef7eb2e8f9f7 63 break;
<> 144:ef7eb2e8f9f7 64 }
<> 144:ef7eb2e8f9f7 65 }
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 assert(instance < FSL_FEATURE_SOC_DAC_COUNT);
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 return instance;
<> 144:ef7eb2e8f9f7 70 }
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 void DAC_Init(DAC_Type *base, const dac_config_t *config)
<> 144:ef7eb2e8f9f7 73 {
<> 144:ef7eb2e8f9f7 74 assert(NULL != config);
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint8_t tmp8;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /* Enable the clock. */
<> 144:ef7eb2e8f9f7 79 CLOCK_EnableClock(s_dacClocks[DAC_GetInstance(base)]);
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /* Configure. */
<> 144:ef7eb2e8f9f7 82 /* DACx_C0. */
<> 144:ef7eb2e8f9f7 83 tmp8 = base->C0 & ~(DAC_C0_DACRFS_MASK | DAC_C0_LPEN_MASK);
<> 144:ef7eb2e8f9f7 84 if (kDAC_ReferenceVoltageSourceVref2 == config->referenceVoltageSource)
<> 144:ef7eb2e8f9f7 85 {
<> 144:ef7eb2e8f9f7 86 tmp8 |= DAC_C0_DACRFS_MASK;
<> 144:ef7eb2e8f9f7 87 }
<> 144:ef7eb2e8f9f7 88 if (config->enableLowPowerMode)
<> 144:ef7eb2e8f9f7 89 {
<> 144:ef7eb2e8f9f7 90 tmp8 |= DAC_C0_LPEN_MASK;
<> 144:ef7eb2e8f9f7 91 }
<> 144:ef7eb2e8f9f7 92 base->C0 = tmp8;
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 DAC_Enable(base, true);
<> 144:ef7eb2e8f9f7 95 }
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 void DAC_Deinit(DAC_Type *base)
<> 144:ef7eb2e8f9f7 98 {
<> 144:ef7eb2e8f9f7 99 DAC_Enable(base, false);
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 /* Disable the clock. */
<> 144:ef7eb2e8f9f7 102 CLOCK_DisableClock(s_dacClocks[DAC_GetInstance(base)]);
<> 144:ef7eb2e8f9f7 103 }
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 void DAC_GetDefaultConfig(dac_config_t *config)
<> 144:ef7eb2e8f9f7 106 {
<> 144:ef7eb2e8f9f7 107 assert(NULL != config);
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 config->referenceVoltageSource = kDAC_ReferenceVoltageSourceVref2;
<> 144:ef7eb2e8f9f7 110 config->enableLowPowerMode = false;
<> 144:ef7eb2e8f9f7 111 }
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 void DAC_SetBufferConfig(DAC_Type *base, const dac_buffer_config_t *config)
<> 144:ef7eb2e8f9f7 114 {
<> 144:ef7eb2e8f9f7 115 assert(NULL != config);
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 uint8_t tmp8;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /* DACx_C0. */
<> 144:ef7eb2e8f9f7 120 tmp8 = base->C0 & ~(DAC_C0_DACTRGSEL_MASK);
<> 144:ef7eb2e8f9f7 121 if (kDAC_BufferTriggerBySoftwareMode == config->triggerMode)
<> 144:ef7eb2e8f9f7 122 {
<> 144:ef7eb2e8f9f7 123 tmp8 |= DAC_C0_DACTRGSEL_MASK;
<> 144:ef7eb2e8f9f7 124 }
<> 144:ef7eb2e8f9f7 125 base->C0 = tmp8;
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /* DACx_C1. */
<> 144:ef7eb2e8f9f7 128 tmp8 = base->C1 &
<> 144:ef7eb2e8f9f7 129 ~(
<> 144:ef7eb2e8f9f7 130 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION
<> 144:ef7eb2e8f9f7 131 DAC_C1_DACBFWM_MASK |
<> 144:ef7eb2e8f9f7 132 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION */
<> 144:ef7eb2e8f9f7 133 DAC_C1_DACBFMD_MASK);
<> 144:ef7eb2e8f9f7 134 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION
<> 144:ef7eb2e8f9f7 135 tmp8 |= DAC_C1_DACBFWM(config->watermark);
<> 144:ef7eb2e8f9f7 136 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION */
<> 144:ef7eb2e8f9f7 137 tmp8 |= DAC_C1_DACBFMD(config->workMode);
<> 144:ef7eb2e8f9f7 138 base->C1 = tmp8;
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 /* DACx_C2. */
<> 144:ef7eb2e8f9f7 141 tmp8 = base->C2 & ~DAC_C2_DACBFUP_MASK;
<> 144:ef7eb2e8f9f7 142 tmp8 |= DAC_C2_DACBFUP(config->upperLimit);
<> 144:ef7eb2e8f9f7 143 base->C2 = tmp8;
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 void DAC_GetDefaultBufferConfig(dac_buffer_config_t *config)
<> 144:ef7eb2e8f9f7 147 {
<> 144:ef7eb2e8f9f7 148 assert(NULL != config);
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 config->triggerMode = kDAC_BufferTriggerBySoftwareMode;
<> 144:ef7eb2e8f9f7 151 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION
<> 144:ef7eb2e8f9f7 152 config->watermark = kDAC_BufferWatermark1Word;
<> 144:ef7eb2e8f9f7 153 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION */
<> 144:ef7eb2e8f9f7 154 config->workMode = kDAC_BufferWorkAsNormalMode;
<> 144:ef7eb2e8f9f7 155 config->upperLimit = DAC_DATL_COUNT - 1U;
<> 144:ef7eb2e8f9f7 156 }
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 void DAC_SetBufferValue(DAC_Type *base, uint8_t index, uint16_t value)
<> 144:ef7eb2e8f9f7 159 {
<> 144:ef7eb2e8f9f7 160 assert(index < DAC_DATL_COUNT);
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 base->DAT[index].DATL = (uint8_t)(0xFFU & value); /* Low 8-bit. */
<> 144:ef7eb2e8f9f7 163 base->DAT[index].DATH = (uint8_t)((0xF00U & value) >> 8); /* High 4-bit. */
<> 144:ef7eb2e8f9f7 164 }
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 void DAC_SetBufferReadPointer(DAC_Type *base, uint8_t index)
<> 144:ef7eb2e8f9f7 167 {
<> 144:ef7eb2e8f9f7 168 assert(index < DAC_DATL_COUNT);
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 uint8_t tmp8 = base->C2 & ~DAC_C2_DACBFRP_MASK;
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 tmp8 |= DAC_C2_DACBFRP(index);
<> 144:ef7eb2e8f9f7 173 base->C2 = tmp8;
<> 144:ef7eb2e8f9f7 174 }
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 void DAC_EnableBufferInterrupts(DAC_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 177 {
<> 144:ef7eb2e8f9f7 178 mask &= (
<> 144:ef7eb2e8f9f7 179 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
<> 144:ef7eb2e8f9f7 180 DAC_C0_DACBWIEN_MASK |
<> 144:ef7eb2e8f9f7 181 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION */
<> 144:ef7eb2e8f9f7 182 DAC_C0_DACBTIEN_MASK | DAC_C0_DACBBIEN_MASK);
<> 144:ef7eb2e8f9f7 183 base->C0 |= ((uint8_t)mask); /* Write 1 to enable. */
<> 144:ef7eb2e8f9f7 184 }
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 void DAC_DisableBufferInterrupts(DAC_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 187 {
<> 144:ef7eb2e8f9f7 188 mask &= (
<> 144:ef7eb2e8f9f7 189 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
<> 144:ef7eb2e8f9f7 190 DAC_C0_DACBWIEN_MASK |
<> 144:ef7eb2e8f9f7 191 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION */
<> 144:ef7eb2e8f9f7 192 DAC_C0_DACBTIEN_MASK | DAC_C0_DACBBIEN_MASK);
<> 144:ef7eb2e8f9f7 193 base->C0 &= (uint8_t)(~((uint8_t)mask)); /* Write 0 to disable. */
<> 144:ef7eb2e8f9f7 194 }
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 uint32_t DAC_GetBufferStatusFlags(DAC_Type *base)
<> 144:ef7eb2e8f9f7 197 {
<> 144:ef7eb2e8f9f7 198 return (uint32_t)(base->SR & (
<> 144:ef7eb2e8f9f7 199 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
<> 144:ef7eb2e8f9f7 200 DAC_SR_DACBFWMF_MASK |
<> 144:ef7eb2e8f9f7 201 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION */
<> 144:ef7eb2e8f9f7 202 DAC_SR_DACBFRPTF_MASK | DAC_SR_DACBFRPBF_MASK));
<> 144:ef7eb2e8f9f7 203 }
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 void DAC_ClearBufferStatusFlags(DAC_Type *base, uint32_t mask)
<> 144:ef7eb2e8f9f7 206 {
<> 144:ef7eb2e8f9f7 207 mask &= (
<> 144:ef7eb2e8f9f7 208 #if defined(FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION) && FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION
<> 144:ef7eb2e8f9f7 209 DAC_SR_DACBFWMF_MASK |
<> 144:ef7eb2e8f9f7 210 #endif /* FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION */
<> 144:ef7eb2e8f9f7 211 DAC_SR_DACBFRPTF_MASK | DAC_SR_DACBFRPBF_MASK);
<> 144:ef7eb2e8f9f7 212 base->SR &= (uint8_t)(~((uint8_t)mask)); /* Write 0 to clear flags. */
<> 144:ef7eb2e8f9f7 213 }