Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KL43Z/drivers/fsl_cmp.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 144:ef7eb2e8f9f7 12 * list of conditions and the following disclaimer in the documentation and/or
<> 144:ef7eb2e8f9f7 13 * other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 144:ef7eb2e8f9f7 16 * contributors may be used to endorse or promote products derived from this
<> 144:ef7eb2e8f9f7 17 * software without specific prior written permission.
<> 144:ef7eb2e8f9f7 18 *
<> 144:ef7eb2e8f9f7 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 #ifndef _FSL_CMP_H_
<> 144:ef7eb2e8f9f7 32 #define _FSL_CMP_H_
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "fsl_common.h"
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /*!
<> 144:ef7eb2e8f9f7 37 * @addtogroup cmp
<> 144:ef7eb2e8f9f7 38 * @{
<> 144:ef7eb2e8f9f7 39 */
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 /*! @file */
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*******************************************************************************
<> 144:ef7eb2e8f9f7 44 * Definitions
<> 144:ef7eb2e8f9f7 45 ******************************************************************************/
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /*! @name Driver version */
<> 144:ef7eb2e8f9f7 48 /*@{*/
<> 144:ef7eb2e8f9f7 49 /*! @brief CMP driver version 2.0.0. */
<> 144:ef7eb2e8f9f7 50 #define FSL_CMP_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
<> 144:ef7eb2e8f9f7 51 /*@}*/
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /*!
<> 144:ef7eb2e8f9f7 54 * @brief Interrupt enable/disable mask.
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56 enum _cmp_interrupt_enable
<> 144:ef7eb2e8f9f7 57 {
<> 144:ef7eb2e8f9f7 58 kCMP_OutputRisingInterruptEnable = CMP_SCR_IER_MASK, /*!< Comparator interrupt enable rising. */
<> 144:ef7eb2e8f9f7 59 kCMP_OutputFallingInterruptEnable = CMP_SCR_IEF_MASK, /*!< Comparator interrupt enable falling. */
<> 144:ef7eb2e8f9f7 60 };
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /*!
<> 144:ef7eb2e8f9f7 63 * @brief Status flags' mask.
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 enum _cmp_status_flags
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 kCMP_OutputRisingEventFlag = CMP_SCR_CFR_MASK, /*!< Rising-edge on compare output has occurred. */
<> 144:ef7eb2e8f9f7 68 kCMP_OutputFallingEventFlag = CMP_SCR_CFF_MASK, /*!< Falling-edge on compare output has occurred. */
<> 144:ef7eb2e8f9f7 69 kCMP_OutputAssertEventFlag = CMP_SCR_COUT_MASK, /*!< Return the current value of the analog comparator output. */
<> 144:ef7eb2e8f9f7 70 };
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /*!
<> 144:ef7eb2e8f9f7 73 * @brief CMP Hysteresis mode.
<> 144:ef7eb2e8f9f7 74 */
<> 144:ef7eb2e8f9f7 75 typedef enum _cmp_hysteresis_mode
<> 144:ef7eb2e8f9f7 76 {
<> 144:ef7eb2e8f9f7 77 kCMP_HysteresisLevel0 = 0U, /*!< Hysteresis level 0. */
<> 144:ef7eb2e8f9f7 78 kCMP_HysteresisLevel1 = 1U, /*!< Hysteresis level 1. */
<> 144:ef7eb2e8f9f7 79 kCMP_HysteresisLevel2 = 2U, /*!< Hysteresis level 2. */
<> 144:ef7eb2e8f9f7 80 kCMP_HysteresisLevel3 = 3U, /*!< Hysteresis level 3. */
<> 144:ef7eb2e8f9f7 81 } cmp_hysteresis_mode_t;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /*!
<> 144:ef7eb2e8f9f7 84 * @brief CMP Voltage Reference source.
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86 typedef enum _cmp_reference_voltage_source
<> 144:ef7eb2e8f9f7 87 {
<> 144:ef7eb2e8f9f7 88 kCMP_VrefSourceVin1 = 0U, /*!< Vin1 is selected as resistor ladder network supply reference Vin. */
<> 144:ef7eb2e8f9f7 89 kCMP_VrefSourceVin2 = 1U, /*!< Vin2 is selected as resistor ladder network supply reference Vin. */
<> 144:ef7eb2e8f9f7 90 } cmp_reference_voltage_source_t;
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /*!
<> 144:ef7eb2e8f9f7 93 * @brief Configure the comparator.
<> 144:ef7eb2e8f9f7 94 */
<> 144:ef7eb2e8f9f7 95 typedef struct _cmp_config
<> 144:ef7eb2e8f9f7 96 {
<> 144:ef7eb2e8f9f7 97 bool enableCmp; /*!< Enable the CMP module. */
<> 144:ef7eb2e8f9f7 98 cmp_hysteresis_mode_t hysteresisMode; /*!< CMP Hysteresis mode. */
<> 144:ef7eb2e8f9f7 99 bool enableHighSpeed; /*!< Enable High Speed (HS) comparison mode. */
<> 144:ef7eb2e8f9f7 100 bool enableInvertOutput; /*!< Enable inverted comparator output. */
<> 144:ef7eb2e8f9f7 101 bool useUnfilteredOutput; /*!< Set compare output(COUT) to equal COUTA(true) or COUT(false). */
<> 144:ef7eb2e8f9f7 102 bool enablePinOut; /*!< The comparator output is available on the associated pin. */
<> 144:ef7eb2e8f9f7 103 #if defined(FSL_FEATURE_CMP_HAS_TRIGGER_MODE) && FSL_FEATURE_CMP_HAS_TRIGGER_MODE
<> 144:ef7eb2e8f9f7 104 bool enableTriggerMode; /*!< Enable the trigger mode. */
<> 144:ef7eb2e8f9f7 105 #endif /* FSL_FEATURE_CMP_HAS_TRIGGER_MODE */
<> 144:ef7eb2e8f9f7 106 } cmp_config_t;
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 /*!
<> 144:ef7eb2e8f9f7 109 * @brief Configure the filter.
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111 typedef struct _cmp_filter_config
<> 144:ef7eb2e8f9f7 112 {
<> 144:ef7eb2e8f9f7 113 #if defined(FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT) && FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT
<> 144:ef7eb2e8f9f7 114 bool enableSample; /*!< Using external SAMPLE as sampling clock input, or using divided bus clock. */
<> 144:ef7eb2e8f9f7 115 #endif /* FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT */
<> 144:ef7eb2e8f9f7 116 uint8_t filterCount; /*!< Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled.*/
<> 144:ef7eb2e8f9f7 117 uint8_t filterPeriod; /*!< Filter Sample Period. The divider to bus clock. Available range is 0-255. */
<> 144:ef7eb2e8f9f7 118 } cmp_filter_config_t;
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 /*!
<> 144:ef7eb2e8f9f7 121 * @brief Configure the internal DAC.
<> 144:ef7eb2e8f9f7 122 */
<> 144:ef7eb2e8f9f7 123 typedef struct _cmp_dac_config
<> 144:ef7eb2e8f9f7 124 {
<> 144:ef7eb2e8f9f7 125 cmp_reference_voltage_source_t referenceVoltageSource; /*!< Supply voltage reference source. */
<> 144:ef7eb2e8f9f7 126 uint8_t DACValue; /*!< Value for DAC Output Voltage. Available range is 0-63.*/
<> 144:ef7eb2e8f9f7 127 } cmp_dac_config_t;
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 130 extern "C" {
<> 144:ef7eb2e8f9f7 131 #endif
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /*******************************************************************************
<> 144:ef7eb2e8f9f7 134 * API
<> 144:ef7eb2e8f9f7 135 ******************************************************************************/
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /*!
<> 144:ef7eb2e8f9f7 138 * @name Initialization
<> 144:ef7eb2e8f9f7 139 * @{
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /*!
<> 144:ef7eb2e8f9f7 143 * @brief Initializes the CMP.
<> 144:ef7eb2e8f9f7 144 *
<> 144:ef7eb2e8f9f7 145 * This function initializes the CMP module. The operations included are:
<> 144:ef7eb2e8f9f7 146 * - Enabling the clock for CMP module.
<> 144:ef7eb2e8f9f7 147 * - Configuring the comparator.
<> 144:ef7eb2e8f9f7 148 * - Enabling the CMP module.
<> 144:ef7eb2e8f9f7 149 * Note: For some devices, multiple CMP instance share the same clock gate. In this case, to enable the clock for
<> 144:ef7eb2e8f9f7 150 * any instance enables all the CMPs. Check the chip reference manual for the clock assignment of the CMP.
<> 144:ef7eb2e8f9f7 151 *
<> 144:ef7eb2e8f9f7 152 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 153 * @param config Pointer to configuration structure.
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155 void CMP_Init(CMP_Type *base, const cmp_config_t *config);
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 /*!
<> 144:ef7eb2e8f9f7 158 * @brief De-initializes the CMP module.
<> 144:ef7eb2e8f9f7 159 *
<> 144:ef7eb2e8f9f7 160 * This function de-initializes the CMP module. The operations included are:
<> 144:ef7eb2e8f9f7 161 * - Disabling the CMP module.
<> 144:ef7eb2e8f9f7 162 * - Disabling the clock for CMP module.
<> 144:ef7eb2e8f9f7 163 *
<> 144:ef7eb2e8f9f7 164 * This function disables the clock for the CMP.
<> 144:ef7eb2e8f9f7 165 * Note: For some devices, multiple CMP instance shares the same clock gate. In this case, before disabling the
<> 144:ef7eb2e8f9f7 166 * clock for the CMP, ensure that all the CMP instances are not used.
<> 144:ef7eb2e8f9f7 167 *
<> 144:ef7eb2e8f9f7 168 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170 void CMP_Deinit(CMP_Type *base);
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 /*!
<> 144:ef7eb2e8f9f7 173 * @brief Enables/disables the CMP module.
<> 144:ef7eb2e8f9f7 174 *
<> 144:ef7eb2e8f9f7 175 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 176 * @param enable Enable the module or not.
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 static inline void CMP_Enable(CMP_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 179 {
<> 144:ef7eb2e8f9f7 180 if (enable)
<> 144:ef7eb2e8f9f7 181 {
<> 144:ef7eb2e8f9f7 182 base->CR1 |= CMP_CR1_EN_MASK;
<> 144:ef7eb2e8f9f7 183 }
<> 144:ef7eb2e8f9f7 184 else
<> 144:ef7eb2e8f9f7 185 {
<> 144:ef7eb2e8f9f7 186 base->CR1 &= ~CMP_CR1_EN_MASK;
<> 144:ef7eb2e8f9f7 187 }
<> 144:ef7eb2e8f9f7 188 }
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /*!
<> 144:ef7eb2e8f9f7 191 * @brief Initializes the CMP user configuration structure.
<> 144:ef7eb2e8f9f7 192 *
<> 144:ef7eb2e8f9f7 193 * This function initializes the user configure structure to these default values:
<> 144:ef7eb2e8f9f7 194 * @code
<> 144:ef7eb2e8f9f7 195 * config->enableCmp = true;
<> 144:ef7eb2e8f9f7 196 * config->hysteresisMode = kCMP_HysteresisLevel0;
<> 144:ef7eb2e8f9f7 197 * config->enableHighSpeed = false;
<> 144:ef7eb2e8f9f7 198 * config->enableInvertOutput = false;
<> 144:ef7eb2e8f9f7 199 * config->useUnfilteredOutput = false;
<> 144:ef7eb2e8f9f7 200 * config->enablePinOut = false;
<> 144:ef7eb2e8f9f7 201 * config->enableTriggerMode = false;
<> 144:ef7eb2e8f9f7 202 * @endcode
<> 144:ef7eb2e8f9f7 203 * @param config Pointer to the configuration structure.
<> 144:ef7eb2e8f9f7 204 */
<> 144:ef7eb2e8f9f7 205 void CMP_GetDefaultConfig(cmp_config_t *config);
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /*!
<> 144:ef7eb2e8f9f7 208 * @brief Sets the input channels for the comparator.
<> 144:ef7eb2e8f9f7 209 *
<> 144:ef7eb2e8f9f7 210 * This function sets the input channels for the comparator.
<> 144:ef7eb2e8f9f7 211 * Note that two input channels cannot be set as same in the application. When the user selects the same input
<> 144:ef7eb2e8f9f7 212 * from the analog mux to the positive and negative port, the comparator is disabled automatically.
<> 144:ef7eb2e8f9f7 213 *
<> 144:ef7eb2e8f9f7 214 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 215 * @param positiveChannel Positive side input channel number. Available range is 0-7.
<> 144:ef7eb2e8f9f7 216 * @param negativeChannel Negative side input channel number. Available range is 0-7.
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218 void CMP_SetInputChannels(CMP_Type *base, uint8_t positiveChannel, uint8_t negativeChannel);
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /* @} */
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /*!
<> 144:ef7eb2e8f9f7 223 * @name Advanced Features
<> 144:ef7eb2e8f9f7 224 * @{
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 #if defined(FSL_FEATURE_CMP_HAS_DMA) && FSL_FEATURE_CMP_HAS_DMA
<> 144:ef7eb2e8f9f7 228 /*!
<> 144:ef7eb2e8f9f7 229 * @brief Enables/disables the DMA request for rising/falling events.
<> 144:ef7eb2e8f9f7 230 *
<> 144:ef7eb2e8f9f7 231 * This function enables/disables the DMA request for rising/falling events. Either event triggers the generation of
<> 144:ef7eb2e8f9f7 232 * the DMA
<> 144:ef7eb2e8f9f7 233 * request from CMP if the DMA feature is enabled. Both events are ignored for generating the DMA request from the CMP
<> 144:ef7eb2e8f9f7 234 * if the
<> 144:ef7eb2e8f9f7 235 * DMA is disabled.
<> 144:ef7eb2e8f9f7 236 *
<> 144:ef7eb2e8f9f7 237 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 238 * @param enable Enable the feature or not.
<> 144:ef7eb2e8f9f7 239 */
<> 144:ef7eb2e8f9f7 240 void CMP_EnableDMA(CMP_Type *base, bool enable);
<> 144:ef7eb2e8f9f7 241 #endif /* FSL_FEATURE_CMP_HAS_DMA */
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 #if defined(FSL_FEATURE_CMP_HAS_WINDOW_MODE) && FSL_FEATURE_CMP_HAS_WINDOW_MODE
<> 144:ef7eb2e8f9f7 244 /*!
<> 144:ef7eb2e8f9f7 245 * @brief Enables/disables the window mode.
<> 144:ef7eb2e8f9f7 246 *
<> 144:ef7eb2e8f9f7 247 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 248 * @param enable Enable the feature or not.
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250 static inline void CMP_EnableWindowMode(CMP_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 251 {
<> 144:ef7eb2e8f9f7 252 if (enable)
<> 144:ef7eb2e8f9f7 253 {
<> 144:ef7eb2e8f9f7 254 base->CR1 |= CMP_CR1_WE_MASK;
<> 144:ef7eb2e8f9f7 255 }
<> 144:ef7eb2e8f9f7 256 else
<> 144:ef7eb2e8f9f7 257 {
<> 144:ef7eb2e8f9f7 258 base->CR1 &= ~CMP_CR1_WE_MASK;
<> 144:ef7eb2e8f9f7 259 }
<> 144:ef7eb2e8f9f7 260 }
<> 144:ef7eb2e8f9f7 261 #endif /* FSL_FEATURE_CMP_HAS_WINDOW_MODE */
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 #if defined(FSL_FEATURE_CMP_HAS_PASS_THROUGH_MODE) && FSL_FEATURE_CMP_HAS_PASS_THROUGH_MODE
<> 144:ef7eb2e8f9f7 264 /*!
<> 144:ef7eb2e8f9f7 265 * @brief Enables/disables the pass through mode.
<> 144:ef7eb2e8f9f7 266 *
<> 144:ef7eb2e8f9f7 267 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 268 * @param enable Enable the feature or not.
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270 static inline void CMP_EnablePassThroughMode(CMP_Type *base, bool enable)
<> 144:ef7eb2e8f9f7 271 {
<> 144:ef7eb2e8f9f7 272 if (enable)
<> 144:ef7eb2e8f9f7 273 {
<> 144:ef7eb2e8f9f7 274 base->MUXCR |= CMP_MUXCR_PSTM_MASK;
<> 144:ef7eb2e8f9f7 275 }
<> 144:ef7eb2e8f9f7 276 else
<> 144:ef7eb2e8f9f7 277 {
<> 144:ef7eb2e8f9f7 278 base->MUXCR &= ~CMP_MUXCR_PSTM_MASK;
<> 144:ef7eb2e8f9f7 279 }
<> 144:ef7eb2e8f9f7 280 }
<> 144:ef7eb2e8f9f7 281 #endif /* FSL_FEATURE_CMP_HAS_PASS_THROUGH_MODE */
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /*!
<> 144:ef7eb2e8f9f7 284 * @brief Configures the filter.
<> 144:ef7eb2e8f9f7 285 *
<> 144:ef7eb2e8f9f7 286 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 287 * @param config Pointer to configuration structure.
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289 void CMP_SetFilterConfig(CMP_Type *base, const cmp_filter_config_t *config);
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /*!
<> 144:ef7eb2e8f9f7 292 * @brief Configures the internal DAC.
<> 144:ef7eb2e8f9f7 293 *
<> 144:ef7eb2e8f9f7 294 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 295 * @param config Pointer to configuration structure. "NULL" is for disabling the feature.
<> 144:ef7eb2e8f9f7 296 */
<> 144:ef7eb2e8f9f7 297 void CMP_SetDACConfig(CMP_Type *base, const cmp_dac_config_t *config);
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /*!
<> 144:ef7eb2e8f9f7 300 * @brief Enables the interrupts.
<> 144:ef7eb2e8f9f7 301 *
<> 144:ef7eb2e8f9f7 302 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 303 * @param mask Mask value for interrupts. See "_cmp_interrupt_enable".
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305 void CMP_EnableInterrupts(CMP_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /*!
<> 144:ef7eb2e8f9f7 308 * @brief Disables the interrupts.
<> 144:ef7eb2e8f9f7 309 *
<> 144:ef7eb2e8f9f7 310 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 311 * @param mask Mask value for interrupts. See "_cmp_interrupt_enable".
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 void CMP_DisableInterrupts(CMP_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /* @} */
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 /*!
<> 144:ef7eb2e8f9f7 318 * @name Results
<> 144:ef7eb2e8f9f7 319 * @{
<> 144:ef7eb2e8f9f7 320 */
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /*!
<> 144:ef7eb2e8f9f7 323 * @brief Gets the status flags.
<> 144:ef7eb2e8f9f7 324 *
<> 144:ef7eb2e8f9f7 325 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 326 *
<> 144:ef7eb2e8f9f7 327 * @return Mask value for the asserted flags. See "_cmp_status_flags".
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329 uint32_t CMP_GetStatusFlags(CMP_Type *base);
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 /*!
<> 144:ef7eb2e8f9f7 332 * @brief Clears the status flags.
<> 144:ef7eb2e8f9f7 333 *
<> 144:ef7eb2e8f9f7 334 * @param base CMP peripheral base address.
<> 144:ef7eb2e8f9f7 335 * @param mask Mask value for the flags. See "_cmp_status_flags".
<> 144:ef7eb2e8f9f7 336 */
<> 144:ef7eb2e8f9f7 337 void CMP_ClearStatusFlags(CMP_Type *base, uint32_t mask);
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /* @} */
<> 144:ef7eb2e8f9f7 340 #if defined(__cplusplus)
<> 144:ef7eb2e8f9f7 341 }
<> 144:ef7eb2e8f9f7 342 #endif
<> 144:ef7eb2e8f9f7 343 /*!
<> 144:ef7eb2e8f9f7 344 * @}
<> 144:ef7eb2e8f9f7 345 */
<> 144:ef7eb2e8f9f7 346 #endif /* _FSL_CMP_H_ */