added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
50:a417edff4437
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file gpio_irq_api.h
bogdanm 0:9b334a45a8ff 3 *******************************************************************************
bogdanm 0:9b334a45a8ff 4 * @section License
bogdanm 0:9b334a45a8ff 5 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 6 *******************************************************************************
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 9 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 10 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 11 *
bogdanm 0:9b334a45a8ff 12 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 13 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 14 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 15 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 16 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 19 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 20 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 21 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 22 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 23 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 24 *
bogdanm 0:9b334a45a8ff 25 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 26 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 27 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 28 *
bogdanm 0:9b334a45a8ff 29 ******************************************************************************/
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 #include "device.h"
bogdanm 0:9b334a45a8ff 32 #if DEVICE_INTERRUPTIN
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include "gpio_irq_api.h"
bogdanm 0:9b334a45a8ff 35 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 36 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #include "em_gpio.h"
bogdanm 0:9b334a45a8ff 39 #include "em_int.h"
bogdanm 0:9b334a45a8ff 40 #include "em_cmu.h"
bogdanm 0:9b334a45a8ff 41 #include "sleep_api.h"
bogdanm 0:9b334a45a8ff 42 #include "sleepmodes.h"
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 #define NUM_GPIO_CHANNELS (16)
bogdanm 0:9b334a45a8ff 45 #define GPIO_LEAST_ACTIVE_SLEEPMODE EM3
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 /* Macro return index of the LSB flag which is set. */
bogdanm 0:9b334a45a8ff 48 #if ((__CORTEX_M == 3) || (__CORTEX_M == 4))
bogdanm 0:9b334a45a8ff 49 #define GPIOINT_MASK2IDX(mask) (__CLZ(__RBIT(mask)))
bogdanm 0:9b334a45a8ff 50 #elif __CORTEX_M == 0
bogdanm 0:9b334a45a8ff 51 #define GPIOINT_MASK2IDX(mask) (countTrailingZeros(mask))
bogdanm 0:9b334a45a8ff 52 __STATIC_INLINE uint32_t countTrailingZeros(uint32_t mask)
bogdanm 0:9b334a45a8ff 53 {
bogdanm 0:9b334a45a8ff 54 uint32_t zeros;
bogdanm 0:9b334a45a8ff 55 for(zeros=0; (zeros<32) && (0 == (mask&0x1)); zeros++, mask>>=1);
bogdanm 0:9b334a45a8ff 56 return zeros;
bogdanm 0:9b334a45a8ff 57 }
bogdanm 0:9b334a45a8ff 58 #else
bogdanm 0:9b334a45a8ff 59 #error Unsupported architecture.
bogdanm 0:9b334a45a8ff 60 #endif
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 static uint32_t channel_ids[NUM_GPIO_CHANNELS] = { 0 }; // Relates pin number with interrupt action id
bogdanm 0:9b334a45a8ff 63 static uint8_t channel_ports[NUM_GPIO_CHANNELS/2] = { 0 }; // Storing 2 ports in each uint8
bogdanm 0:9b334a45a8ff 64 static gpio_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 65 static void GPIOINT_IRQDispatcher(uint32_t iflags);
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 static void handle_interrupt_in(uint8_t pin)
bogdanm 0:9b334a45a8ff 68 {
bogdanm 0:9b334a45a8ff 69 // Return if pin not linked with an interrupt function
bogdanm 0:9b334a45a8ff 70 if (channel_ids[pin] == 0) {
bogdanm 0:9b334a45a8ff 71 return;
bogdanm 0:9b334a45a8ff 72 }
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 //we are storing two ports in each uint8, so we must aquire the one we want.
bogdanm 0:9b334a45a8ff 75 // If pin is odd, the port is encoded in the 4 most significant bits. If pin is even, the port is encoded in the 4 least significant bits
bogdanm 0:9b334a45a8ff 76 uint8_t isRise = GPIO_PinInGet((pin & 0x1) ? channel_ports[(pin>>1) & 0x7] >> 4 & 0xF : channel_ports[(pin>>1) & 0x7] & 0xF, pin);
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 // Get trigger event
bogdanm 0:9b334a45a8ff 79 gpio_irq_event event = IRQ_NONE;
bogdanm 0:9b334a45a8ff 80 if ((GPIO->EXTIFALL & (1 << pin)) && !isRise) {
bogdanm 0:9b334a45a8ff 81 event = IRQ_FALL;
bogdanm 0:9b334a45a8ff 82 } else if ((GPIO->EXTIRISE & (1 << pin)) && isRise) {
bogdanm 0:9b334a45a8ff 83 event = IRQ_RISE;
bogdanm 0:9b334a45a8ff 84 }
bogdanm 0:9b334a45a8ff 85 GPIO_IntClear(pin);
bogdanm 0:9b334a45a8ff 86 irq_handler(channel_ids[pin], event);
bogdanm 0:9b334a45a8ff 87 }
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 void gpio_irq_preinit(gpio_irq_t *obj, PinName pin)
bogdanm 0:9b334a45a8ff 90 {
bogdanm 0:9b334a45a8ff 91 MBED_ASSERT(pin != NC);
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 /* Pin and port index encoded in one uint32.
bogdanm 0:9b334a45a8ff 94 * The four least significant bits represent the pin number
bogdanm 0:9b334a45a8ff 95 * The remaining bits represent the port number */
bogdanm 0:9b334a45a8ff 96 obj->pin = pin;
bogdanm 0:9b334a45a8ff 97 obj->risingEdge = 0;
bogdanm 0:9b334a45a8ff 98 obj->fallingEdge = 0;
bogdanm 0:9b334a45a8ff 99 }
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 102 {
bogdanm 0:9b334a45a8ff 103 // Init pins
bogdanm 0:9b334a45a8ff 104 gpio_irq_preinit(obj, pin);
bogdanm 0:9b334a45a8ff 105 // Initialize GPIO interrupt dispatcher
bogdanm 0:9b334a45a8ff 106 NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
bogdanm 0:9b334a45a8ff 107 NVIC_EnableIRQ(GPIO_ODD_IRQn);
bogdanm 0:9b334a45a8ff 108 NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn);
bogdanm 0:9b334a45a8ff 109 NVIC_EnableIRQ(GPIO_EVEN_IRQn);
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 /* Relate pin to interrupt action id */
bogdanm 0:9b334a45a8ff 112 channel_ids[obj->pin & 0xF] = id;
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 // Relate the pin number to a port. If pin in is odd store in the 4 most significant bits, if pin is even store in the 4 least significant bits
bogdanm 0:9b334a45a8ff 115 channel_ports[(obj->pin >> 1) & 0x7] = (obj->pin & 0x1) ? (channel_ports[(obj->pin >> 1) & 0x7] & 0x0F) | (obj->pin & 0xF0) : (channel_ports[(obj->pin >> 1) & 0x7] & 0xF0) | ((obj->pin >> 4) & 0xF);
bogdanm 0:9b334a45a8ff 116 /* Save pointer to handler */
bogdanm 0:9b334a45a8ff 117 irq_handler = handler;
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 pin_mode(obj->pin, Input);
bogdanm 0:9b334a45a8ff 120 return 0;
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 void gpio_irq_free(gpio_irq_t *obj)
bogdanm 0:9b334a45a8ff 124 {
bogdanm 0:9b334a45a8ff 125 // Destructor
bogdanm 0:9b334a45a8ff 126 channel_ids[obj->pin & 0xF] = 0;
bogdanm 0:9b334a45a8ff 127 gpio_irq_disable(obj); // Disable interrupt channel
bogdanm 0:9b334a45a8ff 128 pin_mode(obj->pin, Disabled); // Disable input pin
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
bogdanm 0:9b334a45a8ff 132 {
bogdanm 0:9b334a45a8ff 133 switch (event) {
bogdanm 0:9b334a45a8ff 134 case (IRQ_RISE):
bogdanm 0:9b334a45a8ff 135 obj->risingEdge = enable;
bogdanm 0:9b334a45a8ff 136 break;
bogdanm 0:9b334a45a8ff 137 case (IRQ_FALL):
bogdanm 0:9b334a45a8ff 138 obj->fallingEdge = enable;
bogdanm 0:9b334a45a8ff 139 break;
bogdanm 0:9b334a45a8ff 140 case (IRQ_NONE):
bogdanm 0:9b334a45a8ff 141 break;
bogdanm 0:9b334a45a8ff 142 }
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 /* Disable, set config and enable */
bogdanm 0:9b334a45a8ff 145 gpio_irq_disable(obj);
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 bool was_disabled = false;
bogdanm 0:9b334a45a8ff 148 if(GPIO->IEN == 0) was_disabled = true;
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 GPIO_IntConfig((GPIO_Port_TypeDef)(obj->pin >> 4 & 0xF), obj->pin &0xF, obj->risingEdge, obj->fallingEdge, obj->risingEdge || obj->fallingEdge);
bogdanm 0:9b334a45a8ff 151 if ((GPIO->IEN != 0) && (obj->risingEdge || obj->fallingEdge) && was_disabled) {
bogdanm 0:9b334a45a8ff 152 blockSleepMode(GPIO_LEAST_ACTIVE_SLEEPMODE);
bogdanm 0:9b334a45a8ff 153 }
bogdanm 0:9b334a45a8ff 154 }
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 inline void gpio_irq_enable(gpio_irq_t *obj)
bogdanm 0:9b334a45a8ff 157 {
bogdanm 0:9b334a45a8ff 158 if(GPIO->IEN == 0) blockSleepMode(GPIO_LEAST_ACTIVE_SLEEPMODE);
bogdanm 0:9b334a45a8ff 159 GPIO_IntEnable(1 << obj->pin & 0xF); // pin mask for pins to enable
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 inline void gpio_irq_disable(gpio_irq_t *obj)
bogdanm 0:9b334a45a8ff 163 {
bogdanm 0:9b334a45a8ff 164 GPIO_IntDisable(1 << obj->pin & 0xF); // pin mask for pins to disable
bogdanm 0:9b334a45a8ff 165 if(GPIO->IEN == 0) unblockSleepMode(GPIO_LEAST_ACTIVE_SLEEPMODE);
bogdanm 0:9b334a45a8ff 166 }
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 169 * @brief
bogdanm 0:9b334a45a8ff 170 * Function calls users callback for registered pin interrupts.
bogdanm 0:9b334a45a8ff 171 *
bogdanm 0:9b334a45a8ff 172 * @details
bogdanm 0:9b334a45a8ff 173 * This function is called when GPIO interrupts are handled by the dispatcher.
bogdanm 0:9b334a45a8ff 174 * Function gets even or odd interrupt flags and calls user callback
bogdanm 0:9b334a45a8ff 175 * registered for that pin. Function iterates on flags starting from MSB.
bogdanm 0:9b334a45a8ff 176 *
bogdanm 0:9b334a45a8ff 177 * @param iflags
bogdanm 0:9b334a45a8ff 178 * Interrupt flags which shall be handled by the dispatcher.
bogdanm 0:9b334a45a8ff 179 *
bogdanm 0:9b334a45a8ff 180 ******************************************************************************/
bogdanm 0:9b334a45a8ff 181 static void GPIOINT_IRQDispatcher(uint32_t iflags)
bogdanm 0:9b334a45a8ff 182 {
bogdanm 0:9b334a45a8ff 183 uint32_t irqIdx;
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /* check for all flags set in IF register */
bogdanm 0:9b334a45a8ff 186 while(iflags) {
bogdanm 0:9b334a45a8ff 187 irqIdx = GPIOINT_MASK2IDX(iflags);
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 /* clear flag */
bogdanm 0:9b334a45a8ff 190 iflags &= ~(1 << irqIdx);
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /* call user callback */
bogdanm 0:9b334a45a8ff 193 handle_interrupt_in(irqIdx);
bogdanm 0:9b334a45a8ff 194 }
bogdanm 0:9b334a45a8ff 195 }
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 198 * @brief
bogdanm 0:9b334a45a8ff 199 * GPIO EVEN interrupt handler. Interrupt handler clears all IF even flags and
bogdanm 0:9b334a45a8ff 200 * call the dispatcher passing the flags which triggered the interrupt.
bogdanm 0:9b334a45a8ff 201 *
bogdanm 0:9b334a45a8ff 202 ******************************************************************************/
bogdanm 0:9b334a45a8ff 203 void GPIO_EVEN_IRQHandler(void)
bogdanm 0:9b334a45a8ff 204 {
bogdanm 0:9b334a45a8ff 205 uint32_t iflags;
bogdanm 0:9b334a45a8ff 206 /* Get all even interrupts */
bogdanm 0:9b334a45a8ff 207 iflags = GPIO_IntGetEnabled() & 0x00005555;
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 /* Clean only even interrupts*/
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 GPIO_IntClear(iflags);
bogdanm 0:9b334a45a8ff 212 GPIOINT_IRQDispatcher(iflags);
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 217 * @brief
bogdanm 0:9b334a45a8ff 218 * GPIO ODD interrupt handler. Interrupt handler clears all IF odd flags and
bogdanm 0:9b334a45a8ff 219 * call the dispatcher passing the flags which triggered the interrupt.
bogdanm 0:9b334a45a8ff 220 *
bogdanm 0:9b334a45a8ff 221 ******************************************************************************/
bogdanm 0:9b334a45a8ff 222 void GPIO_ODD_IRQHandler(void)
bogdanm 0:9b334a45a8ff 223 {
bogdanm 0:9b334a45a8ff 224 uint32_t iflags;
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 /* Get all odd interrupts */
bogdanm 0:9b334a45a8ff 227 iflags = GPIO_IntGetEnabled() & 0x0000AAAA;
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 /* Clean only even interrupts */
bogdanm 0:9b334a45a8ff 230 GPIO_IntClear(iflags);
bogdanm 0:9b334a45a8ff 231 GPIOINT_IRQDispatcher(iflags);
bogdanm 0:9b334a45a8ff 232 }
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 #endif