added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 17 #define MBED_PERIPHERALNAMES_H
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 22 extern "C" {
bogdanm 0:9b334a45a8ff 23 #endif
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 typedef enum {
bogdanm 0:9b334a45a8ff 26 OSC32KCLK = 0,
bogdanm 0:9b334a45a8ff 27 RTC_CLKIN = 2
bogdanm 0:9b334a45a8ff 28 } RTCName;
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 typedef enum {
bogdanm 0:9b334a45a8ff 31 UART_0 = (int)UART0_BASE,
bogdanm 0:9b334a45a8ff 32 UART_1 = (int)UART1_BASE,
bogdanm 0:9b334a45a8ff 33 UART_2 = (int)UART2_BASE
bogdanm 0:9b334a45a8ff 34 } UARTName;
bogdanm 0:9b334a45a8ff 35 #define STDIO_UART_TX USBTX
bogdanm 0:9b334a45a8ff 36 #define STDIO_UART_RX USBRX
bogdanm 0:9b334a45a8ff 37 #define STDIO_UART UART_0
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 typedef enum {
bogdanm 0:9b334a45a8ff 40 I2C_0 = (int)I2C0_BASE,
bogdanm 0:9b334a45a8ff 41 I2C_1 = (int)I2C1_BASE,
bogdanm 0:9b334a45a8ff 42 } I2CName;
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 #define TPM_SHIFT 8
bogdanm 0:9b334a45a8ff 45 typedef enum {
bogdanm 0:9b334a45a8ff 46 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
bogdanm 0:9b334a45a8ff 47 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
bogdanm 0:9b334a45a8ff 48 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
bogdanm 0:9b334a45a8ff 49 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
bogdanm 0:9b334a45a8ff 50 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
bogdanm 0:9b334a45a8ff 51 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
bogdanm 0:9b334a45a8ff 54 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
bogdanm 0:9b334a45a8ff 57 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
bogdanm 0:9b334a45a8ff 58 } PWMName;
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 #define CHANNELS_A_SHIFT 5
bogdanm 0:9b334a45a8ff 61 typedef enum {
bogdanm 0:9b334a45a8ff 62 ADC0_SE0 = 0,
bogdanm 0:9b334a45a8ff 63 ADC0_SE3 = 3,
bogdanm 0:9b334a45a8ff 64 ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
bogdanm 0:9b334a45a8ff 65 ADC0_SE4b = 4,
bogdanm 0:9b334a45a8ff 66 ADC0_SE5b = 5,
bogdanm 0:9b334a45a8ff 67 ADC0_SE6b = 6,
bogdanm 0:9b334a45a8ff 68 ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
bogdanm 0:9b334a45a8ff 69 ADC0_SE7b = 7,
bogdanm 0:9b334a45a8ff 70 ADC0_SE8 = 8,
bogdanm 0:9b334a45a8ff 71 ADC0_SE9 = 9,
bogdanm 0:9b334a45a8ff 72 ADC0_SE11 = 11,
bogdanm 0:9b334a45a8ff 73 ADC0_SE12 = 12,
bogdanm 0:9b334a45a8ff 74 ADC0_SE13 = 13,
bogdanm 0:9b334a45a8ff 75 ADC0_SE14 = 14,
bogdanm 0:9b334a45a8ff 76 ADC0_SE15 = 15,
bogdanm 0:9b334a45a8ff 77 ADC0_SE23 = 23
bogdanm 0:9b334a45a8ff 78 } ADCName;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 typedef enum {
bogdanm 0:9b334a45a8ff 81 DAC_0 = 0
bogdanm 0:9b334a45a8ff 82 } DACName;
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 typedef enum {
bogdanm 0:9b334a45a8ff 86 SPI_0 = (int)SPI0_BASE,
bogdanm 0:9b334a45a8ff 87 SPI_1 = (int)SPI1_BASE,
bogdanm 0:9b334a45a8ff 88 } SPIName;
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 // Default peripherals
bogdanm 0:9b334a45a8ff 91 #define MBED_SPI0 PTD2, PTD3, PTD1, PTD0
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 #define MBED_UART0 PTC4, PTC3
bogdanm 0:9b334a45a8ff 94 #define MBED_UART1 PTD3, PTD2
bogdanm 0:9b334a45a8ff 95 #define MBED_UARTUSB PTA2, PTA1
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 #define MBED_I2C0 PTC9, PTC8
bogdanm 0:9b334a45a8ff 98 #define MBED_I2C1 PTE1, PTE0
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 #define MBED_ANALOGOUT0 PTE30
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 #define MBED_ANALOGIN0 PTC2
bogdanm 0:9b334a45a8ff 103 #define MBED_ANALOGIN1 PTB3
bogdanm 0:9b334a45a8ff 104 #define MBED_ANALOGIN2 PTB2
bogdanm 0:9b334a45a8ff 105 #define MBED_ANALOGIN3 PTB1
bogdanm 0:9b334a45a8ff 106 #define MBED_ANALOGIN4 PTB0
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 #define MBED_PWMOUT0 PTD4
bogdanm 0:9b334a45a8ff 109 #define MBED_PWMOUT1 PTA12
bogdanm 0:9b334a45a8ff 110 #define MBED_PWMOUT2 PTA4
bogdanm 0:9b334a45a8ff 111 #define MBED_PWMOUT3 PTA5
bogdanm 0:9b334a45a8ff 112 #define MBED_PWMOUT4 PTC8
bogdanm 0:9b334a45a8ff 113 #define MBED_PWMOUT5 PTC9
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 116 }
bogdanm 0:9b334a45a8ff 117 #endif
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 #endif