Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_RENESAS/TARGET_VK_RZ_A1H/serial_api.c@119:3921aeca8633, 2016-04-29 (annotated)

Committer:
mbed_official
Date:
Fri Apr 29 01:15:11 2016 +0100
Revision:
119:3921aeca8633
Synchronized with git revision fe9720f24b1adc71ab6962506ec51290f6afd270



Full URL: https://github.com/mbedmicro/mbed/commit/fe9720f24b1adc71ab6962506ec51290f6afd270/



[Renesas RZ/A1H] Enable asynchronous communications

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 119:3921aeca8633 1 /* mbed Microcontroller Library
mbed_official 119:3921aeca8633 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 119:3921aeca8633 3 *
mbed_official 119:3921aeca8633 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 119:3921aeca8633 5 * you may not use this file except in compliance with the License.
mbed_official 119:3921aeca8633 6 * You may obtain a copy of the License at
mbed_official 119:3921aeca8633 7 *
mbed_official 119:3921aeca8633 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 119:3921aeca8633 9 *
mbed_official 119:3921aeca8633 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 119:3921aeca8633 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 119:3921aeca8633 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 119:3921aeca8633 13 * See the License for the specific language governing permissions and
mbed_official 119:3921aeca8633 14 * limitations under the License.
mbed_official 119:3921aeca8633 15 */
mbed_official 119:3921aeca8633 16 // math.h required for floating point operations for baud rate calculation
mbed_official 119:3921aeca8633 17 #include "mbed_assert.h"
mbed_official 119:3921aeca8633 18 #include <math.h>
mbed_official 119:3921aeca8633 19 #include <string.h>
mbed_official 119:3921aeca8633 20 #include <stdlib.h>
mbed_official 119:3921aeca8633 21
mbed_official 119:3921aeca8633 22 #include "serial_api.h"
mbed_official 119:3921aeca8633 23 #include "cmsis.h"
mbed_official 119:3921aeca8633 24 #include "pinmap.h"
mbed_official 119:3921aeca8633 25 #include "gpio_api.h"
mbed_official 119:3921aeca8633 26
mbed_official 119:3921aeca8633 27 #include "scif_iodefine.h"
mbed_official 119:3921aeca8633 28 #include "cpg_iodefine.h"
mbed_official 119:3921aeca8633 29
mbed_official 119:3921aeca8633 30 /******************************************************************************
mbed_official 119:3921aeca8633 31 * INITIALIZATION
mbed_official 119:3921aeca8633 32 ******************************************************************************/
mbed_official 119:3921aeca8633 33 #define PCLK (66666666) // Define the peripheral clock P1 frequency.
mbed_official 119:3921aeca8633 34
mbed_official 119:3921aeca8633 35 #define UART_NUM 8
mbed_official 119:3921aeca8633 36 #define IRQ_NUM 2
mbed_official 119:3921aeca8633 37
mbed_official 119:3921aeca8633 38 static void uart0_tx_irq(void);
mbed_official 119:3921aeca8633 39 static void uart1_tx_irq(void);
mbed_official 119:3921aeca8633 40 static void uart2_tx_irq(void);
mbed_official 119:3921aeca8633 41 static void uart3_tx_irq(void);
mbed_official 119:3921aeca8633 42 static void uart4_tx_irq(void);
mbed_official 119:3921aeca8633 43 static void uart5_tx_irq(void);
mbed_official 119:3921aeca8633 44 static void uart6_tx_irq(void);
mbed_official 119:3921aeca8633 45 static void uart7_tx_irq(void);
mbed_official 119:3921aeca8633 46 static void uart0_rx_irq(void);
mbed_official 119:3921aeca8633 47 static void uart1_rx_irq(void);
mbed_official 119:3921aeca8633 48 static void uart2_rx_irq(void);
mbed_official 119:3921aeca8633 49 static void uart3_rx_irq(void);
mbed_official 119:3921aeca8633 50 static void uart4_rx_irq(void);
mbed_official 119:3921aeca8633 51 static void uart5_rx_irq(void);
mbed_official 119:3921aeca8633 52 static void uart6_rx_irq(void);
mbed_official 119:3921aeca8633 53 static void uart7_rx_irq(void);
mbed_official 119:3921aeca8633 54
mbed_official 119:3921aeca8633 55 #ifdef MAX_PERI
mbed_official 119:3921aeca8633 56 static const PinMap PinMap_UART_TX[] = {
mbed_official 119:3921aeca8633 57 {P2_14 , UART0, 6},
mbed_official 119:3921aeca8633 58 {P4_9 , UART0, 7},
mbed_official 119:3921aeca8633 59 {P6_9 , UART0, 5},
mbed_official 119:3921aeca8633 60 {P2_5 , UART1, 6},
mbed_official 119:3921aeca8633 61 {P4_12 , UART1, 7},
mbed_official 119:3921aeca8633 62 {P6_12 , UART1, 5},
mbed_official 119:3921aeca8633 63 {P9_3 , UART1, 4},
mbed_official 119:3921aeca8633 64 {P3_0 , UART2, 6},
mbed_official 119:3921aeca8633 65 {P3_1 , UART2, 4},
mbed_official 119:3921aeca8633 66 {P4_2 , UART2, 5},
mbed_official 119:3921aeca8633 67 {P4_14 , UART2, 7},
mbed_official 119:3921aeca8633 68 {P6_3 , UART2, 7},
mbed_official 119:3921aeca8633 69 {P8_6 , UART2, 7},
mbed_official 119:3921aeca8633 70 {P3_5 , UART3, 7},
mbed_official 119:3921aeca8633 71 {P5_3 , UART3, 5},
mbed_official 119:3921aeca8633 72 {P6_1 , UART3, 7},
mbed_official 119:3921aeca8633 73 {P8_8 , UART3, 7},
mbed_official 119:3921aeca8633 74 {P5_0 , UART4, 5},
mbed_official 119:3921aeca8633 75 {P7_1 , UART4, 4},
mbed_official 119:3921aeca8633 76 {P8_14 , UART4, 7},
mbed_official 119:3921aeca8633 77 {P6_6 , UART5, 5},
mbed_official 119:3921aeca8633 78 {P8_1 , UART5, 4},
mbed_official 119:3921aeca8633 79 {P8_13 , UART5, 5},
mbed_official 119:3921aeca8633 80 {P5_6 , UART6, 5},
mbed_official 119:3921aeca8633 81 {P6_14 , UART6, 4},
mbed_official 119:3921aeca8633 82 {P7_4 , UART7, 4},
mbed_official 119:3921aeca8633 83 {NC , NC , 0}
mbed_official 119:3921aeca8633 84 };
mbed_official 119:3921aeca8633 85
mbed_official 119:3921aeca8633 86 static const PinMap PinMap_UART_RX[] = {
mbed_official 119:3921aeca8633 87 {P2_15 , UART0, 6},
mbed_official 119:3921aeca8633 88 {P4_10 , UART0, 7},
mbed_official 119:3921aeca8633 89 {P6_10 , UART0, 5},
mbed_official 119:3921aeca8633 90 {P2_6 , UART1, 6},
mbed_official 119:3921aeca8633 91 {P4_13 , UART1, 7},
mbed_official 119:3921aeca8633 92 {P6_13 , UART1, 5},
mbed_official 119:3921aeca8633 93 {P9_4 , UART1, 4},
mbed_official 119:3921aeca8633 94 {P3_2 , UART2, 4},
mbed_official 119:3921aeca8633 95 {P4_3 , UART2, 5},
mbed_official 119:3921aeca8633 96 {P4_15 , UART2, 7},
mbed_official 119:3921aeca8633 97 {P6_2 , UART2, 7},
mbed_official 119:3921aeca8633 98 {P8_4 , UART2, 7},
mbed_official 119:3921aeca8633 99 {P3_6 , UART3, 7},
mbed_official 119:3921aeca8633 100 {P5_4 , UART3, 5},
mbed_official 119:3921aeca8633 101 {P6_0 , UART3, 7},
mbed_official 119:3921aeca8633 102 {P8_9 , UART3, 7},
mbed_official 119:3921aeca8633 103 {P5_1 , UART4, 5},
mbed_official 119:3921aeca8633 104 {P7_2 , UART4, 4},
mbed_official 119:3921aeca8633 105 {P8_15 , UART4, 7},
mbed_official 119:3921aeca8633 106 {P6_7 , UART5, 5},
mbed_official 119:3921aeca8633 107 {P8_2 , UART5, 4},
mbed_official 119:3921aeca8633 108 {P8_11 , UART5, 5},
mbed_official 119:3921aeca8633 109 {P5_7 , UART6, 5},
mbed_official 119:3921aeca8633 110 {P6_15 , UART6, 4},
mbed_official 119:3921aeca8633 111 {P7_5 , UART7, 4},
mbed_official 119:3921aeca8633 112 {NC , NC , 0}
mbed_official 119:3921aeca8633 113 };
mbed_official 119:3921aeca8633 114
mbed_official 119:3921aeca8633 115 static const PinMap PinMap_UART_CTS[] = {
mbed_official 119:3921aeca8633 116 {P2_3 , UART1, 6},
mbed_official 119:3921aeca8633 117 {P9_5 , UART1, 4},
mbed_official 119:3921aeca8633 118 {P6_3 , UART5, 5},
mbed_official 119:3921aeca8633 119 {P7_15 , UART5, 4},
mbed_official 119:3921aeca8633 120 {P7_6 , UART7, 4},
mbed_official 119:3921aeca8633 121 {NC , NC , 0}
mbed_official 119:3921aeca8633 122 };
mbed_official 119:3921aeca8633 123 static const PinMap PinMap_UART_RTS[] = {
mbed_official 119:3921aeca8633 124 {P2_7 , UART1, 6},
mbed_official 119:3921aeca8633 125 {P9_6 , UART1, 4},
mbed_official 119:3921aeca8633 126 {P6_4 , UART5, 5},
mbed_official 119:3921aeca8633 127 {P8_3 , UART5, 4},
mbed_official 119:3921aeca8633 128 {P7_7 , UART7, 4},
mbed_official 119:3921aeca8633 129 {NC , NC , 0}
mbed_official 119:3921aeca8633 130 };
mbed_official 119:3921aeca8633 131 #else
mbed_official 119:3921aeca8633 132 static const PinMap PinMap_UART_TX[] = {
mbed_official 119:3921aeca8633 133 {P3_0 , UART2, 6},
mbed_official 119:3921aeca8633 134 {P3_1 , UART2, 4},
mbed_official 119:3921aeca8633 135 {P4_2 , UART2, 5},
mbed_official 119:3921aeca8633 136 {P5_3 , UART3, 5},
mbed_official 119:3921aeca8633 137 {P8_8 , UART3, 7},
mbed_official 119:3921aeca8633 138 {P5_0 , UART4, 5},
mbed_official 119:3921aeca8633 139 {P8_14 , UART4, 7},
mbed_official 119:3921aeca8633 140 {P8_13 , UART5, 5},
mbed_official 119:3921aeca8633 141 {P5_6 , UART6, 5},
mbed_official 119:3921aeca8633 142 {NC , NC , 0}
mbed_official 119:3921aeca8633 143 };
mbed_official 119:3921aeca8633 144
mbed_official 119:3921aeca8633 145 static const PinMap PinMap_UART_RX[] = {
mbed_official 119:3921aeca8633 146 {P3_2 , UART2, 4},
mbed_official 119:3921aeca8633 147 {P4_3 , UART2, 5},
mbed_official 119:3921aeca8633 148 {P5_4 , UART3, 5},
mbed_official 119:3921aeca8633 149 {P8_9 , UART3, 7},
mbed_official 119:3921aeca8633 150 {P5_1 , UART4, 5},
mbed_official 119:3921aeca8633 151 {P8_15 , UART4, 7},
mbed_official 119:3921aeca8633 152 {P8_11 , UART5, 5},
mbed_official 119:3921aeca8633 153 {P5_7 , UART6, 5},
mbed_official 119:3921aeca8633 154 {NC , NC , 0}
mbed_official 119:3921aeca8633 155 };
mbed_official 119:3921aeca8633 156
mbed_official 119:3921aeca8633 157 static const PinMap PinMap_UART_CTS[] = {
mbed_official 119:3921aeca8633 158 {NC , NC , 0}
mbed_official 119:3921aeca8633 159 };
mbed_official 119:3921aeca8633 160 static const PinMap PinMap_UART_RTS[] = {
mbed_official 119:3921aeca8633 161 {NC , NC , 0}
mbed_official 119:3921aeca8633 162 };
mbed_official 119:3921aeca8633 163 #endif
mbed_official 119:3921aeca8633 164
mbed_official 119:3921aeca8633 165 static const struct st_scif *SCIF[] = SCIF_ADDRESS_LIST;
mbed_official 119:3921aeca8633 166 static uart_irq_handler irq_handler;
mbed_official 119:3921aeca8633 167
mbed_official 119:3921aeca8633 168 int stdio_uart_inited = 0;
mbed_official 119:3921aeca8633 169 serial_t stdio_uart;
mbed_official 119:3921aeca8633 170
mbed_official 119:3921aeca8633 171 struct serial_global_data_s {
mbed_official 119:3921aeca8633 172 uint32_t serial_irq_id;
mbed_official 119:3921aeca8633 173 gpio_t sw_rts, sw_cts;
mbed_official 119:3921aeca8633 174 uint8_t count, rx_irq_set_flow, rx_irq_set_api;
mbed_official 119:3921aeca8633 175 };
mbed_official 119:3921aeca8633 176
mbed_official 119:3921aeca8633 177 static struct serial_global_data_s uart_data[UART_NUM];
mbed_official 119:3921aeca8633 178
mbed_official 119:3921aeca8633 179 static const IRQn_Type irq_set_tbl[UART_NUM][IRQ_NUM] = {
mbed_official 119:3921aeca8633 180 {SCIFRXI0_IRQn, SCIFTXI0_IRQn},
mbed_official 119:3921aeca8633 181 {SCIFRXI1_IRQn, SCIFTXI1_IRQn},
mbed_official 119:3921aeca8633 182 {SCIFRXI2_IRQn, SCIFTXI2_IRQn},
mbed_official 119:3921aeca8633 183 {SCIFRXI3_IRQn, SCIFTXI3_IRQn},
mbed_official 119:3921aeca8633 184 {SCIFRXI4_IRQn, SCIFTXI4_IRQn},
mbed_official 119:3921aeca8633 185 {SCIFRXI5_IRQn, SCIFTXI5_IRQn},
mbed_official 119:3921aeca8633 186 {SCIFRXI6_IRQn, SCIFTXI6_IRQn},
mbed_official 119:3921aeca8633 187 {SCIFRXI7_IRQn, SCIFTXI7_IRQn}
mbed_official 119:3921aeca8633 188 };
mbed_official 119:3921aeca8633 189
mbed_official 119:3921aeca8633 190 static const IRQHandler hander_set_tbl[UART_NUM][IRQ_NUM] = {
mbed_official 119:3921aeca8633 191 {uart0_rx_irq, uart0_tx_irq},
mbed_official 119:3921aeca8633 192 {uart1_rx_irq, uart1_tx_irq},
mbed_official 119:3921aeca8633 193 {uart2_rx_irq, uart2_tx_irq},
mbed_official 119:3921aeca8633 194 {uart3_rx_irq, uart3_tx_irq},
mbed_official 119:3921aeca8633 195 {uart4_rx_irq, uart4_tx_irq},
mbed_official 119:3921aeca8633 196 {uart5_rx_irq, uart5_tx_irq},
mbed_official 119:3921aeca8633 197 {uart6_rx_irq, uart6_tx_irq},
mbed_official 119:3921aeca8633 198 {uart7_rx_irq, uart7_tx_irq}
mbed_official 119:3921aeca8633 199 };
mbed_official 119:3921aeca8633 200
mbed_official 119:3921aeca8633 201 static __IO uint16_t *SCSCR_MATCH[] = {
mbed_official 119:3921aeca8633 202 &SCSCR_0,
mbed_official 119:3921aeca8633 203 &SCSCR_1,
mbed_official 119:3921aeca8633 204 &SCSCR_2,
mbed_official 119:3921aeca8633 205 &SCSCR_3,
mbed_official 119:3921aeca8633 206 &SCSCR_4,
mbed_official 119:3921aeca8633 207 &SCSCR_5,
mbed_official 119:3921aeca8633 208 &SCSCR_6,
mbed_official 119:3921aeca8633 209 &SCSCR_7,
mbed_official 119:3921aeca8633 210 };
mbed_official 119:3921aeca8633 211
mbed_official 119:3921aeca8633 212 static __IO uint16_t *SCFSR_MATCH[] = {
mbed_official 119:3921aeca8633 213 &SCFSR_0,
mbed_official 119:3921aeca8633 214 &SCFSR_1,
mbed_official 119:3921aeca8633 215 &SCFSR_2,
mbed_official 119:3921aeca8633 216 &SCFSR_3,
mbed_official 119:3921aeca8633 217 &SCFSR_4,
mbed_official 119:3921aeca8633 218 &SCFSR_5,
mbed_official 119:3921aeca8633 219 &SCFSR_6,
mbed_official 119:3921aeca8633 220 &SCFSR_7,
mbed_official 119:3921aeca8633 221 };
mbed_official 119:3921aeca8633 222
mbed_official 119:3921aeca8633 223
mbed_official 119:3921aeca8633 224 void serial_init(serial_t *obj, PinName tx, PinName rx) {
mbed_official 119:3921aeca8633 225 volatile uint8_t dummy ;
mbed_official 119:3921aeca8633 226 int is_stdio_uart = 0;
mbed_official 119:3921aeca8633 227 // determine the UART to use
mbed_official 119:3921aeca8633 228 uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
mbed_official 119:3921aeca8633 229 uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
mbed_official 119:3921aeca8633 230 uint32_t uart = pinmap_merge(uart_tx, uart_rx);
mbed_official 119:3921aeca8633 231
mbed_official 119:3921aeca8633 232 MBED_ASSERT((int)uart != NC);
mbed_official 119:3921aeca8633 233
mbed_official 119:3921aeca8633 234 obj->uart = (struct st_scif *)SCIF[uart];
mbed_official 119:3921aeca8633 235 // enable power
mbed_official 119:3921aeca8633 236 switch (uart) {
mbed_official 119:3921aeca8633 237 case UART0:
mbed_official 119:3921aeca8633 238 CPG.STBCR4 &= ~(1 << 7);
mbed_official 119:3921aeca8633 239 break;
mbed_official 119:3921aeca8633 240 case UART1:
mbed_official 119:3921aeca8633 241 CPG.STBCR4 &= ~(1 << 6);
mbed_official 119:3921aeca8633 242 break;
mbed_official 119:3921aeca8633 243 case UART2:
mbed_official 119:3921aeca8633 244 CPG.STBCR4 &= ~(1 << 5);
mbed_official 119:3921aeca8633 245 break;
mbed_official 119:3921aeca8633 246 case UART3:
mbed_official 119:3921aeca8633 247 CPG.STBCR4 &= ~(1 << 4);
mbed_official 119:3921aeca8633 248 break;
mbed_official 119:3921aeca8633 249 case UART4:
mbed_official 119:3921aeca8633 250 CPG.STBCR4 &= ~(1 << 3);
mbed_official 119:3921aeca8633 251 break;
mbed_official 119:3921aeca8633 252 case UART5:
mbed_official 119:3921aeca8633 253 CPG.STBCR4 &= ~(1 << 2);
mbed_official 119:3921aeca8633 254 break;
mbed_official 119:3921aeca8633 255 case UART6:
mbed_official 119:3921aeca8633 256 CPG.STBCR4 &= ~(1 << 1);
mbed_official 119:3921aeca8633 257 break;
mbed_official 119:3921aeca8633 258 case UART7:
mbed_official 119:3921aeca8633 259 CPG.STBCR4 &= ~(1 << 0);
mbed_official 119:3921aeca8633 260 break;
mbed_official 119:3921aeca8633 261 }
mbed_official 119:3921aeca8633 262 dummy = CPG.STBCR4;
mbed_official 119:3921aeca8633 263
mbed_official 119:3921aeca8633 264 /* if this uart has been previously configured to tx, wait tx completion befor loading new configuration */
mbed_official 119:3921aeca8633 265 if(obj->uart->SCSCR & 0xA0)
mbed_official 119:3921aeca8633 266 while(!(obj->uart->SCFSR & 0x0040));
mbed_official 119:3921aeca8633 267
mbed_official 119:3921aeca8633 268 /* ==== SCIF initial setting ==== */
mbed_official 119:3921aeca8633 269 /* ---- Serial control register (SCSCR) setting ---- */
mbed_official 119:3921aeca8633 270 /* B'00 : Internal CLK */
mbed_official 119:3921aeca8633 271 obj->uart->SCSCR = 0x0000u; /* SCIF transmitting and receiving operations stop */
mbed_official 119:3921aeca8633 272
mbed_official 119:3921aeca8633 273 /* ---- FIFO control register (SCFCR) setting ---- */
mbed_official 119:3921aeca8633 274 /* Transmit FIFO reset & Receive FIFO data register reset */
mbed_official 119:3921aeca8633 275 obj->uart->SCFCR = 0x0006;
mbed_official 119:3921aeca8633 276
mbed_official 119:3921aeca8633 277 /* ---- Serial status register (SCFSR) setting ---- */
mbed_official 119:3921aeca8633 278 dummy = obj->uart->SCFSR;
mbed_official 119:3921aeca8633 279 obj->uart->SCFSR = (dummy & 0xFF6Cu); /* ER,BRK,DR bit clear */
mbed_official 119:3921aeca8633 280
mbed_official 119:3921aeca8633 281 /* ---- Line status register (SCLSR) setting ---- */
mbed_official 119:3921aeca8633 282 /* ORER bit clear */
mbed_official 119:3921aeca8633 283 obj->uart->SCLSR = 0;
mbed_official 119:3921aeca8633 284
mbed_official 119:3921aeca8633 285 /* ---- Serial extension mode register (SCEMR) setting ----
mbed_official 119:3921aeca8633 286 b7 BGDM - Baud rate generator double-speed mode : Normal mode
mbed_official 119:3921aeca8633 287 b0 ABCS - Base clock select in asynchronous mode : Base clock is 16 times the bit rate */
mbed_official 119:3921aeca8633 288 obj->uart->SCEMR = 0x0000u;
mbed_official 119:3921aeca8633 289
mbed_official 119:3921aeca8633 290 /* ---- Bit rate register (SCBRR) setting ---- */
mbed_official 119:3921aeca8633 291 serial_baud (obj, 9600);
mbed_official 119:3921aeca8633 292 serial_format(obj, 8, ParityNone, 1);
mbed_official 119:3921aeca8633 293
mbed_official 119:3921aeca8633 294 /* ---- FIFO control register (SCFCR) setting ---- */
mbed_official 119:3921aeca8633 295 obj->uart->SCFCR = 0x0030u;
mbed_official 119:3921aeca8633 296
mbed_official 119:3921aeca8633 297 /* ---- Serial port register (SCSPTR) setting ----
mbed_official 119:3921aeca8633 298 b1 SPB2IO - Serial port break output : disabled
mbed_official 119:3921aeca8633 299 b0 SPB2DT - Serial port break data : High-level */
mbed_official 119:3921aeca8633 300 obj->uart->SCSPTR = 0x0003u; // SPB2IO = 1, SPB2DT = 1
mbed_official 119:3921aeca8633 301
mbed_official 119:3921aeca8633 302 /* ---- Line status register (SCLSR) setting ----
mbed_official 119:3921aeca8633 303 b0 ORER - Overrun error detect : clear */
mbed_official 119:3921aeca8633 304
mbed_official 119:3921aeca8633 305 if (obj->uart->SCLSR & 0x0001) {
mbed_official 119:3921aeca8633 306 obj->uart->SCLSR = 0u; // ORER clear
mbed_official 119:3921aeca8633 307 }
mbed_official 119:3921aeca8633 308
mbed_official 119:3921aeca8633 309 // pinout the chosen uart
mbed_official 119:3921aeca8633 310 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 119:3921aeca8633 311 pinmap_pinout(rx, PinMap_UART_RX);
mbed_official 119:3921aeca8633 312
mbed_official 119:3921aeca8633 313 switch (uart) {
mbed_official 119:3921aeca8633 314 case UART0:
mbed_official 119:3921aeca8633 315 obj->index = 0;
mbed_official 119:3921aeca8633 316 break;
mbed_official 119:3921aeca8633 317 case UART1:
mbed_official 119:3921aeca8633 318 obj->index = 1;
mbed_official 119:3921aeca8633 319 break;
mbed_official 119:3921aeca8633 320 case UART2:
mbed_official 119:3921aeca8633 321 obj->index = 2;
mbed_official 119:3921aeca8633 322 break;
mbed_official 119:3921aeca8633 323 case UART3:
mbed_official 119:3921aeca8633 324 obj->index = 3;
mbed_official 119:3921aeca8633 325 break;
mbed_official 119:3921aeca8633 326 case UART4:
mbed_official 119:3921aeca8633 327 obj->index = 4;
mbed_official 119:3921aeca8633 328 break;
mbed_official 119:3921aeca8633 329 case UART5:
mbed_official 119:3921aeca8633 330 obj->index = 5;
mbed_official 119:3921aeca8633 331 break;
mbed_official 119:3921aeca8633 332 case UART6:
mbed_official 119:3921aeca8633 333 obj->index = 6;
mbed_official 119:3921aeca8633 334 break;
mbed_official 119:3921aeca8633 335 case UART7:
mbed_official 119:3921aeca8633 336 obj->index = 7;
mbed_official 119:3921aeca8633 337 break;
mbed_official 119:3921aeca8633 338 }
mbed_official 119:3921aeca8633 339 uart_data[obj->index].sw_rts.pin = NC;
mbed_official 119:3921aeca8633 340 uart_data[obj->index].sw_cts.pin = NC;
mbed_official 119:3921aeca8633 341
mbed_official 119:3921aeca8633 342 /* ---- Serial control register (SCSCR) setting ---- */
mbed_official 119:3921aeca8633 343 /* Setting the TE and RE bits enables the TxD and RxD pins to be used. */
mbed_official 119:3921aeca8633 344 obj->uart->SCSCR = (((uart_tx != (uint32_t)NC)? 0xA0 : 0) | ((uart_rx != (uint32_t)NC)? 0x50 : 0 )); //0x00F0;
mbed_official 119:3921aeca8633 345
mbed_official 119:3921aeca8633 346 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
mbed_official 119:3921aeca8633 347
mbed_official 119:3921aeca8633 348 if (is_stdio_uart) {
mbed_official 119:3921aeca8633 349 stdio_uart_inited = 1;
mbed_official 119:3921aeca8633 350 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 119:3921aeca8633 351 }
mbed_official 119:3921aeca8633 352 }
mbed_official 119:3921aeca8633 353
mbed_official 119:3921aeca8633 354 void serial_free(serial_t *obj) {
mbed_official 119:3921aeca8633 355 uart_data[obj->index].serial_irq_id = 0;
mbed_official 119:3921aeca8633 356 }
mbed_official 119:3921aeca8633 357
mbed_official 119:3921aeca8633 358 // serial_baud
mbed_official 119:3921aeca8633 359 // set the baud rate, taking in to account the current SystemFrequency
mbed_official 119:3921aeca8633 360 void serial_baud(serial_t *obj, int baudrate) {
mbed_official 119:3921aeca8633 361 uint16_t DL;
mbed_official 119:3921aeca8633 362
mbed_official 119:3921aeca8633 363 obj->uart->SCSMR &= ~0x0003;
mbed_official 119:3921aeca8633 364
mbed_official 119:3921aeca8633 365 if (baudrate > 32552) {
mbed_official 119:3921aeca8633 366 obj->uart->SCEMR = 0x0081; // BGDM = 1, ABCS = 1
mbed_official 119:3921aeca8633 367 DL = PCLK / (8 * baudrate);
mbed_official 119:3921aeca8633 368 if (DL > 0) {
mbed_official 119:3921aeca8633 369 DL--;
mbed_official 119:3921aeca8633 370 }
mbed_official 119:3921aeca8633 371 obj->uart->SCBRR = (uint8_t)DL;
mbed_official 119:3921aeca8633 372 } else if (baudrate > 16276) {
mbed_official 119:3921aeca8633 373 obj->uart->SCEMR = 0x0080; // BGDM = 1
mbed_official 119:3921aeca8633 374 obj->uart->SCBRR = PCLK / (16 * baudrate) - 1;
mbed_official 119:3921aeca8633 375 } else if (baudrate > 8138) {
mbed_official 119:3921aeca8633 376 obj->uart->SCEMR = 0x0000;
mbed_official 119:3921aeca8633 377 obj->uart->SCBRR = PCLK / (32 * baudrate) - 1;
mbed_official 119:3921aeca8633 378 } else if (baudrate > 4169) {
mbed_official 119:3921aeca8633 379 obj->uart->SCSMR |= 0x0001;
mbed_official 119:3921aeca8633 380 obj->uart->SCEMR = 0x0080; // BGDM = 1
mbed_official 119:3921aeca8633 381 obj->uart->SCBRR = PCLK / (64 * baudrate) - 1;
mbed_official 119:3921aeca8633 382 } else if (baudrate > 2034) {
mbed_official 119:3921aeca8633 383 obj->uart->SCSMR |= 0x0001;
mbed_official 119:3921aeca8633 384 obj->uart->SCEMR = 0x0000;
mbed_official 119:3921aeca8633 385 obj->uart->SCBRR = PCLK / (128 * baudrate) - 1;
mbed_official 119:3921aeca8633 386 } else if (baudrate > 1017) {
mbed_official 119:3921aeca8633 387 obj->uart->SCSMR |= 0x0002;
mbed_official 119:3921aeca8633 388 obj->uart->SCEMR = 0x0080; // BGDM = 1
mbed_official 119:3921aeca8633 389 obj->uart->SCBRR = PCLK / (256 * baudrate) - 1;
mbed_official 119:3921aeca8633 390 } else if (baudrate > 508) {
mbed_official 119:3921aeca8633 391 obj->uart->SCSMR |= 0x0002;
mbed_official 119:3921aeca8633 392 obj->uart->SCEMR = 0x0000;
mbed_official 119:3921aeca8633 393 obj->uart->SCBRR = PCLK / (512 * baudrate) - 1;
mbed_official 119:3921aeca8633 394 } else if (baudrate > 254) {
mbed_official 119:3921aeca8633 395 obj->uart->SCSMR |= 0x0003;
mbed_official 119:3921aeca8633 396 obj->uart->SCEMR = 0x0080; // BGDM = 1
mbed_official 119:3921aeca8633 397 obj->uart->SCBRR = PCLK / (1024 * baudrate) - 1;
mbed_official 119:3921aeca8633 398 } else if (baudrate > 127) {
mbed_official 119:3921aeca8633 399 obj->uart->SCSMR |= 0x0003;
mbed_official 119:3921aeca8633 400 obj->uart->SCEMR = 0x0000;
mbed_official 119:3921aeca8633 401 obj->uart->SCBRR = PCLK / (2048 * baudrate) - 1;
mbed_official 119:3921aeca8633 402 } else {
mbed_official 119:3921aeca8633 403 obj->uart->SCSMR |= 0x0003;
mbed_official 119:3921aeca8633 404 obj->uart->SCEMR = 0x0000;
mbed_official 119:3921aeca8633 405 obj->uart->SCBRR = 0xFFu;
mbed_official 119:3921aeca8633 406 }
mbed_official 119:3921aeca8633 407 }
mbed_official 119:3921aeca8633 408
mbed_official 119:3921aeca8633 409 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
mbed_official 119:3921aeca8633 410 int parity_enable;
mbed_official 119:3921aeca8633 411 int parity_select;
mbed_official 119:3921aeca8633 412
mbed_official 119:3921aeca8633 413 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
mbed_official 119:3921aeca8633 414 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 5: 5 data bits ... 3: 8 data bits
mbed_official 119:3921aeca8633 415 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
mbed_official 119:3921aeca8633 416 (parity == ParityForced1) || (parity == ParityForced0));
mbed_official 119:3921aeca8633 417
mbed_official 119:3921aeca8633 418 stop_bits = (stop_bits == 1)? 0:
mbed_official 119:3921aeca8633 419 (stop_bits == 2)? 1:
mbed_official 119:3921aeca8633 420 0; // must not to be
mbed_official 119:3921aeca8633 421
mbed_official 119:3921aeca8633 422 data_bits = (data_bits == 8)? 0:
mbed_official 119:3921aeca8633 423 (data_bits == 7)? 1:
mbed_official 119:3921aeca8633 424 0; // must not to be
mbed_official 119:3921aeca8633 425
mbed_official 119:3921aeca8633 426 switch (parity) {
mbed_official 119:3921aeca8633 427 case ParityNone:
mbed_official 119:3921aeca8633 428 parity_enable = 0;
mbed_official 119:3921aeca8633 429 parity_select = 0;
mbed_official 119:3921aeca8633 430 break;
mbed_official 119:3921aeca8633 431 case ParityOdd:
mbed_official 119:3921aeca8633 432 parity_enable = 1;
mbed_official 119:3921aeca8633 433 parity_select = 1;
mbed_official 119:3921aeca8633 434 break;
mbed_official 119:3921aeca8633 435 case ParityEven:
mbed_official 119:3921aeca8633 436 parity_enable = 1;
mbed_official 119:3921aeca8633 437 parity_select = 0;
mbed_official 119:3921aeca8633 438 break;
mbed_official 119:3921aeca8633 439 case ParityForced1:
mbed_official 119:3921aeca8633 440 case ParityForced0:
mbed_official 119:3921aeca8633 441 default:
mbed_official 119:3921aeca8633 442 parity_enable = 0;
mbed_official 119:3921aeca8633 443 parity_select = 0;
mbed_official 119:3921aeca8633 444 break;
mbed_official 119:3921aeca8633 445 }
mbed_official 119:3921aeca8633 446
mbed_official 119:3921aeca8633 447 obj->uart->SCSMR = data_bits << 6
mbed_official 119:3921aeca8633 448 | parity_enable << 5
mbed_official 119:3921aeca8633 449 | parity_select << 4
mbed_official 119:3921aeca8633 450 | stop_bits << 3;
mbed_official 119:3921aeca8633 451 }
mbed_official 119:3921aeca8633 452
mbed_official 119:3921aeca8633 453 /******************************************************************************
mbed_official 119:3921aeca8633 454 * INTERRUPTS HANDLING
mbed_official 119:3921aeca8633 455 ******************************************************************************/
mbed_official 119:3921aeca8633 456
mbed_official 119:3921aeca8633 457 static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) {
mbed_official 119:3921aeca8633 458 __IO uint16_t *dmy_rd_scscr;
mbed_official 119:3921aeca8633 459 __IO uint16_t *dmy_rd_scfsr;
mbed_official 119:3921aeca8633 460
mbed_official 119:3921aeca8633 461 dmy_rd_scscr = SCSCR_MATCH[index];
mbed_official 119:3921aeca8633 462 *dmy_rd_scscr &= 0x007B; // Clear TIE and Write to bit15~8,2 is always 0
mbed_official 119:3921aeca8633 463 dmy_rd_scfsr = SCFSR_MATCH[index];
mbed_official 119:3921aeca8633 464 *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0020); // Clear TDFE
mbed_official 119:3921aeca8633 465
mbed_official 119:3921aeca8633 466 irq_handler(uart_data[index].serial_irq_id, TxIrq);
mbed_official 119:3921aeca8633 467 }
mbed_official 119:3921aeca8633 468
mbed_official 119:3921aeca8633 469 static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) {
mbed_official 119:3921aeca8633 470 __IO uint16_t *dmy_rd_scscr;
mbed_official 119:3921aeca8633 471 __IO uint16_t *dmy_rd_scfsr;
mbed_official 119:3921aeca8633 472
mbed_official 119:3921aeca8633 473 dmy_rd_scscr = SCSCR_MATCH[index];
mbed_official 119:3921aeca8633 474 *dmy_rd_scscr &= 0x00B3; // Clear RIE,REIE and Write to bit15~8,2 is always 0
mbed_official 119:3921aeca8633 475 dmy_rd_scfsr = SCFSR_MATCH[index];
mbed_official 119:3921aeca8633 476 *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0003); // Clear RDF,DR
mbed_official 119:3921aeca8633 477
mbed_official 119:3921aeca8633 478 irq_handler(uart_data[index].serial_irq_id, RxIrq);
mbed_official 119:3921aeca8633 479 }
mbed_official 119:3921aeca8633 480
mbed_official 119:3921aeca8633 481 /* TX handler */
mbed_official 119:3921aeca8633 482 static void uart0_tx_irq(void) {
mbed_official 119:3921aeca8633 483 uart_tx_irq(SCIFTXI0_IRQn, 0);
mbed_official 119:3921aeca8633 484 }
mbed_official 119:3921aeca8633 485 static void uart1_tx_irq(void) {
mbed_official 119:3921aeca8633 486 uart_tx_irq(SCIFTXI1_IRQn, 1);
mbed_official 119:3921aeca8633 487 }
mbed_official 119:3921aeca8633 488 static void uart2_tx_irq(void) {
mbed_official 119:3921aeca8633 489 uart_tx_irq(SCIFTXI2_IRQn, 2);
mbed_official 119:3921aeca8633 490 }
mbed_official 119:3921aeca8633 491 static void uart3_tx_irq(void) {
mbed_official 119:3921aeca8633 492 uart_tx_irq(SCIFTXI3_IRQn, 3);
mbed_official 119:3921aeca8633 493 }
mbed_official 119:3921aeca8633 494 static void uart4_tx_irq(void) {
mbed_official 119:3921aeca8633 495 uart_tx_irq(SCIFTXI4_IRQn, 4);
mbed_official 119:3921aeca8633 496 }
mbed_official 119:3921aeca8633 497 static void uart5_tx_irq(void) {
mbed_official 119:3921aeca8633 498 uart_tx_irq(SCIFTXI5_IRQn, 5);
mbed_official 119:3921aeca8633 499 }
mbed_official 119:3921aeca8633 500 static void uart6_tx_irq(void) {
mbed_official 119:3921aeca8633 501 uart_tx_irq(SCIFTXI6_IRQn, 6);
mbed_official 119:3921aeca8633 502 }
mbed_official 119:3921aeca8633 503 static void uart7_tx_irq(void) {
mbed_official 119:3921aeca8633 504 uart_tx_irq(SCIFTXI7_IRQn, 7);
mbed_official 119:3921aeca8633 505 }
mbed_official 119:3921aeca8633 506 /* RX handler */
mbed_official 119:3921aeca8633 507 static void uart0_rx_irq(void) {
mbed_official 119:3921aeca8633 508 uart_rx_irq(SCIFRXI0_IRQn, 0);
mbed_official 119:3921aeca8633 509 }
mbed_official 119:3921aeca8633 510 static void uart1_rx_irq(void) {
mbed_official 119:3921aeca8633 511 uart_rx_irq(SCIFRXI1_IRQn, 1);
mbed_official 119:3921aeca8633 512 }
mbed_official 119:3921aeca8633 513 static void uart2_rx_irq(void) {
mbed_official 119:3921aeca8633 514 uart_rx_irq(SCIFRXI2_IRQn, 2);
mbed_official 119:3921aeca8633 515 }
mbed_official 119:3921aeca8633 516 static void uart3_rx_irq(void) {
mbed_official 119:3921aeca8633 517 uart_rx_irq(SCIFRXI3_IRQn, 3);
mbed_official 119:3921aeca8633 518 }
mbed_official 119:3921aeca8633 519 static void uart4_rx_irq(void) {
mbed_official 119:3921aeca8633 520 uart_rx_irq(SCIFRXI4_IRQn, 4);
mbed_official 119:3921aeca8633 521 }
mbed_official 119:3921aeca8633 522 static void uart5_rx_irq(void) {
mbed_official 119:3921aeca8633 523 uart_rx_irq(SCIFRXI5_IRQn, 5);
mbed_official 119:3921aeca8633 524 }
mbed_official 119:3921aeca8633 525 static void uart6_rx_irq(void) {
mbed_official 119:3921aeca8633 526 uart_rx_irq(SCIFRXI6_IRQn, 6);
mbed_official 119:3921aeca8633 527 }
mbed_official 119:3921aeca8633 528 static void uart7_rx_irq(void) {
mbed_official 119:3921aeca8633 529 uart_rx_irq(SCIFRXI7_IRQn, 7);
mbed_official 119:3921aeca8633 530 }
mbed_official 119:3921aeca8633 531
mbed_official 119:3921aeca8633 532 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
mbed_official 119:3921aeca8633 533 irq_handler = handler;
mbed_official 119:3921aeca8633 534 uart_data[obj->index].serial_irq_id = id;
mbed_official 119:3921aeca8633 535 }
mbed_official 119:3921aeca8633 536
mbed_official 119:3921aeca8633 537 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 119:3921aeca8633 538 IRQn_Type IRQn;
mbed_official 119:3921aeca8633 539 IRQHandler handler;
mbed_official 119:3921aeca8633 540
mbed_official 119:3921aeca8633 541 IRQn = irq_set_tbl[obj->index][irq];
mbed_official 119:3921aeca8633 542 handler = hander_set_tbl[obj->index][irq];
mbed_official 119:3921aeca8633 543
mbed_official 119:3921aeca8633 544 if ((obj->index >= 0) && (obj->index <= 7)) {
mbed_official 119:3921aeca8633 545 if (enable) {
mbed_official 119:3921aeca8633 546 InterruptHandlerRegister(IRQn, (void (*)(uint32_t))handler);
mbed_official 119:3921aeca8633 547 GIC_SetPriority(IRQn, 5);
mbed_official 119:3921aeca8633 548 GIC_EnableIRQ(IRQn);
mbed_official 119:3921aeca8633 549 } else {
mbed_official 119:3921aeca8633 550 GIC_DisableIRQ(IRQn);
mbed_official 119:3921aeca8633 551 }
mbed_official 119:3921aeca8633 552 }
mbed_official 119:3921aeca8633 553 }
mbed_official 119:3921aeca8633 554
mbed_official 119:3921aeca8633 555 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 119:3921aeca8633 556 if (RxIrq == irq) {
mbed_official 119:3921aeca8633 557 uart_data[obj->index].rx_irq_set_api = enable;
mbed_official 119:3921aeca8633 558 }
mbed_official 119:3921aeca8633 559 serial_irq_set_internal(obj, irq, enable);
mbed_official 119:3921aeca8633 560 }
mbed_official 119:3921aeca8633 561
mbed_official 119:3921aeca8633 562 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
mbed_official 119:3921aeca8633 563 uart_data[obj->index].rx_irq_set_flow = enable;
mbed_official 119:3921aeca8633 564 serial_irq_set_internal(obj, RxIrq, enable);
mbed_official 119:3921aeca8633 565 }
mbed_official 119:3921aeca8633 566
mbed_official 119:3921aeca8633 567 /******************************************************************************
mbed_official 119:3921aeca8633 568 * READ/WRITE
mbed_official 119:3921aeca8633 569 ******************************************************************************/
mbed_official 119:3921aeca8633 570 int serial_getc(serial_t *obj) {
mbed_official 119:3921aeca8633 571 uint16_t err_read;
mbed_official 119:3921aeca8633 572 int data;
mbed_official 119:3921aeca8633 573 int was_masked;
mbed_official 119:3921aeca8633 574
mbed_official 119:3921aeca8633 575 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 576 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 577 #else
mbed_official 119:3921aeca8633 578 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 579 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 580 if (obj->uart->SCFSR & 0x93) {
mbed_official 119:3921aeca8633 581 err_read = obj->uart->SCFSR;
mbed_official 119:3921aeca8633 582 obj->uart->SCFSR = (err_read & ~0x93);
mbed_official 119:3921aeca8633 583 }
mbed_official 119:3921aeca8633 584 obj->uart->SCSCR |= 0x0040; // Set RIE
mbed_official 119:3921aeca8633 585 if (!was_masked) {
mbed_official 119:3921aeca8633 586 __enable_irq();
mbed_official 119:3921aeca8633 587 }
mbed_official 119:3921aeca8633 588
mbed_official 119:3921aeca8633 589 if (obj->uart->SCLSR & 0x0001) {
mbed_official 119:3921aeca8633 590 obj->uart->SCLSR = 0u; // ORER clear
mbed_official 119:3921aeca8633 591 }
mbed_official 119:3921aeca8633 592
mbed_official 119:3921aeca8633 593 while (!serial_readable(obj));
mbed_official 119:3921aeca8633 594 data = obj->uart->SCFRDR & 0xff;
mbed_official 119:3921aeca8633 595
mbed_official 119:3921aeca8633 596 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 597 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 598 #else
mbed_official 119:3921aeca8633 599 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 600 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 601 err_read = obj->uart->SCFSR;
mbed_official 119:3921aeca8633 602 obj->uart->SCFSR = (err_read & 0xfffD); // Clear RDF
mbed_official 119:3921aeca8633 603 if (!was_masked) {
mbed_official 119:3921aeca8633 604 __enable_irq();
mbed_official 119:3921aeca8633 605 }
mbed_official 119:3921aeca8633 606
mbed_official 119:3921aeca8633 607 if (err_read & 0x80) {
mbed_official 119:3921aeca8633 608 data = -1; //err
mbed_official 119:3921aeca8633 609 }
mbed_official 119:3921aeca8633 610 return data;
mbed_official 119:3921aeca8633 611 }
mbed_official 119:3921aeca8633 612
mbed_official 119:3921aeca8633 613 void serial_putc(serial_t *obj, int c) {
mbed_official 119:3921aeca8633 614 uint16_t dummy_read;
mbed_official 119:3921aeca8633 615 int was_masked;
mbed_official 119:3921aeca8633 616
mbed_official 119:3921aeca8633 617 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 618 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 619 #else
mbed_official 119:3921aeca8633 620 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 621 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 622 obj->uart->SCSCR |= 0x0080; // Set TIE
mbed_official 119:3921aeca8633 623 if (!was_masked) {
mbed_official 119:3921aeca8633 624 __enable_irq();
mbed_official 119:3921aeca8633 625 }
mbed_official 119:3921aeca8633 626 while (!serial_writable(obj));
mbed_official 119:3921aeca8633 627 obj->uart->SCFTDR = c;
mbed_official 119:3921aeca8633 628 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 629 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 630 #else
mbed_official 119:3921aeca8633 631 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 632 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 633 dummy_read = obj->uart->SCFSR;
mbed_official 119:3921aeca8633 634 obj->uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE
mbed_official 119:3921aeca8633 635 if (!was_masked) {
mbed_official 119:3921aeca8633 636 __enable_irq();
mbed_official 119:3921aeca8633 637 }
mbed_official 119:3921aeca8633 638 uart_data[obj->index].count++;
mbed_official 119:3921aeca8633 639 }
mbed_official 119:3921aeca8633 640
mbed_official 119:3921aeca8633 641 int serial_readable(serial_t *obj) {
mbed_official 119:3921aeca8633 642 return ((obj->uart->SCFSR & 0x02) != 0); // RDF
mbed_official 119:3921aeca8633 643 }
mbed_official 119:3921aeca8633 644
mbed_official 119:3921aeca8633 645 int serial_writable(serial_t *obj) {
mbed_official 119:3921aeca8633 646 return ((obj->uart->SCFSR & 0x20) != 0); // TDFE
mbed_official 119:3921aeca8633 647 }
mbed_official 119:3921aeca8633 648
mbed_official 119:3921aeca8633 649 void serial_clear(serial_t *obj) {
mbed_official 119:3921aeca8633 650 int was_masked;
mbed_official 119:3921aeca8633 651 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 652 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 653 #else
mbed_official 119:3921aeca8633 654 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 655 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 656
mbed_official 119:3921aeca8633 657 obj->uart->SCFCR |= 0x06; // TFRST = 1, RFRST = 1
mbed_official 119:3921aeca8633 658 obj->uart->SCFCR &= ~0x06; // TFRST = 0, RFRST = 0
mbed_official 119:3921aeca8633 659 obj->uart->SCFSR &= ~0x0093u; // ER, BRK, RDF, DR = 0
mbed_official 119:3921aeca8633 660
mbed_official 119:3921aeca8633 661 if (!was_masked) {
mbed_official 119:3921aeca8633 662 __enable_irq();
mbed_official 119:3921aeca8633 663 }
mbed_official 119:3921aeca8633 664 }
mbed_official 119:3921aeca8633 665
mbed_official 119:3921aeca8633 666 void serial_pinout_tx(PinName tx) {
mbed_official 119:3921aeca8633 667 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 119:3921aeca8633 668 }
mbed_official 119:3921aeca8633 669
mbed_official 119:3921aeca8633 670 void serial_break_set(serial_t *obj) {
mbed_official 119:3921aeca8633 671 int was_masked;
mbed_official 119:3921aeca8633 672 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 673 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 674 #else
mbed_official 119:3921aeca8633 675 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 676 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 677 // TxD Output(L)
mbed_official 119:3921aeca8633 678 obj->uart->SCSPTR &= ~0x0001u; // SPB2DT = 0
mbed_official 119:3921aeca8633 679 obj->uart->SCSCR &= ~0x0020u; // TE = 0 (Output disable)
mbed_official 119:3921aeca8633 680 if (!was_masked) {
mbed_official 119:3921aeca8633 681 __enable_irq();
mbed_official 119:3921aeca8633 682 }
mbed_official 119:3921aeca8633 683 }
mbed_official 119:3921aeca8633 684
mbed_official 119:3921aeca8633 685 void serial_break_clear(serial_t *obj) {
mbed_official 119:3921aeca8633 686 int was_masked;
mbed_official 119:3921aeca8633 687 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 688 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 689 #else
mbed_official 119:3921aeca8633 690 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 691 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 692 obj->uart->SCSCR |= 0x0020u; // TE = 1 (Output enable)
mbed_official 119:3921aeca8633 693 obj->uart->SCSPTR |= 0x0001u; // SPB2DT = 1
mbed_official 119:3921aeca8633 694 if (!was_masked) {
mbed_official 119:3921aeca8633 695 __enable_irq();
mbed_official 119:3921aeca8633 696 }
mbed_official 119:3921aeca8633 697 }
mbed_official 119:3921aeca8633 698
mbed_official 119:3921aeca8633 699 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
mbed_official 119:3921aeca8633 700 // determine the UART to use
mbed_official 119:3921aeca8633 701 int was_masked;
mbed_official 119:3921aeca8633 702
mbed_official 119:3921aeca8633 703 serial_flow_irq_set(obj, 0);
mbed_official 119:3921aeca8633 704
mbed_official 119:3921aeca8633 705 if (type == FlowControlRTSCTS) {
mbed_official 119:3921aeca8633 706 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 707 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 708 #else
mbed_official 119:3921aeca8633 709 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 710 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 711 obj->uart->SCFCR = 0x0008u; // CTS/RTS enable
mbed_official 119:3921aeca8633 712 if (!was_masked) {
mbed_official 119:3921aeca8633 713 __enable_irq();
mbed_official 119:3921aeca8633 714 }
mbed_official 119:3921aeca8633 715 pinmap_pinout(rxflow, PinMap_UART_RTS);
mbed_official 119:3921aeca8633 716 pinmap_pinout(txflow, PinMap_UART_CTS);
mbed_official 119:3921aeca8633 717 } else {
mbed_official 119:3921aeca8633 718 #if defined ( __ICCARM__ )
mbed_official 119:3921aeca8633 719 was_masked = __disable_irq_iar();
mbed_official 119:3921aeca8633 720 #else
mbed_official 119:3921aeca8633 721 was_masked = __disable_irq();
mbed_official 119:3921aeca8633 722 #endif /* __ICCARM__ */
mbed_official 119:3921aeca8633 723 obj->uart->SCFCR = 0x0000u; // CTS/RTS diable
mbed_official 119:3921aeca8633 724 if (!was_masked) {
mbed_official 119:3921aeca8633 725 __enable_irq();
mbed_official 119:3921aeca8633 726 }
mbed_official 119:3921aeca8633 727 }
mbed_official 119:3921aeca8633 728 }
mbed_official 119:3921aeca8633 729
mbed_official 119:3921aeca8633 730
mbed_official 119:3921aeca8633 731
mbed_official 119:3921aeca8633 732